<s>
An	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
is	O
an	O
abstract	O
model	O
of	O
a	O
computer	O
,	O
also	O
referred	O
to	O
as	O
computer	B-General_Concept
architecture	I-General_Concept
.	O
</s>
<s>
An	O
ISA	O
permits	O
multiple	O
implementations	O
that	O
may	O
vary	O
in	O
performance	O
,	O
physical	O
size	O
,	O
and	O
monetary	O
cost	O
(	O
among	O
other	O
things	O
)	O
;	O
because	O
the	O
ISA	O
serves	O
as	O
the	O
interface	B-Application
between	O
software	O
and	O
hardware	B-Architecture
.	O
</s>
<s>
This	O
has	O
enabled	O
binary	B-General_Concept
compatibility	I-General_Concept
between	O
different	O
generations	O
of	O
computers	O
to	O
be	O
easily	O
achieved	O
,	O
and	O
the	O
development	O
of	O
computer	O
families	O
.	O
</s>
<s>
An	O
ISA	O
defines	O
everything	O
a	O
machine	B-Language
language	I-Language
programmer	B-Application
needs	O
to	O
know	O
in	O
order	O
to	O
program	O
a	O
computer	O
.	O
</s>
<s>
What	O
an	O
ISA	O
defines	O
differs	O
between	O
ISAs	O
;	O
in	O
general	O
,	O
ISAs	O
define	O
the	O
supported	O
data	O
types	O
,	O
what	O
state	O
there	O
is	O
(	O
such	O
as	O
the	O
main	O
memory	O
and	O
registers	B-General_Concept
)	O
and	O
their	O
semantics	O
(	O
such	O
as	O
the	O
memory	B-General_Concept
consistency	I-General_Concept
and	O
addressing	B-Language
modes	I-Language
)	O
,	O
the	O
instruction	B-General_Concept
set	I-General_Concept
(	O
the	O
set	O
of	O
machine	B-Language
instructions	I-Language
that	O
comprises	O
a	O
computer	O
's	O
machine	B-Language
language	I-Language
)	O
,	O
and	O
the	O
input/output	B-General_Concept
model	O
.	O
</s>
<s>
In	O
the	O
early	O
decades	O
of	O
computing	O
,	O
there	O
were	O
computers	O
that	O
used	O
binary	O
,	O
decimal	B-Device
and	O
even	O
ternary	B-Device
.	O
</s>
<s>
Computer	B-General_Concept
architectures	I-General_Concept
are	O
often	O
described	O
as	O
n-bit	O
architectures	O
.	O
</s>
<s>
Today	O
n	O
is	O
often	O
8	O
,	O
16	O
,	O
32	O
,	O
or	O
64	O
,	O
but	O
other	O
sizes	O
have	O
been	O
used	O
(	O
including	O
6	O
,	O
12	B-Device
,	O
18	B-General_Concept
,	O
24	O
,	O
30	O
,	O
36	O
,	O
39	B-Device
,	O
48	O
,	O
60	B-Device
)	O
.	O
</s>
<s>
This	O
is	O
actually	O
a	O
simplification	O
as	O
computer	B-General_Concept
architecture	I-General_Concept
often	O
has	O
a	O
few	O
more	O
or	O
less	O
"	O
natural	O
"	O
datasizes	O
in	O
the	O
instruction	B-General_Concept
set	I-General_Concept
,	O
but	O
the	O
hardware	B-Architecture
implementation	O
of	O
these	O
may	O
be	O
very	O
different	O
.	O
</s>
<s>
Many	O
instruction	B-General_Concept
set	I-General_Concept
architectures	I-General_Concept
have	O
instructions	O
that	O
,	O
on	O
some	O
implementations	O
of	O
that	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
,	O
operate	O
on	O
half	O
and/or	O
twice	O
the	O
size	O
of	O
the	O
processor	O
's	O
major	O
internal	O
datapaths	O
.	O
</s>
<s>
Examples	O
of	O
this	O
are	O
the	O
Z80	B-General_Concept
,	O
MC68000	B-Device
,	O
and	O
the	O
IBM	B-Application
System/360	I-Application
.	O
</s>
<s>
On	O
the	O
68000	B-Device
,	O
for	O
instance	O
,	O
this	O
means	O
8	O
instead	O
of	O
4	O
clock	O
ticks	O
,	O
and	O
this	O
particular	O
chip	O
may	O
be	O
described	O
as	O
a	O
32-bit	O
architecture	O
with	O
a	O
16-bit	B-Device
implementation	O
.	O
</s>
<s>
The	O
IBM	B-Application
System/360	I-Application
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
is	O
32-bit	O
,	O
but	O
several	O
models	O
of	O
the	O
System/360	B-Device
series	O
,	O
such	O
as	O
the	O
IBM	B-Device
System/360	I-Device
Model	I-Device
30	I-Device
,	O
have	O
smaller	O
internal	O
data	O
paths	O
,	O
while	O
others	O
,	O
such	O
as	O
the	O
360/195	B-Device
,	O
have	O
larger	O
internal	O
data	O
paths	O
.	O
</s>
<s>
The	O
external	O
databus	O
width	O
is	O
not	O
used	O
to	O
determine	O
the	O
width	O
of	O
the	O
architecture	O
;	O
the	O
NS32008	B-Device
,	I-Device
NS32016	I-Device
and	I-Device
NS32032	I-Device
were	O
basically	O
the	O
same	O
32-bit	O
chip	O
with	O
different	O
external	O
data	O
buses	O
;	O
the	O
NS32764	O
had	O
a	O
64-bit	B-Device
bus	O
,	O
and	O
used	O
32-bit	O
register	B-General_Concept
.	O
</s>
<s>
Early	O
32-bit	O
microprocessors	B-Architecture
often	O
had	O
a	O
24-bit	O
address	O
,	O
as	O
did	O
the	O
System/360	B-Device
processors	O
.	O
</s>
<s>
The	O
number	O
of	O
operands	O
is	O
one	O
of	O
the	O
factors	O
that	O
may	O
give	O
an	O
indication	O
about	O
the	O
performance	O
of	O
the	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
Usually	O
it	O
is	O
RISC	B-Architecture
architectures	I-Architecture
that	O
have	O
fixed	O
encoding	O
length	O
and	O
CISC	B-Architecture
architectures	I-Architecture
that	O
have	O
variable	O
length	O
,	O
but	O
not	O
always	O
.	O
</s>
<s>
Little-endian	O
processors	O
order	O
bytes	B-Application
in	O
memory	O
with	O
the	O
least	O
significant	O
byte	B-Application
of	O
a	O
multi-byte	O
value	O
in	O
the	O
lowest-numbered	O
memory	O
location	O
.	O
</s>
<s>
Big-endian	O
architectures	O
instead	O
arrange	O
bytes	B-Application
with	O
the	O
most	O
significant	O
byte	B-Application
at	O
the	O
lowest-numbered	O
address	O
.	O
</s>
<s>
The	O
x86	B-Operating_System
architecture	I-Operating_System
as	O
well	O
as	O
several	O
8-bit	O
architectures	O
are	O
little-endian	O
.	O
</s>
<s>
Most	O
RISC	B-Architecture
architectures	I-Architecture
(	O
SPARC	B-Architecture
,	O
Power	B-Architecture
,	O
PowerPC	B-Architecture
,	O
MIPS	B-Device
)	O
were	O
originally	O
big-endian	O
(	O
ARM	O
was	O
little-endian	O
)	O
,	O
but	O
many	O
(	O
including	O
ARM	O
)	O
are	O
now	O
configurable	O
as	O
either	O
.	O
</s>
<s>
Endianness	O
only	O
applies	O
to	O
processors	O
that	O
allow	O
individual	O
addressing	O
of	O
units	O
of	O
data	O
(	O
such	O
as	O
bytes	B-Application
)	O
that	O
are	O
smaller	O
than	O
the	O
basic	O
addressable	O
machine	O
word	O
.	O
</s>
<s>
The	O
table	O
below	O
compares	O
basic	O
information	O
about	O
instruction	B-General_Concept
set	I-General_Concept
architectures	I-General_Concept
.	O
</s>
<s>
Usually	O
the	O
number	O
of	O
registers	B-General_Concept
is	O
a	O
power	B-Architecture
of	O
two	O
,	O
e.g.	O
</s>
<s>
In	O
some	O
cases	O
a	O
hardwired-to-zero	O
pseudo-register	O
is	O
included	O
,	O
as	O
"	O
part	O
"	O
of	O
register	B-General_Concept
files	I-General_Concept
of	O
architectures	O
,	O
mostly	O
to	O
simplify	O
indexing	O
modes	O
.	O
</s>
<s>
The	O
column	O
"	O
Registers	B-General_Concept
"	O
only	O
counts	O
the	O
integer	O
"	O
registers	B-General_Concept
"	O
usable	O
by	O
general	O
instructions	O
at	O
any	O
moment	O
.	O
</s>
<s>
Architectures	O
always	O
include	O
special-purpose	O
registers	B-General_Concept
such	O
as	O
the	O
program	O
counter	O
(	O
PC	O
)	O
.	O
</s>
<s>
Note	O
that	O
some	O
architectures	O
,	O
such	O
as	O
SPARC	B-Architecture
,	O
have	O
register	B-General_Concept
windows	I-General_Concept
;	O
for	O
those	O
architectures	O
,	O
the	O
count	O
indicates	O
how	O
many	O
registers	B-General_Concept
are	O
available	O
within	O
a	O
register	B-General_Concept
window	I-General_Concept
.	O
</s>
<s>
Also	O
,	O
non-architected	O
registers	B-General_Concept
for	O
register	B-General_Concept
renaming	O
are	O
not	O
counted	O
.	O
</s>
<s>
In	O
the	O
"	O
Type	O
"	O
column	O
,	O
"	O
Register	B-Architecture
–	I-Architecture
Register	I-Architecture
"	O
is	O
a	O
synonym	O
for	O
a	O
common	O
type	O
of	O
architecture	O
,	O
"	O
load	B-Architecture
–	I-Architecture
store	I-Architecture
"	O
,	O
meaning	O
that	O
no	O
instruction	O
can	O
directly	O
access	O
memory	O
except	O
some	O
special	O
ones	O
,	O
i.e.	O
</s>
<s>
load	O
to	O
or	O
store	O
from	O
register(s )	O
,	O
with	O
the	O
possible	O
exceptions	O
of	O
memory	O
locking	O
instructions	O
for	O
atomic	O
operations	O
.	O
</s>
<s>
Archi-tecture	O
Bits	O
Version	O
Intro-duced	O
Max	B-General_Concept
#operands	O
Type	O
Design	O
Registers( excluding	O
FP/vector	O
)	O
Instruction	O
encoding	O
Branch	B-General_Concept
evaluation	O
Endian-ness	O
Extensions	O
Open	O
Royaltyfree	O
6502	B-General_Concept
8	O
1975	O
1	O
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
CISC	B-Architecture
3	O
Variable	O
(	O
8	O
-	O
to	O
24-bit	O
)	O
Condition	O
register	B-General_Concept
Little	O
6800	B-Device
8	O
1974	O
1	O
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
CISC	B-Architecture
3	O
Variable	O
(	O
8	O
-	O
to	O
32-bit	O
)	O
Condition	O
register	B-General_Concept
Big	O
6809	B-Device
8	O
1978	O
1	O
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
CISC	B-Architecture
3	O
Variable	O
(	O
8	O
-	O
to	O
32-bit	O
)	O
Condition	O
register	B-General_Concept
Big	O
680x0	B-Device
32	O
1979	O
2	O
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
CISC	B-Architecture
8	O
data	O
and	O
8	O
address	O
Variable	O
Condition	O
register	B-General_Concept
Big	O
8080	B-General_Concept
8	O
1974	O
2	O
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
CISC	B-Architecture
7	O
Variable	O
(	O
8	O
to	O
24	O
bits	O
)	O
Condition	O
register	B-General_Concept
Little	O
8051	B-Architecture
32	O
(	O
8	O
→	O
32	O
)	O
1977	O
?	O
</s>
<s>
1	O
Register	B-Architecture
–	I-Architecture
Register	I-Architecture
CISC	B-Architecture
Variable	O
(	O
8-bit	O
to	O
128	O
bytes	B-Application
)	O
Compare	O
and	O
branch	B-General_Concept
Little	O
x86	B-Operating_System
16	O
,	O
32	O
,	O
64( 16	O
→	O
32	O
→	O
64	O
)	O
1978	O
2	O
(	O
integer	O
)	O
3	O
(	O
AVX	B-General_Concept
)	O
4	O
(	O
FMA4	B-General_Concept
and	O
VPBLENDVPx	O
)	O
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
CISC	B-Architecture
Variable	O
(	O
8086	O
~	O
80386	O
:	O
variable	O
between	O
1	O
and	O
6	O
bytes	B-Application
/w	O
MMU	O
+	O
intel	O
SDK	O
,	O
80486	O
:	O
2	O
to	O
5	O
bytes	B-Application
with	O
prefix	O
,	O
pentium	O
and	O
onward	O
:	O
2	O
to	O
4	O
bytes	B-Application
with	O
prefix	O
,	O
x64	B-Device
:	O
4	O
bytes	B-Application
prefix	O
,	O
third	O
party	O
x86	B-Operating_System
emulation	O
:	O
1	O
to	O
15	O
bytes	B-Application
w/o	O
prefix	O
&	O
MMU	O
.	O
</s>
<s>
4	O
buffer	O
registers	B-General_Concept
Variable	O
(	O
16	O
-	O
or	O
32-bit	O
)	O
Condition	O
code	O
Little	O
CDC	O
Upper	O
3000	O
series	O
48	O
1963	O
3	O
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
CISC	B-Architecture
48-bit	O
A	O
reg.	O
,	O
48-bit	O
Q	O
reg.	O
,	O
6	O
15-bit	O
B	O
registers	B-General_Concept
,	O
miscellaneous	O
Variable	O
(	O
24	O
-	O
or	O
48-bit	O
)	O
Multiple	O
types	O
of	O
jump	O
and	O
skip	O
Big	O
CDC	O
6000Central	O
Processor	O
(	O
CP	O
)	O
60	B-Device
1964	O
3	O
Register	B-Architecture
–	I-Architecture
Register	I-Architecture
n/a	O
24	O
(	O
8	O
18-bit	B-General_Concept
address	O
reg.	O
,	O
8	O
18-bit	B-General_Concept
index	O
reg.	O
,	O
8	O
60-bit	B-Device
operand	O
reg	O
.	O
)	O
</s>
<s>
Test	O
and	O
branch	B-General_Concept
EAE	O
(	O
Extended	O
Arithmetic	O
Element	O
)	O
PDP-11	B-Device
16	O
1970	O
2	O
Memory	O
–	O
Memory	O
CISC	B-Architecture
8	O
(	O
includes	O
program	O
counter	O
and	O
stack	O
pointer	O
,	O
though	O
any	O
register	B-General_Concept
can	O
act	O
as	O
stack	O
pointer	O
)	O
Variable	O
(	O
16-	O
,	O
32-	O
,	O
or	O
48-bit	O
)	O
Condition	O
code	O
Little	O
Floating	O
Point	O
,	O
Commercial	O
Instruction	B-General_Concept
Set	I-General_Concept
POWER	B-Architecture
,	O
PowerPC	B-Architecture
,	O
Power	B-Architecture
ISA	I-Architecture
32/64	O
(	O
32	O
→	O
64	O
)	O
3.1	O
1990	O
3	O
(	O
mostly	O
)	O
.	O
</s>
<s>
FMA	B-General_Concept
,	O
LD/ST	O
-Update	O
Register	B-Architecture
–	I-Architecture
Register	I-Architecture
RISC	B-Architecture
32	O
GPR	B-General_Concept
,	O
8	O
4-bit	O
Condition	O
Fields	O
,	O
Link	O
Register	B-General_Concept
,	O
Counter	O
Register	B-General_Concept
Fixed	O
(	O
32-bit	O
)	O
,	O
Variable	O
(	O
32	O
-	O
or	O
64-bit	B-Device
with	O
the	O
32-bit	O
prefix	O
)	O
Condition	O
code	O
,	O
Branch-Counter	O
auto-decrement	O
Bi-endian	O
AltiVec	B-General_Concept
,	O
APU	O
,	O
VSX	O
,	O
Cell	B-General_Concept
,	O
Floating-point	O
,	O
Matrix	O
Mutiply	O
Assist	O
RISC-V	B-Device
32	O
,	O
64	O
,	O
128	O
20191213	O
2010	O
3	O
Register	B-Architecture
–	I-Architecture
Register	I-Architecture
RISC	B-Architecture
32	O
(	O
including	O
"	O
zero	O
"	O
)	O
VariableCompare	O
and	O
branch	B-General_Concept
Little	O
RX	B-Device
64/32/16	O
2000	O
3	O
Memory	O
–	O
Memory	O
CISC	B-Architecture
4	O
integer	O
+	O
4	O
address	O
Variable	O
Compare	O
and	O
branch	B-General_Concept
Little	O
S+core	B-Device
16/32	O
2005	O
RISC	B-Architecture
Little	O
SPARC	B-Architecture
64	O
(	O
32	O
→	O
64	O
)	O
OSA2017Oracle	O
SPARC	B-Architecture
Processor	O
Documentation	O
1985	O
3	O
Register	B-Architecture
–	I-Architecture
Register	I-Architecture
RISC	B-Architecture
32	O
(	O
including	O
"	O
zero	O
"	O
)	O
Fixed	O
(	O
32-bit	O
)	O
Condition	O
code	O
Big	O
→	O
Bi	O
VIS	B-General_Concept
SPARC	B-Architecture
Architecture	O
License	O
SuperH	O
(	O
SH	O
)	O
32	O
1994	O
2	O
Register	B-Architecture
–	I-Architecture
Register	I-Architecture
Register	B-Architecture
–	I-Architecture
Memory	I-Architecture
RISC	B-Architecture
16	O
Fixed	O
(	O
16	O
-	O
or	O
32-bit	O
)	O
,	O
Variable	O
Condition	O
code(single bit )	O
Bi	O
System/360System/370z/Architecture	O
64	O
(	O
32	O
→	O
64	O
)	O
1964	O
2	O
(	O
most	O
)	O
3	O
(	O
FMA	B-General_Concept
,	O
distinctoperand	O
facility	O
)	O
4	O
(	O
some	O
vector	O
inst	O
.	O
)	O
</s>
