<s>
Electronic	O
devices	O
may	O
consist	O
of	O
integrated	O
circuits	O
(	O
ICs	O
)	O
,	O
printed	O
circuit	O
boards	O
(	O
PCBs	O
)	O
,	O
field	B-Architecture
programmable	I-Architecture
gate	I-Architecture
arrays	I-Architecture
(	O
FPGAs	B-Architecture
)	O
or	O
a	O
combination	O
of	O
them	O
.	O
</s>
<s>
For	O
FPGAs	B-Architecture
the	O
low-level	O
description	O
consists	O
of	O
a	O
binary	O
file	O
to	O
be	O
flashed	O
into	O
the	O
gate	O
array	O
,	O
while	O
for	O
an	O
integrated	O
circuit	O
the	O
low-level	O
description	O
consists	O
of	O
a	O
layout	O
file	O
which	O
describes	O
the	O
masks	O
to	O
be	O
used	O
for	O
lithography	O
inside	O
a	O
foundry	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
program	O
for	O
high-level	O
digital	O
synthesis	O
can	O
usually	O
be	O
used	O
both	O
for	O
IC	O
digital	O
design	O
as	O
well	O
as	O
for	O
programming	O
an	O
FPGA	B-Architecture
.	O
</s>
<s>
Similarly	O
,	O
a	O
tool	O
for	O
schematic-capture	O
and	O
analog	O
simulation	B-Language
can	O
generally	O
be	O
used	O
both	O
for	O
IC	O
analog	O
design	O
and	O
for	O
PCB	O
design	O
.	O
</s>
<s>
Since	O
a	O
single	O
VLSI	O
mask	B-Algorithm
set	I-Algorithm
can	O
cost	O
up	O
to	O
10-100	O
millions	O
,	O
trial	O
and	O
error	O
approaches	O
are	O
not	O
economically	O
viable	O
.	O
</s>
<s>
Errors	O
may	O
be	O
present	O
in	O
the	O
high-level	O
code	O
already	O
,	O
such	O
as	O
for	O
the	O
Pentium	B-Device
FDIV	I-Device
floating-point	I-Device
unit	I-Device
bug	I-Device
,	O
or	O
it	O
can	O
be	O
inserted	O
all	O
the	O
way	O
down	O
to	O
physical	O
synthesis	O
,	O
such	O
as	O
a	O
missing	O
wire	O
,	O
or	O
a	O
timing	O
violation	O
.	O
</s>
<s>
This	O
set	O
of	O
files	O
constitutes	O
the	O
process	B-Algorithm
design	I-Algorithm
kit	I-Algorithm
(	O
PDK	O
)	O
and	O
it	O
is	O
usually	O
developed	O
as	O
a	O
joint	O
effort	O
between	O
the	O
foundry	O
and	O
an	O
EDA	O
vendor	O
.	O
</s>
<s>
Simulation	B-Language
?	O
</s>
<s>
Simulation	B-Language
?	O
</s>
<s>
User	O
Interface	O
Language(s )	O
Imports	O
Exports	O
Scripting	O
support	O
Version	O
Date	O
Altium	B-Algorithm
Designer	I-Algorithm
(	O
former	O
Protel	B-Algorithm
)	O
by	O
Altium	B-Algorithm
Windows	B-Application
23.3	O
2023-03-16	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
Multilingual	O
OrCAD	B-Algorithm
,	O
Allegro	O
,	O
PADS	O
Logic	O
,	O
PADS	O
PCB	O
,	O
Expedition	O
,	O
DxDesigner	O
,	O
EAGLE	B-Language
,	O
P-CAD	O
,	O
Gerber	O
,	O
STEP	O
,	O
Solidworks	O
,	O
IDF	O
,	O
more	O
3D	O
PDF	O
,	O
Gerber	O
,	O
Gerber	O
X2	O
,	O
Excellon	O
,	O
ODB++	O
,	O
DXF	O
,	O
STEP	O
,	O
OrCAD	B-Algorithm
,	O
EAGLE	B-Language
,	O
EDB	O
,	O
more	O
Delphi	O
,	O
JS	O
,	O
VB	O
Wine	B-Application
CADSTAR	B-Algorithm
,	O
Board	O
Designer	O
,	O
and	O
Visula	O
by	O
Zuken	O
Windows	B-Application
2022.0	O
2022-08-31	O
,	O
SI	O
&	O
PI	O
en	O
PADS	O
,	O
OrCAD	B-Algorithm
,	O
P-CAD	O
,	O
Protel	B-Algorithm
,	O
DXF	O
,	O
IDF	O
PDF	O
,	O
Gerber	O
,	O
Excellon	O
,	O
ODB++	O
,	O
DXF	O
,	O
IDF	O
more	O
COM	O
,	O
macros	O
CircuitMaker	B-Algorithm
by	O
Altium	B-Algorithm
Windows	B-Application
2	O
2021-07	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
en	O
Importer	O
Removed	O
since	O
Last	O
Version	O
(	O
1.3	O
)	O
Gerber	O
,	O
Excellon	O
,	O
DXF	O
,	O
STEP	O
,	O
PDF	O
None	O
Wine	B-Application
CR-5000	B-Algorithm
by	O
Zuken	O
POSIX	B-Operating_System
13	O
2011-05-17	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
,	O
SI	O
&	O
PI	O
rowspan	O
=	O
"	O
4	O
"	O
en	O
,	O
jp	O
EDIF	O
,	O
DXF	O
,	O
IGES	O
,	O
IDF	O
,	O
BSDL	O
,	O
STEP	O
,	O
ACIS	O
,	O
Gerber	O
,	O
Excellon	O
,	O
more	O
PDF	O
,	O
Gerber	O
,	O
Excellon	O
,	O
ODB++	O
(	O
must	O
request	O
)	O
,	O
DXF	O
,	O
STEP	O
,	O
IPC	O
D-356	O
,	O
IPC-2581	O
,	O
EPS	O
,	O
ACIS	O
Windows	B-Application
Unix	B-Application
Linux	B-Application
CR-8000	B-Algorithm
by	O
Zuken	O
POSIX	B-Operating_System
2020	O
2020-06-30	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
,	O
SI	O
&	O
PI	O
,	O
IBIS-AMI/SERDES	O
rowspan	O
=	O
"	O
4	O
"	O
en	O
,	O
jp	O
EDIF	O
,	O
DXF	O
,	O
IGES	O
,	O
IDF	O
,	O
BSDL	O
,	O
STEP	O
,	O
ACIS	O
,	O
Gerber	O
,	O
Excellon	O
,	O
more	O
PDF	O
,	O
Gerber	O
,	O
Excellon	O
,	O
ODB++	O
(	O
must	O
request	O
)	O
,	O
DXF	O
,	O
STEP	O
,	O
IPC	O
D-356	O
,	O
IPC-2581	O
,	O
EPS	O
,	O
ACIS	O
Windows	B-Application
Unix	B-Application
Linux	B-Application
DesignSpark	B-Algorithm
PCB	I-Algorithm
by	O
RS	O
Components	O
Windows	B-Application
9.0.3	O
2020-07-08	O
,	O
Spice	B-Protocol
en	O
EAGLE	B-Language
,	O
DXF	O
,	O
EDIF	O
Gerber	O
,	O
Excellon	O
,	O
ODB++	O
,	O
DXF	O
,	O
IDF	O
,	O
PDF	O
,	O
LPKF	O
DipTrace	B-Algorithm
by	O
Novarm	B-Algorithm
POSIX	B-Operating_System
4.3.0.4	O
2023-01-18	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
(	O
Spice	B-Protocol
netlist	O
export	O
)	O
rowspan	O
=	O
"	O
4	O
"	O
21	O
languages	O
Altium	B-Algorithm
,	O
Eagle	B-Language
,	O
KiCad	B-Language
,	O
OrCAD	B-Algorithm
,	O
P-CAD	O
,	O
PADS	O
,	O
Gerber	O
,	O
N/C	O
Drill	O
,	O
DXF	O
,	O
BSDL	O
Pinlist	O
,	O
Netlists	O
Gerber	O
,	O
Gerber	O
X2	O
,	O
Excellon	O
,	O
ODB++	O
,	O
DXF	O
,	O
Eagle	B-Language
,	O
P-CAD	O
,	O
PADS	O
,	O
OrCAD	B-Algorithm
,	O
IPC-D-356	O
,	O
STEP	O
,	O
VRML	O
,	O
Pick	O
and	O
Place	O
,	O
CSV	O
,	O
BOM	O
Windows	B-Application
Mac	B-Operating_System
Wine	B-Application
EAGLE	B-Language
by	O
Autodesk/CadSoft	O
Computer	O
POSIX	B-Operating_System
9.6.2	O
2020-05-27	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
de	O
,	O
en	O
,	O
zh	O
,	O
hu	O
,	O
ru	O
EAGLE	B-Language
(	O
XML	O
)	O
,	O
ACCEL	O
(	O
P-CAD	O
,	O
Altium	B-Algorithm
,	O
Protel	B-Algorithm
)	O
,	O
ULTIBOARD	B-Algorithm
,	O
Netlists	O
,	O
BMP	O
,	O
Custom	O
EAGLE	B-Language
(	O
XML	O
)	O
,	O
Protel	B-Algorithm
,	O
Netlists	O
,	O
Images	O
,	O
Gerber	O
,	O
Gerber	O
X2	O
,	O
Excellon	O
,	O
Sieb	O
&	O
Meyer	O
,	O
HPGL	O
,	O
PostScript/EPS	O
,	O
PDF	O
,	O
Images	O
,	O
HyperLynx	O
,	O
IDF	O
,	O
Custom	O
Proprietary	O
User	O
Language	O
Programming	O
(	O
ULP	O
)	O
Windows	B-Application
Linux	B-Application
Mac	B-Operating_System
EasyEDA	B-Algorithm
POSIX	B-Operating_System
6.4.5	O
2020-08-19	O
rowspan	O
=	O
"	O
5	O
"	O
rowspan	O
=	O
"	O
5	O
"	O
rowspan	O
=	O
"	O
5	O
"	O
en	O
,	O
fr	O
,	O
de	O
,	O
pl	O
,	O
jp	O
,	O
ru	O
,	O
es	O
,	O
se	O
,	O
ua	O
,	O
zh	O
...	O
Altium	B-Algorithm
,	O
EAGLE	B-Language
,	O
KiCad	B-Language
libraries	O
,	O
LTspice	O
.asc/.asy	O
files	O
,	O
JSON	O
,	O
Spice	B-Protocol
PDF	O
,	O
PNG	O
,	O
SVG	O
,	O
JSON	O
,	O
Gerber	O
,	O
Excellon	O
,	O
Pick	O
and	O
Place	O
CSV	O
file	O
,	O
CSV-formatted	O
drill	O
chart	O
,	O
Bill	O
of	O
Materials	O
CSV	O
file	O
,	O
Altium	B-Algorithm
netlist	O
,	O
FreePCB	B-Application
netlist	O
,	O
PADS	O
Layout	O
Netlist	O
,	O
Spice	B-Protocol
netlist	O
.	O
</s>
<s>
JSON	O
Windows	B-Application
Linux	B-Application
Mac	B-Operating_System
ChromeOS	B-Operating_System
as	O
a	O
Web	B-Application
application	I-Application
NI	B-Algorithm
Ultiboard	I-Algorithm
and	O
Multisim	B-Algorithm
by	O
National	O
Instruments	O
Windows	B-Application
14.2	O
2019-05-19	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
en	O
MS*	O
,	O
MP*	O
,	O
EWB	O
,	O
Spice	B-Protocol
,	O
OrCAD	B-Algorithm
,	O
UltiCap	O
,	O
Protel	B-Algorithm
,	O
Gerber	O
,	O
DXF	O
,	O
Ultiboard	B-Algorithm
4&5	O
,	O
Calay	O
BOM	O
,	O
Gerber	O
,	O
Excellon	O
,	O
IGES	O
(	O
3D	O
)	O
,	O
DXF	O
(	O
2D	O
&	O
3D	O
)	O
,	O
SVG	O
Web	B-Application
application	I-Application
OrCAD	B-Algorithm
Windows	B-Application
17.4	O
-	O
22.1	O
2022-10-20	O
en	O
EAGLE	B-Language
,	O
PADS	O
,	O
Altium	B-Algorithm
,	O
STEP	O
,	O
DXF	O
,	O
IDF	O
,	O
IDX	O
,	O
OrCAD	B-Algorithm
SDT	O
,	O
OrCAD	B-Algorithm
Layout	O
,	O
OrCAD	B-Algorithm
PDF	O
,	O
Gerber	O
,	O
Gerber	O
X2	O
,	O
Excellon	O
drill/route	O
,	O
netlist	O
,	O
ODB++	O
,	O
DXF	O
,	O
IDF	O
,	O
IDX	O
,	O
STEP	O
,	O
3D	O
PDF	O
,	O
IPC2581	O
Tcl/TK	O
,	O
SKILL	O
(	O
Lisp	O
)	O
Proteus	B-Algorithm
by	O
Labcenter	B-Algorithm
Electronics	I-Algorithm
Ltd	I-Algorithm
Windows	B-Application
8.14	O
2022-04-01	O
en	O
Gerber	O
,	O
BMP	O
,	O
DXF	O
PDF	O
,	O
Gerber	O
,	O
GerberX2	O
,	O
Excellon	O
,	O
ODB++	O
,	O
DXF	O
,	O
IDF	O
,	O
PKP	O
,	O
testpoint	O
file	O
,	O
metafile	O
,	O
BMP	O
.	O
</s>
<s>
internal	O
script	O
Pulsonix	B-Algorithm
by	O
WestDev	B-Algorithm
Ltd	O
Windows	B-Application
12.0	O
2018-10-01	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
en	O
Allegro	O
,	O
Altium	B-Algorithm
,	O
CadStar	B-Algorithm
,	O
EAGLE	B-Language
,	O
OrCAD	B-Algorithm
,	O
PADS	O
,	O
P-CAD	O
,	O
Protel	B-Algorithm
,	O
Gerber	O
,	O
STEP	O
,	O
DXF	O
,	O
IDF	O
,	O
more	O
Gerber	O
,	O
Gerber	O
X2	O
,	O
Excellon	O
,	O
ODB++	O
,	O
IPC-2581	O
,	O
PDF	O
,	O
DXF	O
,	O
STEP	O
,	O
IDF	O
,	O
BOM	O
,	O
more	O
Proprietary	O
language	O
,	O
ActiveX	O
Wine	B-Application
TARGET	B-Algorithm
3001	I-Algorithm
!	I-Algorithm
</s>
<s>
Windows	B-Application
30.2.0.63	O
2020-12-14	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
en	O
,	O
de	O
,	O
fr	O
EAGLE	B-Language
,	O
DXF	O
,	O
Gerber	O
,	O
Gerber	O
,	O
Excellon	O
,	O
BMP	O
,	O
CXF	O
,	O
STEP	O
3D	O
Gerber	O
,	O
Gerber	O
X2	O
,	O
Excellon	O
,	O
EAGLE	B-Language
,	O
HPGL	O
,	O
G-Code	O
(	O
Milling	O
)	O
,	O
CXF	O
,	O
STEP	O
3D	O
,	O
Excel	O
BOMs	O
,	O
Pick&Place	O
,	O
GenCAD	O
,	O
FABmaster	O
,	O
IPC	O
D-356	O
,	O
Test	O
points	O
,	O
Netlists	O
,	O
OBJ	O
,	O
POV-Ray	B-Application
,	O
PDF	O
Package	O
generator	O
scripts	O
,	O
BOM	O
scripts	O
,	O
printing	O
and	O
PDF	O
generator	O
scripts	O
,	O
3D	O
scripts	O
Wine	B-Application
TINA	B-Algorithm
Windows	B-Application
12.0	O
2019-12	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
23	O
languages	O
(	O
en	O
,	O
de	O
,	O
fr	O
,	O
es	O
and	O
19	O
other	O
languages	O
)	O
VHDL	B-Language
,	O
Verilog	B-Language
,	O
Verilog-A	B-Language
,	O
and	O
Verilog-AMS	B-Language
VHDL	B-Language
,	O
Verilog	B-Language
,	O
Verilog-A	B-Language
,	O
and	O
Verilog-AMS	B-Language
Linux	B-Application
MacOS	B-Operating_System
Android	O
Upverter	O
POSIX	B-Operating_System
N/A	O
2019-05-10	O
rowspan	O
="3	O
"	O
rowspan	O
="3	O
"	O
rowspan	O
="3	O
"	O
en	O
Altium	B-Algorithm
,	O
OrCad	B-Algorithm
,	O
PDF	O
,	O
OpenJSON	O
,	O
EAGLE	B-Language
PDF	O
,	O
Gerber	O
,	O
Excellon	O
,	O
netlist	O
,	O
PADS	O
Layout	O
Netlist	O
,	O
Tempo	O
Automation	O
,	O
Pick	O
and	O
Place	O
CSV	O
,	O
High-Res	O
PNG	O
,	O
STL	O
,	O
CSV-formatted	O
drill	O
chart	O
,	O
CSV-formatted	O
list	O
of	O
all	O
parts	O
Windows	B-Application
Web	B-Application
application	I-Application
123D	B-Algorithm
Circuits	I-Algorithm
by	O
Autodesk	O
POSIX	B-Operating_System
N/A	O
rowspan	O
="3	O
"	O
,	O
+	O
breadboard	O
rowspan	O
="3	O
"	O
rowspan	O
="3	O
"	O
en	O
EAGLE	B-Language
Gerber	O
Windows	B-Application
Web	B-Application
application	I-Application
Application	O
and	O
developer	O
Platform	O
Latest	O
release	O
Schematic	O
?	O
</s>
<s>
Simulation	B-Language
?	O
</s>
<s>
Free	O
and	O
open-source	O
EDA	O
software	O
bundles	O
are	O
currently	O
under	O
fast	O
development	O
mainly	O
thanks	O
to	O
the	O
DARPA	O
and	O
Googles	B-Application
openROAD	O
project	O
.	O
</s>
<s>
The	O
flow	O
is	O
currently	O
utilized	O
to	O
submit	O
design	O
for	O
gratis	O
fabrication	O
at	O
Google	B-Application
.	I-Application
</s>
<s>
High-level	O
synthesis	O
software	O
can	O
generally	O
be	O
used	O
for	O
the	O
design	O
of	O
both	O
application-specific	O
integrated	O
circuits	O
(	O
ASICs	O
)	O
and	O
field-programmable	B-Architecture
gate	I-Architecture
arrays	I-Architecture
(	O
FPGAs	B-Architecture
)	O
.	O
</s>
<s>
Most	O
high-level	O
synthesis	O
software	O
is	O
used	O
to	O
edit	O
and	O
verify	O
code	O
written	O
in	O
one	O
of	O
the	O
mainstream	O
hardware	O
description	O
languages	O
(	O
HDL	O
)	O
like	O
VHDL	B-Language
or	O
Verilog	B-Language
.	O
</s>
<s>
Name	O
Architecture	O
License	O
Comment	O
Icarus	B-Application
Verilog	I-Application
*	B-Operating_System
BSD	I-Operating_System
,	O
Linux	B-Application
,	O
Mac	B-Operating_System
GPL-2.0-or-later	B-License
Verilog	B-Language
simulator	B-Language
Verilator	B-Application
Posix	B-Operating_System
LGPL-3.0-only	B-Application
or	O
Artistic-2.0	B-License
Verilator	B-Application
is	O
the	O
fastest	O
free	O
Verilog	B-Language
HDL	I-Language
simulator	B-Language
.	O
</s>
<s>
It	O
compiles	O
synthesizable	O
Verilog	B-Language
into	O
cycle	O
accurate	O
C++	O
or	O
SystemC	B-Language
code	O
following	O
2-state	O
synthesis	O
(	O
zero	O
delay	O
)	O
semantics	O
.	O
</s>
<s>
Benchmarks	O
reported	O
on	O
its	O
website	O
suggest	O
it	O
is	O
several	O
times	O
faster	O
than	O
commercial	O
event	O
driven	O
simulators	O
such	O
as	O
ModelSim	B-Algorithm
,	O
NC-Verilog	O
and	O
VCS	O
,	O
while	O
not	O
quite	O
as	O
fast	O
as	O
commercial	O
cycle	O
accurate	O
modeling	O
tools	O
such	O
as	O
Carbon	O
ModelStudio	O
and	O
ARC	O
VTOC	O
.	O
</s>
<s>
Name	O
Architecture	O
License	O
Autorouter	B-Algorithm
Comment	O
Electric	B-Algorithm
*	B-Operating_System
BSD	I-Operating_System
,	O
Java	B-Language
GPL-3.0-or-later	B-License
Yes	O
VLSI	O
circuit	O
design	O
tool	O
with	O
connectivity	O
at	O
all	O
levels	O
.	O
</s>
<s>
Name	O
Architecture	O
License	O
Comment	O
Gnucap	B-Algorithm
any	O
(	O
C++98	O
)	O
GPL-2.0-or-later	B-License
Mixed-signal	O
circuit	B-Language
simulator	I-Language
KTechLab	B-Language
Linux	B-Application
GPL	B-License
KTechLab	B-Language
is	O
a	O
schematic	O
capture	O
and	O
simulator	B-Language
.	O
</s>
<s>
It	O
is	O
specifically	O
geared	O
toward	O
mixed	O
signal	O
simulation	B-Language
of	O
analog	O
components	O
and	O
small	O
digital	O
processors	O
.	O
</s>
<s>
Ngspice	B-Algorithm
Linux	B-Application
,	O
Solaris	B-Application
,	O
Mac	B-Operating_System
,	O
NetBSD	B-Device
,	O
FreeBSD	B-Operating_System
,	O
Windows	B-Application
BSD-3-Clause	B-Operating_System
SPICE	B-Protocol
+	O
XSPICE	O
+	O
Cider	O
Oregano	B-Language
GPL-2.0-or-later	B-License
Schematic	O
capture	O
+	O
spice	B-Protocol
simulation	B-Language
Quite	B-Language
Universal	I-Language
Circuit	I-Language
Simulator	I-Language
(	O
QUCS	B-Language
)	O
Linux	B-Application
,	O
Solaris	B-Application
,	O
Mac	B-Operating_System
,	O
NetBSD	B-Device
,	O
FreeBSD	B-Operating_System
,	O
Windows	B-Application
GPL-2.0-or-later	B-License
Schematic	O
capture	O
+	O
Verilog	B-Language
+	O
VHDL	B-Language
+	O
simulation	B-Language
XCircuit	B-Application
Unix	B-Application
GPL	B-License
Used	O
to	O
produce	O
netlists	O
and	O
publish	O
high-quality	O
drawings	O
.	O
</s>
<s>
Name	O
Architecture	O
License	O
Autorouter	B-Algorithm
Imports	O
Exports	O
Scripting	O
support	O
Comment	O
FreePCBWindows	O
GPL	B-License
Yes	O
A	O
printed	O
circuit	O
board	O
design	O
program	O
for	O
Microsoft	B-Application
Windows	I-Application
.	O
</s>
<s>
FreePCB	B-Application
allows	O
for	O
up	O
to	O
16	O
copper	O
layers	O
,	O
both	O
metric	O
and	O
US	O
customary	O
units	O
,	O
and	O
export	O
of	O
designs	O
in	O
Gerber	O
format	O
.	O
</s>
<s>
Boards	O
can	O
be	O
partially	O
or	O
fully	O
autorouted	O
with	O
the	O
FreeRouting	O
autorouter	B-Algorithm
by	O
using	O
the	O
FpcROUTE	O
Specctra	B-Algorithm
DSN	O
design	O
file	O
translator	O
.	O
</s>
<s>
Fritzing	B-Language
Windows	B-Application
,	O
Mac	B-Operating_System
,	O
Linux	B-Application
GPL-3.0-or-later	B-License
Yes	O
gEDA	B-Application
symbols	O
,	O
KiCad	B-Language
symbols	O
,	O
SVG	O
Gerber	O
,	O
DIY	O
etching	O
,	O
BOM	O
,	O
SVG	O
,	O
PDF	O
,	O
EPS	O
Protoboard	O
view	O
,	O
schematic	O
view	O
,	O
PCB	O
view	O
,	O
Code	O
(	O
firmware	O
)	O
view	O
.	O
</s>
<s>
Includes	O
common	O
shaped	O
boards	O
like	O
Arduino	O
and	O
Raspberry	B-Operating_System
Pi	I-Operating_System
shields	O
.	O
</s>
<s>
gEDA	B-Application
*	B-Operating_System
BSD	I-Operating_System
,	O
Linux	B-Application
,	O
Mac	B-Operating_System
GPL-2.0-or-later	B-License
Yes	O
gschem	B-Application
netlists	O
,	O
image	O
as	O
background	O
Gerber	O
,	O
Excellon	O
,	O
SVG	O
,	O
PDF	O
,	O
EPS	O
,	O
PNG	O
,	O
GIF	O
,	O
JPEG	O
,	O
Specctra	B-Algorithm
,	O
XYRS	O
Guile	O
(	O
Scheme	O
)	O
schematic	O
,	O
simulation	B-Language
,	O
PCB	O
editor	O
,	O
gerber	O
view	O
KiCad	B-Language
Linux	B-Application
,	O
Mac	B-Operating_System
,	O
Windows	B-Application
GPL-3.0-or-later	B-License
FreeRouting	O
Altium	B-Algorithm
,	O
CadStar	B-Algorithm
,	O
EAGLE	B-Language
(	O
XML	O
)	O
,	O
P-CAD	O
,	O
Fabmaster	O
,	O
TinyCAD	O
net	O
lists	O
,	O
OrCAD	B-Algorithm
EDIF	O
PDF	O
,	O
Gerber	O
,	O
Gerber	O
X2	O
,	O
Excellon	O
,	O
netlist	O
,	O
VRML2	O
,	O
STEP	O
,	O
IDFv3	O
Python	O
Full	O
package	O
for	O
schematic	O
and	O
board	O
design	O
,	O
etc	O
.	O
</s>
