<s>
CompactPCI	B-Architecture
PlusIO	I-Architecture
is	O
an	O
extension	O
to	O
the	O
PICMG	O
2.0	O
CompactPCI	O
industrial	O
standard	O
for	O
modular	O
computer	O
systems	O
.	O
</s>
<s>
CompactPCI	B-Architecture
PlusIO	I-Architecture
was	O
officially	O
adopted	O
by	O
the	O
PCI	O
Industrial	O
Computer	O
Manufacturers	O
Group	O
PICMG	O
as	O
PICMG	O
2.30	O
CompactPCI	B-Architecture
PlusIO	I-Architecture
in	O
November	O
2009	O
.	O
</s>
<s>
Being	O
100%	O
compatible	O
with	O
CompactPCI	O
,	O
PICMG	O
2.30	O
defines	O
a	O
migration	O
path	O
to	O
the	O
future	O
CompactPCI	B-Architecture
Serial	I-Architecture
standard	O
.	O
</s>
<s>
It	O
defines	O
a	O
fixed	O
rear	O
I/O	O
pin	O
assignment	O
that	O
focuses	O
on	O
modern	O
,	O
fast	O
serial	O
point-to-point	B-Architecture
connections	I-Architecture
.	O
</s>
<s>
The	O
new	O
technology	O
succeeding	O
parallel	O
CompactPCI	O
comprises	O
both	O
CompactPCI	B-Architecture
Serial	I-Architecture
and	O
CompactPCI	B-Architecture
PlusIO	I-Architecture
.	O
</s>
<s>
A	O
true	O
rear	O
I/O	O
standard	O
,	O
however	O
,	O
exists	O
only	O
for	O
J3	O
–	O
through	O
the	O
PICMG	O
2.16	O
CompactPCI	O
Packet	O
Switching	O
Backplane	B-Architecture
specification	O
that	O
defines	O
Ethernet	O
interfaces	O
at	O
the	O
backplane	B-Architecture
of	O
6U	O
cards	O
.	O
</s>
<s>
Fast	O
serial	O
point-to-point	B-Architecture
connections	I-Architecture
have	O
become	O
the	O
state-of-the-art	O
technology	O
and	O
are	O
gradually	O
replacing	O
the	O
classic	O
bus	O
architecture	O
in	O
computers	O
.	O
</s>
<s>
Another	O
approach	O
to	O
realize	O
serial	O
high-speed	O
interfaces	O
were	O
so-called	O
switched	B-Architecture
fabrics	I-Architecture
,	O
which	O
used	O
additional	O
switches	O
and	O
bridges	O
to	O
connect	O
to	O
each	O
other	O
.	O
</s>
<s>
The	O
additional	O
PICMG	O
2.30	O
CompactPCI	B-Architecture
PlusIO	I-Architecture
specification	O
provides	O
this	O
connectivity	O
on	O
the	O
well-known	O
platform	O
of	O
CompactPCI	O
.	O
</s>
<s>
Through	O
these	O
serial	O
point-to-point	B-Architecture
connections	I-Architecture
,	O
CompactPCI	B-Architecture
PlusIO	I-Architecture
also	O
bridges	O
the	O
gap	O
between	O
parallel	O
CompactPCI	O
and	O
the	O
serial	O
CompactPCI	B-Architecture
Serial	I-Architecture
standard	O
.	O
</s>
<s>
PICMG	O
2.30	O
CompactPCI	B-Architecture
PlusIO	I-Architecture
standardizes	O
the	O
following	O
interfaces	O
at	O
the	O
rear	O
J2	O
connector	O
:	O
</s>
<s>
This	O
connector	O
supports	O
high	O
frequencies	O
of	O
5	O
Gbit/s	O
,	O
even	O
when	O
mated	O
with	O
the	O
CompactPCI-standard	O
unshielded	O
2-mm	O
hard-metric	O
headers	B-Protocol
.	O
</s>
<s>
The	O
matching	O
P2	O
backplane	B-Architecture
connector	O
remains	O
the	O
same	O
as	O
for	O
CompactPCI	O
,	O
as	O
do	O
the	O
J1/P1	O
connectors	O
.	O
</s>
<s>
In	O
all	O
,	O
CompactPCI	B-Architecture
PlusIO	I-Architecture
is	O
100%	O
compatible	O
with	O
legacy	O
32-bit	O
CompactPCI	O
in	O
3U	O
and	O
6U	O
format	O
(	O
single	O
and	O
double	O
Eurocards	O
)	O
.	O
</s>
<s>
At	O
the	O
same	O
time	O
,	O
its	O
serial	O
rear	O
I/O	O
connectivity	O
and	O
higher-speed	O
connector	O
form	O
a	O
bridge	O
towards	O
future	O
CompactPCI	B-Architecture
Serial	I-Architecture
system	O
architecture	O
.	O
</s>
<s>
Hybrid	O
backplanes	B-Architecture
support	O
several	O
cards	O
of	O
the	O
three	O
different	O
standards	O
PICMG	O
2.0	O
,	O
2.30	O
,	O
and	O
CPCI-S.0	O
.	O
</s>
