<s>
Transmeta	O
Corporation	O
was	O
an	O
American	O
fabless	B-Algorithm
semiconductor	I-Algorithm
company	I-Algorithm
based	O
in	O
Santa	O
Clara	O
,	O
California	O
.	O
</s>
<s>
It	O
developed	O
low	O
power	O
x86	B-Operating_System
compatible	I-Operating_System
microprocessors	B-Architecture
based	O
on	O
a	O
VLIW	B-General_Concept
core	O
and	O
a	O
software	O
layer	O
called	O
Code	B-Application
Morphing	I-Application
Software	I-Application
.	O
</s>
<s>
Code	B-Application
Morphing	I-Application
Software	I-Application
(	O
CMS	O
)	O
consisted	O
of	O
an	O
interpreter	B-Application
,	O
a	O
runtime	B-Device
system	I-Device
and	O
a	O
dynamic	O
binary	O
translator	O
.	O
</s>
<s>
x86	B-Operating_System
instructions	O
were	O
first	O
interpreted	O
one	O
instruction	O
at	O
a	O
time	O
and	O
profiled	O
,	O
then	O
depending	O
upon	O
the	O
frequency	O
of	O
execution	O
of	O
a	O
code	O
block	O
,	O
CMS	O
would	O
progressively	O
generate	O
more	O
optimized	O
translations	O
.	O
</s>
<s>
The	O
VLIW	B-General_Concept
core	O
implemented	O
features	O
specifically	O
designed	O
to	O
accelerate	O
CMS	O
and	O
translations	O
.	O
</s>
<s>
Among	O
the	O
features	O
were	O
support	O
for	O
general	O
speculation	O
,	O
detection	O
of	O
memory	O
aliasing	O
and	O
detection	O
of	O
self	O
modifying	O
x86	B-Operating_System
code	O
.	O
</s>
<s>
The	O
combination	O
of	O
CMS	O
and	O
the	O
VLIW	B-General_Concept
core	O
allowed	O
for	O
the	O
achievement	O
of	O
full	O
x86	B-Operating_System
compatibility	O
while	O
maintaining	O
performance	O
and	O
reducing	O
power	O
consumption	O
.	O
</s>
<s>
Its	O
first	O
product	O
,	O
the	O
Crusoe	B-General_Concept
processor	O
,	O
was	O
launched	O
on	O
January	O
19	O
,	O
2000	O
.	O
</s>
<s>
On	O
October	O
14	O
,	O
2003	O
,	O
it	O
launched	O
its	O
second	O
major	O
product	O
,	O
the	O
Efficeon	B-General_Concept
processor	O
.	O
</s>
<s>
In	O
2005	O
,	O
Transmeta	O
increased	O
its	O
focus	O
on	O
licensing	O
its	O
portfolio	O
of	O
microprocessor	B-Architecture
and	O
semiconductor	O
technologies	O
.	O
</s>
<s>
Transmeta	O
produced	O
two	O
x86	B-Operating_System
compatible	I-Operating_System
CPU	B-General_Concept
architectures	I-General_Concept
:	O
Crusoe	B-General_Concept
and	O
Efficeon	B-General_Concept
–	O
internal	O
code	O
names	O
were	O
'	O
Fred	O
 '	O
and	O
'	O
Astro	O
 '	O
.	O
</s>
<s>
These	O
CPUs	O
have	O
appeared	O
in	O
subnotebooks	B-Device
,	O
notebooks	B-Device
,	O
desktops	B-Device
,	O
blade	B-Architecture
servers	I-Architecture
,	O
tablet	B-Device
PCs	I-Device
,	O
a	O
personal	O
cluster	O
computer	O
,	O
and	O
a	O
silent	O
desktop	O
,	O
where	O
low	O
power	O
consumption	O
and	O
heat	O
dissipation	O
are	O
of	O
primary	O
importance	O
.	O
</s>
<s>
Nvidia	O
(	O
with	O
non-exclusive	O
license	O
to	O
Transmeta	O
's	O
LongRun	B-Device
and	O
LongRun2	B-Device
technologies	O
and	O
other	O
intellectual	O
property	O
)	O
,	O
</s>
<s>
Sony	O
(	O
LongRun2	B-Device
licensee	O
)	O
,	O
</s>
<s>
and	O
NEC	O
(	O
LongRun2	B-Device
licensee	O
)	O
.	O
</s>
<s>
On	O
January	O
19	O
,	O
2000	O
,	O
Transmeta	O
is	O
going	O
to	O
announce	O
and	O
demonstrate	O
what	O
Crusoe	B-General_Concept
processors	O
can	O
do	O
.	O
</s>
<s>
Crusoe	B-General_Concept
will	O
be	O
cool	O
hardware	O
and	O
software	O
for	O
mobile	O
applications	O
.	O
</s>
<s>
Crusoe	B-General_Concept
will	O
be	O
unconventional	O
,	O
which	O
is	O
why	O
we	O
wanted	O
to	O
let	O
you	O
know	O
in	O
advance	O
to	O
come	O
look	O
at	O
the	O
entire	O
Web	O
site	O
in	O
January	O
,	O
so	O
that	O
you	O
can	O
get	O
the	O
full	O
story	O
and	O
have	O
access	O
to	O
all	O
of	O
the	O
real	O
details	O
as	O
soon	O
as	O
they	O
are	O
available	O
.	O
</s>
<s>
Information	O
gradually	O
came	O
out	O
of	O
the	O
company	O
suggesting	O
it	O
was	O
working	O
on	O
a	O
very	B-General_Concept
long	I-General_Concept
instruction	I-General_Concept
word	I-General_Concept
(	O
VLIW	B-General_Concept
)	O
design	O
that	O
translated	O
x86	B-Operating_System
code	O
into	O
its	O
own	O
native	O
VLIW	B-General_Concept
code	O
.	O
</s>
<s>
On	O
January	O
19	O
,	O
2000	O
,	O
Transmeta	O
held	O
a	O
launch	O
event	O
at	O
Villa	O
Montalvo	O
in	O
Saratoga	O
,	O
California	O
and	O
announced	O
to	O
the	O
world	O
that	O
it	O
had	O
been	O
working	O
on	O
an	O
x86	B-Operating_System
compatible	I-Operating_System
dynamic	O
binary	O
translation	O
processor	O
named	O
Crusoe	B-General_Concept
.	O
</s>
<s>
Transmeta	O
marketed	O
their	O
microprocessor	B-Architecture
technology	O
as	O
extraordinarily	O
innovative	O
and	O
revolutionary	O
in	O
the	O
low-power	O
market	O
segment	O
.	O
</s>
<s>
They	O
had	O
hoped	O
to	O
be	O
both	O
power	O
and	O
performance	O
leaders	O
in	O
the	O
x86	B-Operating_System
space	O
but	O
initial	O
reviews	O
of	O
Crusoe	B-General_Concept
indicated	O
the	O
performance	O
fell	O
significantly	O
short	O
of	O
projections	O
.	O
</s>
<s>
Also	O
,	O
while	O
Crusoe	B-General_Concept
was	O
in	O
development	O
,	O
Intel	O
and	O
AMD	O
significantly	O
ramped	O
up	O
speeds	O
and	O
began	O
to	O
address	O
concerns	O
about	O
power	O
consumption	O
.	O
</s>
<s>
So	O
Crusoe	B-General_Concept
was	O
rapidly	O
cornered	O
into	O
a	O
low-volume	O
,	O
small	O
form	O
factor	O
(	O
SFF	O
)	O
,	O
low-power	O
segment	O
of	O
the	O
market	O
.	O
</s>
<s>
Their	O
opening	O
day	O
performance	O
would	O
not	O
be	O
surpassed	O
until	O
Google	B-Application
’s	O
IPO	O
in	O
2004	O
.	O
</s>
<s>
On	O
October	O
14	O
,	O
2003	O
,	O
Transmeta	O
announced	O
the	O
Efficeon	B-General_Concept
processor	O
which	O
was	O
claimed	O
to	O
have	O
twice	O
the	O
performance	O
of	O
the	O
original	O
Crusoe	B-General_Concept
CPU	O
at	O
the	O
same	O
frequency	O
.	O
</s>
<s>
Sony	O
was	O
reported	O
to	O
be	O
a	O
key	O
licensee	O
of	O
Transmeta	O
technology	O
and	O
approximately	O
half	O
of	O
the	O
remaining	O
employees	O
were	O
to	O
work	O
on	O
LongRun2	B-Device
power	O
optimization	O
technology	O
for	O
Sony	O
.	O
</s>
<s>
As	O
it	O
turned	O
out	O
,	O
this	O
was	O
a	O
secure	O
platform	O
under	O
the	O
AMD	O
brand	O
for	O
Microsoft	O
's	O
FlexGo	B-Device
program	O
.	O
</s>
<s>
The	O
complaint	O
charged	O
that	O
Intel	O
had	O
infringed	O
and	O
was	O
infringing	O
Transmeta	O
's	O
patents	O
by	O
making	O
and	O
selling	O
a	O
variety	O
of	O
microprocessor	B-Architecture
products	O
,	O
including	O
at	O
least	O
Intel	O
's	O
Pentium	O
III	O
,	O
Pentium	B-General_Concept
4	I-General_Concept
,	O
Pentium	B-Architecture
M	I-Architecture
,	O
Core	O
and	O
Core	O
2	O
product	O
line	O
.	O
</s>
<s>
Transmeta	O
also	O
agreed	O
to	O
never	O
manufacture	O
x86	B-Operating_System
compatible	I-Operating_System
processors	O
again	O
.	O
</s>
<s>
On	O
August	O
8	O
,	O
2008	O
,	O
Transmeta	O
announced	O
that	O
it	O
had	O
licensed	O
its	O
LongRun	B-Device
and	O
low	O
power	O
chip	O
technologies	O
to	O
Nvidia	O
for	O
a	O
one	O
time	O
license	O
fee	O
of	O
$25	O
million	O
.	O
</s>
<s>
Among	O
its	O
crew	O
of	O
technologists	O
,	O
Transmeta	O
employed	O
some	O
of	O
the	O
industry	O
's	O
more	O
public	O
figures	O
including	O
Linux	B-Application
founder	O
Linus	O
Torvalds	O
,	O
Linux	B-Application
kernel	O
developer	O
Hans	O
Peter	O
Anvin	O
,	O
</s>
<s>
Yacc	B-Application
author	O
Stephen	O
C	O
.	O
Johnson	O
,	O
</s>
<s>
Crusoe	B-General_Concept
was	O
the	O
first	O
family	O
of	O
microprocessors	B-Architecture
from	O
Transmeta	O
,	O
named	O
after	O
the	O
literary	O
character	O
Robinson	O
Crusoe	B-General_Concept
.	O
</s>
<s>
First	O
,	O
the	O
Code	B-Application
Morphing	I-Application
Software	I-Application
(	O
CMS	O
)	O
combined	O
with	O
cache	O
architecture	O
artificially	O
inflated	O
comparisons	O
between	O
benchmarks	O
and	O
real-world	O
applications	O
.	O
</s>
<s>
The	O
CMS	O
software	O
overhead	O
may	O
have	O
actually	O
been	O
a	O
key	O
cause	O
of	O
much	O
lower	O
performance	O
for	O
many	O
real-world	O
applications	O
;	O
the	O
simple	O
VLIW	B-General_Concept
core	O
architecture	O
could	O
not	O
compete	O
on	O
computationally	O
intensive	O
applications	O
;	O
and	O
the	O
southbridge	B-Device
interface	O
was	O
limited	O
by	O
its	O
low	O
bandwidth	O
for	O
graphics	O
or	O
other	O
I/O	O
-intensive	O
applications	O
.	O
</s>
<s>
Some	O
standard	O
benchmarks	O
even	O
failed	O
to	O
run	O
,	O
throwing	O
the	O
claim	O
of	O
full	O
x86	B-Operating_System
compatibility	O
into	O
doubt	O
.	O
</s>
<s>
The	O
Efficeon	B-General_Concept
processor	O
was	O
Transmeta	O
's	O
second-generation	O
256-bit	O
VLIW	B-General_Concept
processor	B-General_Concept
design	I-General_Concept
.	O
</s>
<s>
Like	O
the	O
Crusoe	B-General_Concept
(	O
a	O
128-bit	O
VLIW	B-General_Concept
architecture	O
)	O
,	O
Efficeon	B-General_Concept
stressed	O
computational	O
efficiency	O
,	O
low	O
power	O
consumption	O
,	O
and	O
a	O
low	O
thermal	O
footprint	O
.	O
</s>
<s>
A	O
2004-model	O
1.6-GHz	O
Transmeta	B-General_Concept
Efficeon	I-General_Concept
(	O
manufactured	O
using	O
a	O
90	O
nm	O
process	O
)	O
had	O
roughly	O
the	O
same	O
performance	O
and	O
power	O
characteristics	O
as	O
a	O
1.6-GHz	O
Intel	B-Device
Atom	I-Device
from	O
2008	O
(	O
manufactured	O
using	O
a	O
45	B-Algorithm
nm	I-Algorithm
process	I-Algorithm
)	O
.	O
</s>
<s>
The	O
Efficeon	B-General_Concept
included	O
an	O
integrated	O
Northbridge	B-Device
,	O
while	O
the	O
competing	O
Atom	B-Device
required	O
an	O
external	O
Northbridge	B-Device
chip	I-Device
,	O
reducing	O
much	O
of	O
the	O
Atom	B-Device
's	O
power	O
consumption	O
benefits	O
.	O
</s>
<s>
The	O
Transmeta	B-General_Concept
Efficeon	I-General_Concept
processor	O
addressed	O
many	O
of	O
Crusoe	B-General_Concept
's	O
shortcomings	O
and	O
showed	O
roughly	O
a	O
2x	O
real-world	O
improvement	O
over	O
Crusoe	B-General_Concept
.	O
</s>
<s>
Its	O
die	O
was	O
considerably	O
smaller	O
than	O
Pentium	B-General_Concept
4	I-General_Concept
and	O
Pentium	B-Architecture
M	I-Architecture
,	O
when	O
compared	O
in	O
the	O
same	O
process	O
technology	O
.	O
</s>
<s>
Efficeon	B-General_Concept
's	O
die	O
fabricated	O
in	O
90nm	O
is	O
68mm²	O
,	O
which	O
is	O
60%	O
of	O
the	O
Pentium	B-General_Concept
4	I-General_Concept
in	O
90nm	O
,	O
at	O
112mm²	O
,	O
with	O
both	O
processors	O
possessing	O
a	O
1	O
MB	O
L2	O
cache	O
.	O
</s>
<s>
The	O
notion	O
of	O
selling	O
a	O
product	O
into	O
a	O
specific	O
thermal	B-General_Concept
envelope	I-General_Concept
was	O
typically	O
not	O
understood	O
by	O
the	O
mass	O
of	O
reviewers	O
,	O
who	O
tended	O
to	O
compare	O
Efficeon	B-General_Concept
to	O
the	O
gamut	O
of	O
x86	B-Operating_System
microprocessors	I-Operating_System
,	O
regardless	O
of	O
power	O
consumption	O
or	O
application	O
.	O
</s>
<s>
One	O
such	O
example	O
of	O
this	O
criticism	O
suggests	O
the	O
performance	O
still	O
significantly	O
lagged	O
behind	O
Intel	O
's	O
Pentium	B-Architecture
M	I-Architecture
(	O
Banias	O
)	O
and	O
AMD	O
's	O
Mobile	O
Athlon	O
XP	O
.	O
</s>
<s>
Transmeta	O
processors	O
were	O
in-order	O
very	B-General_Concept
long	I-General_Concept
instruction	I-General_Concept
word	I-General_Concept
(	O
VLIW	B-General_Concept
)	O
cores	O
running	O
a	O
special	O
dynamic	O
binary	O
translation	O
software	O
layer	O
which	O
together	O
implemented	O
compatibility	O
with	O
the	O
x86	B-Operating_System
architecture	I-Operating_System
.	O
</s>
<s>
Transmeta	O
trademarked	O
the	O
term	O
"	O
Code	O
Morphing	O
"	O
to	O
describe	O
their	O
technology	O
and	O
referred	O
to	O
the	O
software	O
layer	O
as	O
Code	B-Application
Morphing	I-Application
Software	I-Application
(	O
CMS	O
)	O
.	O
</s>
<s>
(	O
A	O
similar	O
technology	O
was	O
used	O
in	O
XScale	B-Application
processors	O
.	O
)	O
</s>
<s>
Code	B-Application
Morphing	I-Application
Software	I-Application
(	O
CMS	O
)	O
is	O
the	O
technology	O
used	O
by	O
Transmeta	O
microprocessors	B-Architecture
to	O
execute	O
x86	B-Operating_System
instructions	O
.	O
</s>
<s>
In	O
broad	O
view	O
,	O
CMS	O
reads	O
x86	B-Operating_System
instructions	O
and	O
generates	O
instructions	O
for	O
a	O
proprietary	O
VLIW	B-General_Concept
processor	O
,	O
in	O
the	O
style	O
of	O
Shade	O
.	O
</s>
<s>
CMS	O
also	O
contains	O
an	O
interpreter	B-Application
and	O
simulates	O
both	O
user-mode	O
and	O
system	O
mode	O
operation	O
.	O
</s>
<s>
Code	B-Application
Morphing	I-Application
Software	I-Application
consisted	O
of	O
an	O
interpreter	B-Application
,	O
a	O
runtime	B-Device
system	I-Device
and	O
a	O
dynamic	O
binary	O
translator	O
.	O
</s>
<s>
x86	B-Operating_System
instructions	O
were	O
first	O
interpreted	O
one	O
instruction	O
at	O
a	O
time	O
and	O
profiled	O
,	O
then	O
depending	O
upon	O
the	O
frequency	O
of	O
execution	O
and	O
other	O
heuristics	B-Algorithm
,	O
CMS	O
would	O
progressively	O
generate	O
more	O
optimized	O
translations	O
.	O
</s>
<s>
Similar	O
technologies	O
existed	O
in	O
the	O
1990s	O
:	O
Wabi	B-General_Concept
for	O
Solaris	B-Application
and	O
Linux	B-Application
,	O
FX	B-Device
!	I-Device
32	I-Device
for	O
Alpha	B-Device
and	O
IA-32	B-Device
EL	I-Device
for	O
Itanium	B-General_Concept
,	O
open-source	O
DAISY	O
,	O
the	O
Mac	B-Device
68K	I-Device
emulator	I-Device
for	O
the	O
PowerPC	B-Architecture
.	O
</s>
<s>
The	O
Transmeta	O
approach	O
set	O
a	O
much	O
higher	O
bar	O
for	O
x86	B-Operating_System
compatibility	O
due	O
to	O
its	O
ability	O
to	O
execute	O
all	O
x86	B-Operating_System
instructions	O
from	O
initial	O
boot	O
up	O
to	O
the	O
latest	O
multimedia	O
instructions	O
.	O
</s>
<s>
The	O
operation	O
of	O
Transmeta	O
's	O
code	B-Application
morphing	I-Application
software	I-Application
is	O
similar	O
to	O
the	O
final	O
optimization	O
pass	O
of	O
a	O
conventional	O
compiler	O
.	O
</s>
<s>
Considering	O
a	O
fragment	O
of	O
32-bit	O
x86	B-Operating_System
code	O
:	O
</s>
<s>
The	O
optimizer	O
then	O
eliminates	O
common	O
sub-expressions	O
and	O
unnecessary	O
condition	O
code	O
operations	O
and	O
,	O
potentially	O
,	O
applies	O
other	O
optimizations	O
such	O
as	O
loop	B-Operating_System
unrolling	I-Operating_System
:	O
</s>
<s>
These	O
two	O
VLIW	B-General_Concept
molecules	O
could	O
potentially	O
execute	O
in	O
fewer	O
cycles	O
than	O
the	O
original	O
instructions	O
could	O
on	O
an	O
x86	B-Operating_System
processor	O
.	O
</s>
<s>
As	O
the	O
market	O
leaders	O
Intel	O
and/or	O
AMD	O
would	O
extend	O
the	O
core	O
x86	B-Operating_System
instruction	O
set	O
,	O
Transmeta	O
could	O
quickly	O
upgrade	O
their	O
product	O
with	O
a	O
software	O
upgrade	O
rather	O
than	O
requiring	O
a	O
respin	O
of	O
their	O
hardware	O
.	O
</s>
<s>
It	O
would	O
be	O
relatively	O
simple	O
to	O
fix	O
hardware	B-General_Concept
design	I-General_Concept
or	O
manufacturing	O
flaws	O
in	O
the	O
hardware	O
using	O
software	O
workarounds	B-Application
.	O
</s>
<s>
More	O
time	O
could	O
be	O
spent	O
concentrating	O
on	O
enhancing	O
the	O
capabilities	O
of	O
the	O
core	O
or	O
reducing	O
its	O
power	O
consumption	O
without	O
worrying	O
about	O
33	B-Device
years	I-Device
of	I-Device
backward	I-Device
compatibility	I-Device
to	O
the	O
x86	B-Operating_System
architecture	I-Operating_System
.	O
</s>
<s>
(	O
At	O
its	O
initial	O
Crusoe	B-General_Concept
launch	O
,	O
Transmeta	O
demonstrated	O
pico-Java	B-Language
and	O
x86	B-Operating_System
running	O
intermixed	O
on	O
the	O
native	O
hardware	O
.	O
)	O
</s>
<s>
Prior	O
to	O
Crusoe	B-General_Concept
's	O
release	O
,	O
rumors	O
indicated	O
Transmeta	O
was	O
relying	O
on	O
these	O
benefits	O
to	O
develop	O
a	O
hybrid	O
PowerPC	B-Architecture
and	O
x86	B-Operating_System
processor	O
.	O
</s>
<s>
But	O
Transmeta	O
would	O
initially	O
concentrate	O
solely	O
on	O
the	O
extremely	O
low-power	O
x86	B-Operating_System
market	O
.	O
</s>
<s>
The	O
ability	O
to	O
quickly	O
update	O
products	O
without	O
a	O
hardware	O
respin	O
was	O
demonstrated	O
in	O
2002	O
with	O
an	O
in-the-field	O
upgrade	O
(	O
a	O
download	O
)	O
to	O
enhance	O
CPU	O
performance	O
of	O
the	O
Crusoe	B-General_Concept
based	O
HP	B-Device
Compaq	I-Device
TC1000	I-Device
tablet	B-Device
PC	I-Device
.	O
</s>
<s>
It	O
was	O
used	O
again	O
in	O
2004	O
when	O
NX	B-General_Concept
bit	I-General_Concept
and	O
SSE3	B-General_Concept
support	O
were	O
added	O
to	O
the	O
Transmeta	B-General_Concept
Efficeon	I-General_Concept
product	O
line	O
without	O
requiring	O
hardware	O
changes	O
.	O
</s>
<s>
In	O
conjunction	O
with	O
its	O
code-morphing	O
software	O
the	O
Efficeon	B-General_Concept
most	O
closely	O
mirrors	O
the	O
feature	O
set	O
of	O
Intel	B-General_Concept
Pentium	I-General_Concept
4	I-General_Concept
processors	O
,	O
although	O
,	O
like	O
AMD	B-General_Concept
Opteron	I-General_Concept
processors	O
,	O
it	O
supports	O
a	O
fully	O
integrated	B-General_Concept
memory	I-General_Concept
controller	I-General_Concept
,	O
a	O
HyperTransport	B-Device
IO	O
bus	O
,	O
and	O
the	O
NX	B-General_Concept
bit	I-General_Concept
,	O
or	O
no-execute	O
x86	B-Operating_System
extension	O
to	O
PAE	B-General_Concept
mode	I-General_Concept
.	O
</s>
<s>
NX	B-General_Concept
bit	I-General_Concept
support	O
is	O
available	O
starting	O
with	O
CMS	O
version	O
6.0.4	O
.	O
</s>
<s>
Efficeon	B-General_Concept
's	O
computational	O
performance	O
relative	O
to	O
mobile	O
CPUs	O
like	O
the	O
Intel	B-Architecture
Pentium	I-Architecture
M	I-Architecture
is	O
thought	O
to	O
be	O
lower	O
,	O
although	O
little	O
appears	O
to	O
be	O
published	O
about	O
the	O
relative	O
performance	O
of	O
these	O
competing	O
processors	O
.	O
</s>
<s>
Efficeon	B-General_Concept
came	O
in	O
two	O
package	O
types	O
:	O
a	O
783	O
-	O
and	O
a	O
592-contact	O
ball	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
.	O
</s>
<s>
Internally	O
,	O
the	O
Efficeon	B-General_Concept
had	O
two	O
arithmetic	B-General_Concept
logic	I-General_Concept
units	I-General_Concept
,	O
two	O
load/store/add	O
units	O
,	O
two	O
execute	O
units	O
,	O
two	O
floating-point/MMX/SSE/SSE2	O
units	O
,	O
one	O
branch	B-General_Concept
prediction	I-General_Concept
unit	I-General_Concept
,	O
one	O
alias	O
unit	O
,	O
and	O
one	O
control	O
unit	O
.	O
</s>
<s>
The	O
VLIW	B-General_Concept
core	O
could	O
execute	O
a	O
256-bit	O
VLIW	B-General_Concept
instruction	O
per	O
cycle	O
.	O
</s>
<s>
A	O
VLIW	B-General_Concept
is	O
called	O
a	O
molecule	O
and	O
has	O
room	O
to	O
store	O
eight	O
32-bit	O
instructions	O
(	O
called	O
atoms	O
)	O
per	O
cycle	O
.	O
</s>
<s>
The	O
Efficeon	B-General_Concept
had	O
a	O
128-KB	O
L1	O
instruction	O
cache	O
,	O
a	O
64-KB	O
L1	O
data	O
cache	O
and	O
a	O
1-MB	O
L2	O
cache	O
.	O
</s>
<s>
Additionally	O
,	O
Efficeon	B-General_Concept
code	B-Application
morphing	I-Application
software	I-Application
(	O
CMS	O
)	O
reserved	O
a	O
small	O
portion	O
of	O
main	O
memory	O
(	O
typically	O
32	O
MB	O
)	O
for	O
its	O
cache	O
of	O
dynamically	O
translated	O
x86	B-Operating_System
instructions	O
.	O
</s>
<s>
In	O
principle	O
,	O
it	O
should	O
be	O
possible	O
to	O
optimize	O
x86	B-Operating_System
code	O
to	O
favor	O
Code	B-Application
Morphing	I-Application
Software	I-Application
,	O
or	O
even	O
for	O
compilers	O
to	O
target	O
the	O
native	O
VLIW	B-General_Concept
architecture	O
directly	O
.	O
</s>
<s>
Subsequent	O
reverse	O
engineering	O
,	O
published	O
in	O
2004	O
,	O
clarifies	O
some	O
details	O
of	O
the	O
native	O
VLIW	B-General_Concept
architecture	O
and	O
associated	O
instruction	O
set	O
,	O
and	O
suggests	O
that	O
there	O
are	O
fundamental	O
limitations	O
that	O
preclude	O
porting	O
an	O
operating	O
system	O
such	O
as	O
Linux	B-Application
to	O
it	O
.	O
</s>
