<s>
Clarkdale	B-Device
is	O
the	O
codename	O
for	O
Intel	O
's	O
first-generation	O
Core	B-Device
i5	I-Device
,	O
i3	B-Device
and	O
Pentium	B-Device
dual-core	I-Device
desktop	O
processors	O
.	O
</s>
<s>
It	O
is	O
closely	O
related	O
to	O
the	O
mobile	O
Arrandale	O
processor	O
;	O
both	O
use	O
dual-core	O
dies	O
based	O
on	O
the	O
32	B-Algorithm
nm	I-Algorithm
Westmere	B-Device
microarchitecture	B-General_Concept
and	O
have	O
integrated	O
Graphics	O
,	O
PCI	O
Express	O
and	O
DMI	B-Architecture
links	O
built-in	O
.	O
</s>
<s>
Clarkdale	B-Device
is	O
the	O
successor	O
of	O
the	O
Wolfdale	B-Device
used	O
in	O
desktop	O
Intel	B-Device
Core	I-Device
2	I-Device
,	O
Celeron	B-Device
and	O
Pentium	B-Device
Dual-Core	I-Device
processors	O
.	O
</s>
<s>
Unlike	O
its	O
predecessor	O
,	O
Clarkdale	B-Device
already	O
contains	O
the	O
major	O
north	B-Device
bridge	I-Device
components	O
,	O
such	O
as	O
memory	B-General_Concept
controller	I-General_Concept
,	O
PCI	O
Express	O
for	O
external	O
graphics	O
,	O
integrated	O
graphics	O
and	O
the	O
DMI	B-Architecture
connector	O
,	O
making	O
it	O
possible	O
to	O
build	O
more	O
compact	O
systems	O
without	O
a	O
separate	O
north	B-Device
bridge	I-Device
or	O
discrete	O
graphics	O
like	O
Lynnfield	B-Device
.	O
</s>
<s>
The	O
Clarkdale	B-Device
processor	O
package	O
contains	O
two	O
dies	O
:	O
the	O
32nm	B-Algorithm
processor	O
die	O
with	O
the	O
I/O	O
connections	O
,	O
and	O
the	O
45nm	O
graphics	O
and	O
integrated	B-General_Concept
memory	I-General_Concept
controller	I-General_Concept
die	O
.	O
</s>
<s>
Physical	O
separation	O
of	O
the	O
processor	O
die	O
and	O
memory	B-General_Concept
controller	I-General_Concept
die	O
resulted	O
in	O
increased	O
memory	O
latency	O
.	O
</s>
<s>
The	O
CPUID	B-Architecture
for	O
Clarkdale	B-Device
is	O
family	O
6	O
,	O
model	O
37	O
(	O
2065x	O
)	O
.	O
</s>
<s>
The	O
mobile	O
equivalent	O
of	O
Clarkdale	B-Device
is	O
Arrandale	O
.	O
</s>
<s>
Clarkdale	B-Device
processors	O
are	O
sold	O
under	O
the	O
Intel	B-Device
Core	I-Device
,	O
Pentium	B-General_Concept
and	O
Celeron	B-Device
brand	O
names	O
,	O
with	O
varying	O
feature	O
sets	O
.	O
</s>
<s>
The	O
Core	B-Device
i5	I-Device
versions	O
generally	O
have	O
all	O
features	O
enabled	O
,	O
with	O
the	O
Core	O
i5-661	O
and	O
Core	O
i5-655K	O
models	O
lacking	O
Intel	O
VT-d	O
and	O
TXT	B-Device
like	O
the	O
Core	B-Device
i3	I-Device
,	O
which	O
also	O
does	O
not	O
support	O
Turbo	B-Device
Boost	I-Device
and	O
AES	B-Algorithm
new	I-Algorithm
instructions	I-Algorithm
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
Pentium	B-General_Concept
and	O
Celeron	B-Device
versions	O
do	O
not	O
have	O
SMT	B-Operating_System
,	O
and	O
they	O
can	O
only	O
use	O
a	O
reduced	O
amount	O
of	O
third-level	O
cache	B-General_Concept
.	O
</s>
<s>
The	O
Xeon	B-Device
L340x	O
line	O
has	O
a	O
lower	O
clock	O
frequency	O
and	O
thermal	B-General_Concept
design	I-General_Concept
power	I-General_Concept
,	O
and	O
supports	O
unbuffered	O
ECC	B-General_Concept
memory	I-General_Concept
in	O
addition	O
to	O
the	O
features	O
of	O
the	O
Core	O
i5-6xx	O
,	O
but	O
has	O
support	O
for	O
the	O
integrated	O
graphics	O
disabled	O
.	O
</s>
<s>
Importantly	O
,	O
although	O
the	O
memory	B-General_Concept
controller	I-General_Concept
in	O
Clarkdale	B-Device
processors	O
is	O
on-package	O
,	O
it	O
is	O
on	O
a	O
separate	O
die	O
from	O
the	O
CPU	O
cores	O
,	O
and	O
thus	O
has	O
increased	O
latency	O
compared	O
to	O
processor	B-General_Concept
architectures	I-General_Concept
which	O
integrate	O
it	O
on-die	O
with	O
the	O
main	O
CPU	O
cores	O
.	O
</s>
