<s>
IBM	O
designed	O
the	O
PowerXCell	O
8i	O
for	O
use	O
in	O
the	O
Roadrunner	B-General_Concept
supercomputer	I-General_Concept
.	O
</s>
<s>
This	O
document	O
includes	O
a	O
photograph	O
of	O
the	O
2.54	O
×	O
5.81mm	O
SPE	O
,	O
as	O
implemented	O
in	O
90-nm	O
SOI	B-Algorithm
.	O
</s>
<s>
The	O
chips	O
produced	O
there	O
are	O
apparently	O
only	O
for	O
IBMs	O
own	O
Cell	O
blade	B-Architecture
servers	I-Architecture
,	O
which	O
were	O
the	O
first	O
to	O
get	O
the	O
65nm	O
Cells	O
.	O
</s>
<s>
This	O
version	O
was	O
not	O
yet	O
the	O
long-rumoured	O
"	O
Cell+	O
"	O
with	O
enhanced	O
Double	O
Precision	O
floating	O
point	O
performance	O
,	O
which	O
first	O
saw	O
the	O
light	O
of	O
day	O
mid-2008	O
in	O
the	O
Roadrunner	B-General_Concept
supercomputer	I-General_Concept
in	O
the	O
form	O
of	O
QS22	O
PowerXCell	O
blades	O
.	O
</s>
<s>
Although	O
IBM	O
talked	O
about	O
and	O
even	O
showed	O
higher-clocked	O
Cells	O
before	O
,	O
clock	O
speed	O
has	O
remained	O
constant	O
at	O
3.2GHz	O
,	O
even	O
for	O
the	O
double	O
precision	O
enabled	O
"	O
Cell+	O
"	O
of	O
the	O
Roadrunner	B-General_Concept
.	O
</s>
<s>
PowerXCell	O
clusters	O
even	O
best	O
IBMs	O
Blue	B-Operating_System
Gene	I-Operating_System
clusters	O
(	O
371MFLOPS/watt	O
)	O
,	O
which	O
are	O
far	O
more	O
power-efficient	O
already	O
than	O
clusters	O
made	O
up	O
of	O
conventional	O
CPUs	O
(	O
265MFLOPS/watt	O
and	O
lower	O
)	O
.	O
</s>
