<s>
Catapult	B-Algorithm
C	I-Algorithm
Synthesis	O
,	O
a	O
commercial	O
electronic	O
design	O
automation	O
product	O
of	O
Mentor	O
Graphics	O
,	O
is	O
a	O
high-level	B-General_Concept
synthesis	I-General_Concept
tool	O
,	O
sometimes	O
called	O
algorithmic	B-General_Concept
synthesis	I-General_Concept
or	O
ESL	B-General_Concept
synthesis	I-General_Concept
.	O
</s>
<s>
Catapult	B-Algorithm
C	I-Algorithm
takes	O
ANSI	O
C/C	O
++	O
and	O
SystemC	B-Language
inputs	O
and	O
generates	O
register	O
transfer	O
level	O
(	O
RTL	O
)	O
code	O
targeted	O
to	O
FPGAs	B-Architecture
and	O
ASICs	O
.	O
</s>
<s>
In	O
2004	O
,	O
Mentor	O
Graphics	O
formally	O
announced	O
its	O
Catapult	B-Algorithm
C	I-Algorithm
high	B-General_Concept
level	I-General_Concept
synthesis	I-General_Concept
product	O
offering	O
hierarchical	O
design	O
support	O
for	O
synthesizing	O
pipelined	O
,	O
multi-block	O
subsystems	O
from	O
untimed	O
ANSI	O
C/C	O
++	O
descriptions	O
.	O
</s>
<s>
Catapult	B-Algorithm
C	I-Algorithm
's	O
main	O
functionality	O
was	O
generating	O
RTL	O
(	O
VHDL	B-Language
and	O
Verilog	B-Language
)	O
targeted	O
to	O
ASICs	O
and	O
FPGAs	B-Architecture
.	O
</s>
<s>
Mentor	O
also	O
announced	O
a	O
Catapult	B-Algorithm
C	I-Algorithm
Library	O
Builder	O
for	O
ASIC	O
Designers	O
to	O
collect	O
detailed	O
characterization	O
data	O
.	O
</s>
<s>
In	O
2005	O
,	O
Mentor	O
announced	O
extensions	O
to	O
Catapult	B-Algorithm
C	I-Algorithm
to	O
automatically	O
create	O
SystemC	B-Language
transaction-level	O
models	O
and	O
wrappers	O
,	O
for	O
simulation	O
of	O
the	O
design	O
in	O
verification	O
environments	O
supporting	O
SystemC	B-Language
.	O
</s>
<s>
Mentor	O
also	O
introduced	O
interface	O
synthesis	O
to	O
map	O
the	O
data	O
transfer	O
implied	O
by	O
passing	O
of	O
C++	B-Language
function	O
arguments	O
to	O
hardware	O
interfaces	O
such	O
as	O
wires	O
,	O
registers	O
,	O
handshaked	O
registers	O
,	O
memories	O
,	O
buses	O
or	O
more	O
complex	O
user-defined	O
interfaces	O
.	O
</s>
<s>
In	O
January	O
2009	O
,	O
Mentor	O
announced	O
an	O
integration	O
between	O
Catapult	B-Algorithm
C	I-Algorithm
and	O
its	O
Vista	O
SystemC	B-Language
design	O
and	O
simulation	O
environment	O
to	O
automatically	O
generate	O
transaction-level	O
models	O
(	O
TLM	O
)	O
.	O
</s>
<s>
In	O
this	O
process	O
,	O
the	O
untimed	O
ANSI	B-Language
C++	I-Language
input	O
to	O
Catapult	O
is	O
encapsulated	O
in	O
a	O
TLM	O
wrapper	O
;	O
timing	O
information	O
is	O
extracted	O
from	O
the	O
synthesis	O
results	O
and	O
back-annotated	O
in	O
the	O
resulting	O
model	O
.	O
</s>
<s>
The	O
flow	O
is	O
compatible	O
with	O
the	O
TLM-2.0	O
standard	O
from	O
the	O
Open	O
SystemC	B-Language
Initiative	O
(	O
OSCI	O
)	O
.	O
</s>
<s>
In	O
June	O
2009	O
,	O
Mentor	O
announced	O
that	O
it	O
enhanced	O
Catapult	B-Algorithm
C	I-Algorithm
with	O
the	O
ability	O
to	O
synthesize	O
control	O
logic	O
,	O
create	O
power-optimized	O
RTL	O
netlists	O
,	O
with	O
automatic	O
multi-level	O
clock	O
gating	O
,	O
and	O
an	O
automated	O
verification	O
flow	O
to	O
enable	O
a	O
debug	O
of	O
the	O
RTL	O
against	O
the	O
original	O
C++	B-Language
input	O
.	O
</s>
<s>
In	O
January	O
2010	O
,	O
Mentor	O
announced	O
the	O
ability	O
for	O
Catapult	B-Algorithm
C	I-Algorithm
to	O
take	O
direct	O
SystemC	B-Language
input	O
,	O
including	O
both	O
cycle-based	O
and	O
transaction	O
level	O
(	O
TLM	O
)	O
support	O
.	O
</s>
<s>
In	O
May	O
2011	O
,	O
Mentor	O
announced	O
that	O
Catapult	B-Algorithm
C	I-Algorithm
supported	O
TLM	O
synthesis	O
.	O
</s>
<s>
Abstract	O
TLM	O
models	O
are	O
converted	O
to	O
pin-accurate	O
,	O
protocol-specific	O
,	O
SystemC	B-Language
models	O
,	O
and	O
from	O
there	O
,	O
synthesized	O
to	O
RTL	O
code	O
.	O
</s>
<s>
In	O
August	O
2011	O
,	O
Catapult	B-Algorithm
C	I-Algorithm
was	O
acquired	O
by	O
Calypto	O
Design	O
Systems	O
.	O
</s>
<s>
In	O
September	O
2015	O
,	O
Mentor	O
Graphics	O
acquired	O
Calypto	O
Design	O
Systems	O
,	O
thus	O
reacquiring	O
Catapult	B-Algorithm
C	I-Algorithm
.	O
</s>
<s>
CatapultC	B-Algorithm
synthesizes	O
ANSI	O
C/C	O
++	O
without	O
proprietary	O
extensions	O
.	O
</s>
<s>
Catapult	B-Algorithm
C	I-Algorithm
supports	O
both	O
algorithmic	O
and	O
control	O
logic	O
synthesis	O
.	O
</s>
<s>
Catapult	O
has	O
a	O
graphic	O
user	O
interface	O
with	O
a	O
visual	O
view	O
of	O
the	O
hardware	O
circuit	O
it	O
is	O
scheduling	O
,	O
as	O
well	O
as	O
the	O
clock	O
reference	O
between	O
the	O
C	O
code	O
and	O
the	O
Verilog	B-Language
RTL	O
code	O
.	O
</s>
<s>
Catapult	B-Algorithm
C	I-Algorithm
has	O
3	O
types	O
of	O
simulation	O
using	O
the	O
original	O
C/C	O
++	O
testbench	O
:	O
Cycle-based	O
,	O
RTL-based	O
,	O
and	O
Gate-Level	O
based	O
.	O
</s>
<s>
Catapult	B-Algorithm
C	I-Algorithm
supports	O
SystemC	B-Language
model	O
generation	O
intended	O
for	O
virtual	O
platforms	O
,	O
and	O
a	O
SystemC	B-Language
test	O
environment	O
to	O
verify	O
the	O
generated	O
RTL	O
against	O
the	O
original	O
C++	B-Language
using	O
the	O
original	O
C++	B-Language
testbench	O
.	O
</s>
<s>
Catapult	B-Algorithm
C	I-Algorithm
supports	O
the	O
synthesis	O
of	O
Transaction	O
Level	O
Models	O
(	O
TLM	O
)	O
,	O
including	O
standard	O
off-the-shelf	O
bus	O
interfaces	O
and	O
custom	O
protocols	O
.	O
</s>
