<s>
In	O
1958	O
,	O
Seymour	O
Ginsburg	O
proved	O
that	O
minimization	O
of	O
states	O
of	O
a	O
finite-state	B-Architecture
machine	I-Architecture
with	O
don't-care	O
conditions	O
does	O
not	O
necessarily	O
yield	O
a	O
minimization	O
of	O
logic	O
elements	O
.	O
</s>
<s>
Examples	O
of	O
don't-care	O
terms	O
are	O
the	O
binary	O
values	O
1010	O
through	O
1111	O
(	O
10	O
through	O
15	O
in	O
decimal	O
)	O
for	O
a	O
function	O
that	O
takes	O
a	O
binary-coded	O
decimal	O
(	O
BCD	O
)	O
value	O
,	O
because	O
a	O
BCD	O
value	O
never	O
takes	O
on	O
such	O
values	O
(	O
so	O
called	O
pseudo-tetrades	O
)	O
;	O
in	O
the	O
pictures	O
,	O
the	O
circuit	O
computing	O
the	O
lower	O
left	O
bar	O
of	O
a	O
7-segment	B-General_Concept
display	I-General_Concept
can	O
be	O
minimized	O
to	O
by	O
an	O
appropriate	O
choice	O
of	O
circuit	O
outputs	O
for	O
.	O
</s>
<s>
Write-only	B-General_Concept
registers	I-General_Concept
,	O
as	O
frequently	O
found	O
in	O
older	O
hardware	O
,	O
are	O
often	O
a	O
consequence	O
of	O
don't-care	O
optimizations	O
in	O
the	O
trade-off	O
between	O
functionality	O
and	O
the	O
number	O
of	O
necessary	O
logic	O
gates	O
.	O
</s>
<s>
Don't-care	O
states	O
can	O
also	O
occur	O
in	O
encoding	B-Protocol
schemes	I-Protocol
and	O
communication	O
protocols	O
.	O
</s>
<s>
In	O
the	O
Verilog	B-Language
hardware	O
description	O
language	O
such	O
values	O
are	O
denoted	O
by	O
the	O
letter	O
"	O
X	O
"	O
.	O
</s>
<s>
In	O
the	O
VHDL	B-Language
hardware	O
description	O
language	O
such	O
values	O
are	O
denoted	O
(	O
in	O
the	O
standard	O
logic	O
package	O
)	O
by	O
the	O
letter	O
"	O
X	O
"	O
(	O
forced	O
unknown	O
)	O
or	O
the	O
letter	O
"	O
W	O
"	O
(	O
weak	O
unknown	O
)	O
.	O
</s>
<s>
In	O
simulation	O
,	O
an	O
X	O
value	O
can	O
result	O
from	O
two	O
or	O
more	O
sources	O
driving	O
a	O
signal	O
simultaneously	O
,	O
or	O
the	O
stable	O
output	O
of	O
a	O
flip-flop	B-General_Concept
not	O
having	O
been	O
reached	O
.	O
</s>
<s>
Such	O
circuits	O
can	O
be	O
represented	O
by	O
a	O
state	B-Architecture
machine	I-Architecture
.	O
</s>
<s>
In	O
some	O
cases	O
,	O
there	O
is	O
no	O
combination	O
of	O
inputs	O
that	O
can	O
exit	O
the	O
state	B-Architecture
machine	I-Architecture
into	O
a	O
normal	O
operational	O
state	O
.	O
</s>
<s>
Such	O
states	O
,	O
while	O
nominally	O
can't-happen	O
,	O
are	O
not	O
don't-care	O
,	O
and	O
designers	O
take	O
steps	O
either	O
to	O
ensure	O
that	O
they	O
are	O
really	O
made	O
can't-happen	O
,	O
or	O
else	O
if	O
they	O
do	O
happen	O
,	O
that	O
they	O
create	O
a	O
don't-care	O
alarm	O
indicating	O
an	O
emergency	O
state	O
for	O
error	B-Error_Name
detection	I-Error_Name
,	O
or	O
they	O
are	O
transitory	O
and	O
lead	O
to	O
a	O
normal	O
operational	O
state	O
.	O
</s>
