<s>
Cache	B-General_Concept
pollution	I-General_Concept
describes	O
situations	O
where	O
an	O
executing	O
computer	B-Application
program	I-Application
loads	O
data	O
into	O
CPU	B-General_Concept
cache	I-General_Concept
unnecessarily	O
,	O
thus	O
causing	O
other	O
useful	O
data	O
to	O
be	O
evicted	O
from	O
the	O
cache	O
into	O
lower	O
levels	O
of	O
the	O
memory	B-General_Concept
hierarchy	I-General_Concept
,	O
degrading	O
performance	O
.	O
</s>
<s>
For	O
example	O
,	O
in	O
a	O
multi-core	B-Architecture
processor	I-Architecture
,	O
one	O
core	O
may	O
replace	O
the	O
blocks	O
fetched	O
by	O
other	O
cores	O
into	O
shared	B-General_Concept
cache	I-General_Concept
,	O
or	O
prefetched	B-General_Concept
blocks	O
may	O
replace	O
demand-fetched	O
blocks	O
from	O
the	O
cache	O
.	O
</s>
<s>
T[0]	O
=	O
T[0]	O
+	O
C[ 	O
sizeof(CACHE )	O
-1	O
]	O
;	O
</s>
<s>
(	O
The	O
assumptions	O
here	O
are	O
that	O
the	O
cache	O
is	O
composed	O
of	O
only	O
one	O
level	O
,	O
it	O
is	O
unlocked	O
,	O
the	O
replacement	O
policy	O
is	O
pseudo-LRU	B-General_Concept
,	O
all	O
data	O
is	O
cacheable	O
,	O
the	O
set	O
associativity	O
of	O
the	O
cache	O
is	O
N	O
(	O
where	O
N	O
>	O
1	O
)	O
,	O
and	O
at	O
most	O
one	O
processor	B-General_Concept
register	I-General_Concept
is	O
available	O
to	O
contain	O
program	O
values	O
)	O
.	O
</s>
<s>
However	O
,	O
as	O
the	O
loop	O
executes	O
,	O
because	O
the	O
number	O
of	O
data	O
elements	O
the	O
loop	O
references	O
requires	O
the	O
whole	O
cache	O
to	O
be	O
filled	O
to	O
its	O
capacity	O
,	O
the	O
cache	B-General_Concept
block	I-General_Concept
containing	O
T[0]	O
has	O
to	O
be	O
evicted	O
.	O
</s>
<s>
Thus	O
,	O
the	O
next	O
time	O
the	O
program	O
requests	O
T[0]	O
to	O
be	O
updated	O
,	O
the	O
cache	O
misses	O
,	O
and	O
the	O
cache	O
controller	O
has	O
to	O
request	O
the	O
data	B-General_Concept
bus	I-General_Concept
to	O
bring	O
the	O
corresponding	O
cache	B-General_Concept
block	I-General_Concept
from	O
main	O
memory	O
again	O
.	O
</s>
<s>
T[0]	O
=	O
T[0]	O
+	O
C[ 	O
sizeof(CACHE )	O
-1	O
]	O
;	O
</s>
<s>
Other	O
than	O
code-restructuring	O
mentioned	O
above	O
,	O
the	O
solution	O
to	O
cache	B-General_Concept
pollution	I-General_Concept
is	O
ensure	O
that	O
only	O
high-reuse	O
data	O
are	O
stored	O
in	O
cache	O
.	O
</s>
<s>
This	O
can	O
be	O
achieved	O
by	O
using	O
special	O
cache	B-Architecture
control	I-Architecture
instructions	I-Architecture
,	O
operating	B-General_Concept
system	I-General_Concept
support	O
or	O
hardware	O
support	O
.	O
</s>
<s>
Examples	O
of	O
specialized	O
hardware	O
instructions	O
include	O
"	O
lvxl	O
"	O
provided	O
by	O
PowerPC	B-Architecture
AltiVec	B-General_Concept
.	O
</s>
<s>
This	O
instruction	O
loads	O
a	O
128	O
bit	O
wide	O
value	O
into	O
a	O
register	O
and	O
marks	O
the	O
corresponding	O
cache	B-General_Concept
block	I-General_Concept
as	O
"	O
least	O
recently	O
used	O
"	O
i.e.	O
</s>
<s>
When	O
implemented	O
in	O
this	O
manner	O
,	O
cache	B-General_Concept
pollution	I-General_Concept
would	O
not	O
take	O
place	O
,	O
since	O
the	O
execution	O
of	O
such	O
loop	O
would	O
not	O
cause	O
premature	O
eviction	O
of	O
T[0]	O
from	O
cache	O
.	O
</s>
<s>
Similarly	O
,	O
using	O
operating	B-General_Concept
system	I-General_Concept
(	O
OS	O
)	O
support	O
,	O
the	O
pages	O
in	O
main	O
memory	O
that	O
correspond	O
to	O
the	O
C	O
data	O
array	O
can	O
be	O
marked	O
as	O
"	O
caching	O
inhibited	O
"	O
or	O
,	O
in	O
other	O
words	O
,	O
non-cacheable	O
.	O
</s>
<s>
Also	O
,	O
shared	B-General_Concept
cache	I-General_Concept
can	O
be	O
partitioned	O
to	O
avoid	O
destructive	O
interference	O
between	O
running	O
applications	O
.	O
</s>
<s>
The	O
tradeoff	O
in	O
these	O
solutions	O
is	O
that	O
OS-based	O
schemes	O
may	O
have	O
large	O
latency	O
which	O
may	O
nullify	O
the	O
gain	O
achievable	O
by	O
cache	B-General_Concept
pollution	I-General_Concept
avoidance	O
(	O
unless	O
the	O
memory	O
region	O
has	O
been	O
non-cacheable	O
to	O
begin	O
with	O
)	O
,	O
whereas	O
hardware-based	O
techniques	O
may	O
not	O
have	O
a	O
global	O
view	O
of	O
the	O
program	O
control	O
flow	O
and	O
memory	O
access	O
pattern	O
.	O
</s>
<s>
Cache	B-General_Concept
pollution	I-General_Concept
control	O
has	O
been	O
increasing	O
in	O
importance	O
because	O
the	O
penalties	O
caused	O
by	O
the	O
so-called	O
"	O
memory	O
wall	O
"	O
keep	O
on	O
growing	O
.	O
</s>
<s>
Cache	B-General_Concept
pollution	I-General_Concept
control	O
is	O
one	O
of	O
the	O
numerous	O
devices	O
available	O
to	O
the	O
(	O
mainly	O
embedded	O
)	O
programmer	O
.	O
</s>
