<s>
CUDA	B-Architecture
(	O
or	O
Compute	B-Architecture
Unified	I-Architecture
Device	I-Architecture
Architecture	I-Architecture
)	O
is	O
a	O
parallel	B-Operating_System
computing	I-Operating_System
platform	O
and	O
application	B-Application
programming	I-Application
interface	I-Application
(	O
API	B-General_Concept
)	O
that	O
allows	O
software	O
to	O
use	O
certain	O
types	O
of	O
graphics	B-Architecture
processing	I-Architecture
units	I-Architecture
(	O
GPUs	B-Architecture
)	O
for	O
general	O
purpose	O
processing	O
,	O
an	O
approach	O
called	O
general-purpose	O
computing	O
on	O
GPUs	B-Architecture
(	O
GPGPU	B-Architecture
)	O
.	O
</s>
<s>
CUDA	B-Architecture
is	O
a	O
software	O
layer	O
that	O
gives	O
direct	O
access	O
to	O
the	O
GPU	B-Architecture
's	O
virtual	O
instruction	B-General_Concept
set	I-General_Concept
and	O
parallel	O
computational	O
elements	O
,	O
for	O
the	O
execution	O
of	O
compute	B-Operating_System
kernels	I-Operating_System
.	O
</s>
<s>
CUDA	B-Architecture
is	O
designed	O
to	O
work	O
with	O
programming	O
languages	O
such	O
as	O
C	B-Language
,	O
C++	B-Language
,	O
and	O
Fortran	B-Application
.	O
</s>
<s>
This	O
accessibility	O
makes	O
it	O
easier	O
for	O
specialists	O
in	O
parallel	B-Operating_System
programming	I-Operating_System
to	O
use	O
GPU	B-Architecture
resources	O
,	O
in	O
contrast	O
to	O
prior	O
APIs	B-General_Concept
like	O
Direct3D	B-Application
and	O
OpenGL	B-Application
,	O
which	O
required	O
advanced	O
skills	O
in	O
graphics	O
programming	O
.	O
</s>
<s>
CUDA-powered	O
GPUs	B-Architecture
also	O
support	O
programming	O
frameworks	O
such	O
as	O
OpenMP	B-Application
,	O
OpenACC	B-Operating_System
and	O
OpenCL	B-Application
;	O
and	O
HIP	O
by	O
compiling	O
such	O
code	O
to	O
CUDA	B-Architecture
.	O
</s>
<s>
CUDA	B-Architecture
was	O
created	O
by	O
Nvidia	O
.	O
</s>
<s>
When	O
it	O
was	O
first	O
introduced	O
,	O
the	O
name	O
was	O
an	O
acronym	O
for	O
Compute	B-Architecture
Unified	I-Architecture
Device	I-Architecture
Architecture	I-Architecture
,	O
but	O
Nvidia	O
later	O
dropped	O
the	O
common	O
use	O
of	O
the	O
acronym	O
.	O
</s>
<s>
The	O
graphics	B-Architecture
processing	I-Architecture
unit	I-Architecture
(	O
GPU	B-Architecture
)	O
,	O
as	O
a	O
specialized	O
computer	O
processor	O
,	O
addresses	O
the	O
demands	O
of	O
real-time	B-General_Concept
high-resolution	O
3D	O
graphics	O
compute-intensive	O
tasks	O
.	O
</s>
<s>
By	O
2012	O
,	O
GPUs	B-Architecture
had	O
evolved	O
into	O
highly	O
parallel	O
multi-core	B-Architecture
systems	O
allowing	O
efficient	O
manipulation	O
of	O
large	O
blocks	O
of	O
data	O
.	O
</s>
<s>
This	O
design	O
is	O
more	O
effective	O
than	O
general-purpose	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPUs	O
)	O
for	O
algorithms	O
in	O
situations	O
where	O
processing	O
large	O
blocks	O
of	O
data	O
is	O
done	O
in	O
parallel	O
,	O
such	O
as	O
:	O
</s>
<s>
The	O
following	O
table	O
offers	O
a	O
non-exact	O
description	O
for	O
the	O
ontology	O
of	O
CUDA	B-Architecture
framework	I-Architecture
.	O
</s>
<s>
+The	O
ontology	O
of	O
CUDA	B-Architecture
framework	I-Architecture
memory	O
(	O
hardware	O
)	O
memory	O
(	O
code	O
,	O
or	O
variable	B-Language
scoping	I-Language
)	O
computation	O
(	O
hardware	O
)	O
computation	O
(	O
code	O
syntax	O
)	O
computation	O
(	O
code	O
semantics	O
)	O
RAM	B-Architecture
non-CUDA	O
variables	O
host	O
program	O
one	O
routine	O
call	O
VRAM	O
,	O
GPU	B-Architecture
L2	O
cache	O
global	O
,	O
const	O
,	O
texture	O
device	O
grid	O
simultaneous	O
call	O
of	O
the	O
same	O
subroutine	O
on	O
many	O
processors	O
GPU	B-Architecture
L1	O
cache	O
local	O
,	O
shared	O
SM	O
(	O
"	O
streaming	O
multiprocessor	O
"	O
)	O
block	O
individual	O
subroutine	O
call	O
warp	O
=	O
32	O
threads	O
SIMD	B-Device
instructions	O
GPU	B-Architecture
L0	O
cache	O
,	O
register	O
thread	O
(	O
aka	O
.	O
</s>
<s>
The	O
CUDA	B-Architecture
platform	I-Architecture
is	O
accessible	O
to	O
software	O
developers	O
through	O
CUDA-accelerated	O
libraries	O
,	O
compiler	O
directives	O
such	O
as	O
OpenACC	B-Operating_System
,	O
and	O
extensions	O
to	O
industry-standard	O
programming	O
languages	O
including	O
C	B-Language
,	O
C++	B-Language
and	O
Fortran	B-Application
.	O
</s>
<s>
C/C	O
++	O
programmers	O
can	O
use	O
'	O
CUDA	B-Architecture
C/C	O
++	O
 '	O
,	O
compiled	O
to	O
PTX	O
with	O
nvcc	B-Application
,	O
Nvidia	O
's	O
LLVM-based	O
C/C	O
++	O
compiler	O
,	O
or	O
by	O
clang	O
itself	O
.	O
</s>
<s>
Fortran	B-Application
programmers	O
can	O
use	O
'	O
CUDA	B-Architecture
Fortran	B-Application
 '	O
,	O
compiled	O
with	O
the	O
PGI	O
CUDA	B-Architecture
Fortran	B-Application
compiler	O
from	O
The	B-Application
Portland	I-Application
Group	I-Application
.	O
</s>
<s>
In	O
addition	O
to	O
libraries	O
,	O
compiler	O
directives	O
,	O
CUDA	B-Architecture
C/C	O
++	O
and	O
CUDA	B-Architecture
Fortran	B-Application
,	O
the	O
CUDA	B-Architecture
platform	I-Architecture
supports	O
other	O
computational	O
interfaces	O
,	O
including	O
the	B-Library
Khronos	I-Library
Group	I-Library
's	O
OpenCL	B-Application
,	O
Microsoft	O
's	O
DirectCompute	B-Library
,	O
OpenGL	B-Application
Compute	B-Operating_System
Shader	I-Operating_System
and	O
C++	B-Language
AMP	I-Language
.	O
</s>
<s>
Third	O
party	O
wrappers	O
are	O
also	O
available	O
for	O
Python	B-Language
,	O
Perl	B-Language
,	O
Fortran	B-Application
,	O
Java	B-Language
,	O
Ruby	B-Language
,	O
Lua	B-Language
,	O
Common	B-Language
Lisp	I-Language
,	O
Haskell	B-Language
,	O
R	B-Language
,	O
MATLAB	B-Language
,	O
IDL	B-Language
,	O
Julia	B-Application
,	O
and	O
native	O
support	O
in	O
Mathematica	B-Language
.	O
</s>
<s>
In	O
the	O
computer	O
game	O
industry	O
,	O
GPUs	B-Architecture
are	O
used	O
for	O
graphics	O
rendering	O
,	O
and	O
for	O
game	O
physics	O
calculations	O
(	O
physical	O
effects	O
such	O
as	O
debris	O
,	O
smoke	O
,	O
fire	O
,	O
fluids	O
)	O
;	O
examples	O
include	O
PhysX	B-Operating_System
and	O
Bullet	B-Application
.	O
</s>
<s>
CUDA	B-Architecture
has	O
also	O
been	O
used	O
to	O
accelerate	O
non-graphical	O
applications	O
in	O
computational	O
biology	O
,	O
cryptography	O
and	O
other	O
fields	O
by	O
an	O
order	O
of	O
magnitude	O
or	O
more	O
.	O
</s>
<s>
CUDA	B-Architecture
provides	O
both	O
a	O
low	O
level	O
API	B-General_Concept
(	O
CUDA	B-Architecture
Driver	O
API	B-General_Concept
,	O
non	O
single-source	O
)	O
and	O
a	O
higher	O
level	O
API	B-General_Concept
(	O
CUDA	B-Architecture
Runtime	O
API	B-General_Concept
,	O
single-source	O
)	O
.	O
</s>
<s>
The	O
initial	O
CUDA	B-Architecture
SDK	B-Application
was	O
made	O
public	O
on	O
15	O
February	O
2007	O
,	O
for	O
Microsoft	B-Application
Windows	I-Application
and	O
Linux	B-Application
.	O
</s>
<s>
Mac	B-Application
OS	I-Application
X	I-Application
support	O
was	O
later	O
added	O
in	O
version	O
2.0	O
,	O
which	O
supersedes	O
the	O
beta	O
released	O
February	O
14	O
,	O
2008	O
.	O
</s>
<s>
CUDA	B-Architecture
works	O
with	O
all	O
Nvidia	O
GPUs	B-Architecture
from	O
the	O
G8x	O
series	O
onwards	O
,	O
including	O
GeForce	B-Application
,	O
Quadro	B-Application
and	O
the	O
Tesla	B-Operating_System
line	O
.	O
</s>
<s>
CUDA	B-Architecture
is	O
compatible	O
with	O
most	O
standard	O
operating	O
systems	O
.	O
</s>
<s>
CUDA	B-Architecture
8.0	O
comes	O
with	O
the	O
following	O
libraries	O
(	O
for	O
compilation	O
&	O
runtime	O
,	O
in	O
alphabetical	O
order	O
)	O
:	O
</s>
<s>
CUDA	B-Architecture
8.0	O
comes	O
with	O
these	O
other	O
software	O
components	O
:	O
</s>
<s>
CUDA	B-Architecture
9.0	O
–	O
9.2	O
comes	O
with	O
these	O
other	O
components	O
:	O
</s>
<s>
CUDA	B-Architecture
10	O
comes	O
with	O
these	O
other	O
components	O
:	O
</s>
<s>
CUDA	B-Architecture
11.0-11.8	O
comes	O
with	O
these	O
other	O
components	O
:	O
</s>
<s>
CUDA	B-Architecture
has	O
several	O
advantages	O
over	O
traditional	O
general-purpose	O
computation	O
on	O
GPUs	B-Architecture
(	O
GPGPU	B-Architecture
)	O
using	O
graphics	O
APIs	B-General_Concept
:	O
</s>
<s>
Shared	B-Operating_System
memory	I-Operating_System
CUDA	B-Architecture
exposes	O
a	O
fast	O
shared	B-Operating_System
memory	I-Operating_System
region	O
that	O
can	O
be	O
shared	O
among	O
threads	O
.	O
</s>
<s>
Whether	O
for	O
the	O
host	O
computer	O
or	O
the	O
GPU	B-Architecture
device	O
,	O
all	O
CUDA	B-Architecture
source	O
code	O
is	O
now	O
processed	O
according	O
to	O
C++	B-Language
syntax	O
rules	O
.	O
</s>
<s>
Earlier	O
versions	O
of	O
CUDA	B-Architecture
were	O
based	O
on	O
C	B-Language
syntax	O
rules	O
.	O
</s>
<s>
As	O
with	O
the	O
more	O
general	O
case	O
of	O
compiling	O
C	B-Language
code	O
with	O
a	O
C++	B-Language
compiler	O
,	O
it	O
is	O
therefore	O
possible	O
that	O
old	O
C-style	O
CUDA	B-Architecture
source	O
code	O
will	O
either	O
fail	O
to	O
compile	O
or	O
will	O
not	O
behave	O
as	O
originally	O
intended	O
.	O
</s>
<s>
Interoperability	O
with	O
rendering	O
languages	O
such	O
as	O
OpenGL	B-Application
is	O
one-way	O
,	O
with	O
OpenGL	B-Application
having	O
access	O
to	O
registered	O
CUDA	B-Architecture
memory	O
but	O
CUDA	B-Architecture
not	O
having	O
access	O
to	O
OpenGL	B-Application
memory	O
.	O
</s>
<s>
Copying	O
between	O
host	O
and	O
device	O
memory	O
may	O
incur	O
a	O
performance	O
hit	O
due	O
to	O
system	O
bus	O
bandwidth	O
and	O
latency	O
(	O
this	O
can	O
be	O
partly	O
alleviated	O
with	O
asynchronous	O
memory	O
transfers	O
,	O
handled	O
by	O
the	O
GPU	B-Architecture
's	O
DMA	O
engine	O
)	O
.	O
</s>
<s>
Branches	O
in	O
the	O
program	O
code	O
do	O
not	O
affect	O
performance	O
significantly	O
,	O
provided	O
that	O
each	O
of	O
32	O
threads	O
takes	O
the	O
same	O
execution	O
path	O
;	O
the	O
SIMD	B-Device
execution	O
model	O
becomes	O
a	O
significant	O
limitation	O
for	O
any	O
inherently	O
divergent	O
task	O
(	O
e.g.	O
</s>
<s>
traversing	O
a	O
space	B-Algorithm
partitioning	I-Algorithm
data	O
structure	O
during	O
ray	B-Algorithm
tracing	I-Algorithm
)	O
.	O
</s>
<s>
Valid	O
C++	B-Language
may	O
sometimes	O
be	O
flagged	O
and	O
prevent	O
compilation	O
due	O
to	O
the	O
way	O
the	O
compiler	O
approaches	O
optimization	O
for	O
target	O
GPU	B-Architecture
device	O
limitations	O
.	O
</s>
<s>
C++	B-Language
run-time	B-Application
type	I-Application
information	I-Application
(	O
RTTI	B-Application
)	O
and	O
C++	B-Language
-style	O
exception	O
handling	O
are	O
only	O
supported	O
in	O
host	O
code	O
,	O
not	O
in	O
device	O
code	O
.	O
</s>
<s>
In	O
single-precision	O
on	O
first	O
generation	O
CUDA	B-Architecture
compute	O
capability	O
1.x	O
devices	O
,	O
denormal	B-Algorithm
numbers	I-Algorithm
are	O
unsupported	O
and	O
are	O
instead	O
flushed	O
to	O
zero	O
,	O
and	O
the	O
precision	O
of	O
both	O
the	O
division	O
and	O
square	O
root	O
operations	O
are	O
slightly	O
lower	O
than	O
IEEE	O
754-compliant	O
single	O
precision	O
math	O
.	O
</s>
<s>
Devices	O
that	O
support	O
compute	O
capability	O
2.0	O
and	O
above	O
support	O
denormal	B-Algorithm
numbers	I-Algorithm
,	O
and	O
the	O
division	O
and	O
square	O
root	O
operations	O
are	O
IEEE	O
754	O
compliant	O
by	O
default	O
.	O
</s>
<s>
However	O
,	O
users	O
can	O
obtain	O
the	O
prior	O
faster	O
gaming-grade	O
math	O
of	O
compute	O
capability	O
1.x	O
devices	O
if	O
desired	O
by	O
setting	O
compiler	O
flags	O
to	O
disable	O
accurate	O
divisions	O
and	O
accurate	O
square	O
roots	O
,	O
and	O
enable	O
flushing	O
denormal	B-Algorithm
numbers	I-Algorithm
to	O
zero	O
.	O
</s>
<s>
Unlike	O
OpenCL	B-Application
,	O
CUDA-enabled	O
GPUs	B-Architecture
are	O
only	O
available	O
from	O
Nvidia	O
.	O
</s>
<s>
Attempts	O
to	O
implement	O
CUDA	B-Architecture
on	O
other	O
GPUs	B-Architecture
include	O
:	O
</s>
<s>
Project	O
Coriander	O
:	O
Converts	O
CUDA	B-Architecture
C++11	O
source	O
to	O
OpenCL	B-Application
1.2	O
C	B-Language
.	O
A	O
fork	O
of	O
CUDA-on-CL	O
intended	O
to	O
run	O
TensorFlow	B-Language
.	O
</s>
<s>
CU2CL	O
:	O
Convert	O
CUDA	B-Architecture
3.2	O
C++	B-Language
to	O
OpenCL	B-Application
C	B-Language
.	O
</s>
<s>
GPUOpen	B-Application
HIP	O
:	O
A	O
thin	O
abstraction	O
layer	O
on	O
top	O
of	O
CUDA	B-Architecture
and	O
ROCm	B-Operating_System
intended	O
for	O
AMD	O
and	O
Nvidia	O
GPUs	B-Architecture
.	O
</s>
<s>
Has	O
a	O
conversion	O
tool	O
for	O
importing	O
CUDA	B-Architecture
C++	B-Language
source	O
.	O
</s>
<s>
Supports	O
CUDA	B-Architecture
4.0	O
plus	O
C++11	O
and	O
float16	O
.	O
</s>
<s>
This	O
example	O
code	O
in	O
C++	B-Language
loads	O
a	O
texture	O
from	O
an	O
image	O
into	O
an	O
array	O
on	O
the	O
GPU	B-Architecture
:	O
</s>
<s>
Below	O
is	O
an	O
example	O
given	O
in	O
Python	B-Language
that	O
computes	O
the	O
product	O
of	O
two	O
arrays	O
on	O
the	O
GPU	B-Architecture
.	O
</s>
<s>
The	O
unofficial	O
Python	B-Language
language	I-Language
bindings	O
can	O
be	O
obtained	O
from	O
PyCUDA	O
.	O
</s>
<s>
Additional	O
Python	B-Language
bindings	O
to	O
simplify	O
matrix	O
multiplication	O
operations	O
can	O
be	O
found	O
in	O
the	O
program	O
pycublas	O
.	O
</s>
<s>
while	O
CuPy	B-Application
directly	O
replaces	O
NumPy	O
:	O
</s>
<s>
Supported	O
CUDA	B-Architecture
Compute	O
Capability	O
versions	O
for	O
CUDA	B-Architecture
SDK	B-Application
version	O
and	O
Microarchitecture	B-General_Concept
(	O
by	O
code	O
name	O
)	O
:	O
</s>
<s>
Note	O
:	O
CUDA	B-Architecture
SDK	B-Application
10.2	O
is	O
the	O
last	O
official	O
release	O
for	O
macOS	B-Application
,	O
as	O
support	O
will	O
not	O
be	O
available	O
for	O
macOS	B-Application
in	O
newer	O
releases	O
.	O
</s>
<s>
CUDA	B-Architecture
Compute	O
Capability	O
by	O
version	O
with	O
associated	O
GPU	B-Architecture
semiconductors	O
and	O
GPU	B-Architecture
card	O
models	O
(	O
separated	O
by	O
their	O
various	O
application	O
areas	O
)	O
:	O
</s>
<s>
Tensor	O
Core	O
Composition	O
7.0	O
7.2	O
,	O
7.5	O
8.0	O
,	O
8.6	O
8.7	O
8.9	O
9.0	O
Dot	O
Product	O
Unit	O
Width	O
in	O
FP16	O
units	O
(	O
in	O
bytes	O
)	O
In	O
the	O
Whitepapers	O
the	O
Tensor	O
Core	O
cube	O
diagrams	O
represent	O
the	O
Dot	O
Product	O
Unit	O
Width	O
into	O
the	O
height	O
(	O
4	O
FP16	O
for	O
Volta	B-General_Concept
and	O
Turing	O
,	O
8	O
FP16	O
for	O
A100	O
,	O
4	O
FP16	O
for	O
GA102	O
,	O
16	O
FP16	O
for	O
GH100	O
)	O
.	O
</s>
<s>
The	O
other	O
two	O
dimensions	O
represent	O
the	O
number	O
of	O
Dot	O
Product	O
Units	O
(	O
4x4	O
=	O
16	O
for	O
Volta	B-General_Concept
and	O
Turing	O
,	O
8x4	O
=	O
32	O
for	O
Ampere	B-General_Concept
and	O
Hopper	B-General_Concept
)	O
.	O
</s>
<s>
Pascal	B-General_Concept
without	O
Tensor	O
core	O
is	O
only	O
shown	O
for	O
speed	O
comparison	O
as	O
is	O
Volta	B-General_Concept
V100	O
with	O
non-FP16	O
datatypes.https://images.nvidia.com/aem-dam/en-zz/Solutions/design-visualization/technologies/turing-architecture/NVIDIA	O
-Turing-Architecture-Whitepaper.pdf	O
https://www.nvidia.com/content/dam/en-zz/Solutions/Data-Center/a100/pdf/nvidia-a100-datasheet-us-nvidia-1758950-r4-web.pdf	O
http://plink-ai.com/Uploads/download/AGX_Orin_Module_Series_DataSheet.pdf	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
2	O
"	O
Dot	O
Product	O
Units	O
per	O
Tensor	O
Core	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
4	O
"	O
Tensor	O
Cores	O
per	O
SM	O
partition	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
4	O
"	O
Full	O
throughput	O
(	O
Bytes/cycle	O
)	O
shape	O
x	O
converted	O
operand	O
size	O
,	O
e.g.	O
</s>
<s>
</s>
<s>
Architecture	O
specifications	O
Compute	O
capability	O
(	O
version	O
)	O
1.0	O
1.1	O
1.2	O
1.3	O
2.0	O
2.1	O
3.0	O
3.2	O
3.5	O
3.7	O
5.0	O
5.2	O
5.3	O
6.0	O
6.1	O
6.2	O
7.0	O
7.2	O
7.5	O
8.0	O
8.6	O
8.7	O
8.9	O
9.0	O
Number	O
of	O
ALU	O
lanes	O
for	O
INT32	O
arithmetic	O
operations	O
rowspan	O
="3	O
"	O
colspan	O
=	O
"	O
4	O
"	O
rowspan	O
="3	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
="3	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
="3	O
"	O
colspan	O
=	O
"	O
4	O
"	O
rowspan	O
="3	O
"	O
colspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
="3	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
2	O
"	O
Number	O
of	O
ALU	O
lanes	O
for	O
any	O
INT32	O
or	O
FP32	O
arithmetic	O
operation	O
colspan	O
=	O
"	O
4	O
"	O
colspan	O
=	O
"	O
2	O
"	O
Number	O
of	O
ALU	O
lanes	O
for	O
FP32	O
arithmetic	O
operations	O
rowspan	O
=	O
"	O
2	O
"	O
colspan	O
="3	O
"	O
rowspan	O
=	O
"	O
1	O
"	O
colspan	O
="3	O
"	O
rowspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
1	O
"	O
Number	O
of	O
ALU	O
lanes	O
for	O
FP16x2	O
arithmetic	O
operations	O
colspan	O
=	O
"	O
12	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
rowspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
Number	O
of	O
ALU	O
lanes	O
for	O
FP64	O
arithmetic	O
operations	O
colspan	O
="3	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
="3	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
2	O
"	O
Number	O
of	O
Load/Store	O
Units	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
7	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
5	O
"	O
colspan	O
=	O
"	O
4	O
"	O
colspan	O
=	O
"	O
1	O
"	O
Number	O
of	O
special	O
function	O
units	O
for	O
single-precision	O
floating-point	O
transcendental	O
functions	O
colspan	O
=	O
"	O
4	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
6	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
8	O
"	O
Number	O
of	O
texture	O
mapping	O
units	O
(	O
TMU	O
)	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
=	O
"	O
6	O
"	O
colspan	O
=	O
"	O
8	O
"	O
Number	O
of	O
ALU	O
lanes	O
for	O
uniform	O
INT32	O
arithmetic	O
operations	O
colspan	O
=	O
"	O
18	O
"	O
colspan	O
=	O
"	O
1	O
"	O
2	O
clock	O
cycles/instruction	O
for	O
each	O
SM	O
partition	O
colspan	O
=	O
"	O
5	O
"	O
Number	O
of	O
tensor	O
cores	O
colspan	O
=	O
"	O
16	O
"	O
colspan	O
=	O
"	O
2	O
"	O
colspan	O
="3	O
"	O
colspan	O
=	O
"	O
2	O
"	O
Number	O
of	O
raytracing	B-Algorithm
cores	O
colspan	O
=	O
"	O
18	O
"	O
colspan	O
=	O
"	O
1	O
"	O
colspan	O
=	O
"	O
1	O
"	O
Number	O
of	O
SM	O
Partitions	O
=	O
Processing	O
BlocksThe	O
schedulers	O
and	O
dispatchers	O
have	O
dedicated	O
execution	O
units	O
unlike	O
with	O
Fermi	B-General_Concept
and	O
Kepler	B-General_Concept
.	O
</s>
<s>
For	O
more	O
information	O
read	O
the	O
Nvidia	B-Architecture
CUDA	I-Architecture
programming	O
guide	O
.	O
</s>
