<s>
The	O
CSG	B-General_Concept
65CE02	I-General_Concept
is	O
an	O
8/16	O
-bit	O
microprocessor	O
developed	O
by	O
Commodore	O
Semiconductor	O
Group	O
in	O
1988	O
.	O
</s>
<s>
It	O
is	O
a	O
member	O
of	O
the	O
MOS	B-General_Concept
Technology	I-General_Concept
6502	I-General_Concept
family	O
,	O
developed	O
from	O
the	O
CMOS	B-Device
WDC	B-General_Concept
65C02	I-General_Concept
released	O
by	O
the	O
Western	O
Design	O
Center	O
in	O
1983	O
.	O
</s>
<s>
Like	O
the	O
65C02	B-General_Concept
,	O
the	O
65CE02	B-General_Concept
was	O
built	O
on	O
a	O
2µm	O
CMOS	B-Device
process	O
instead	O
of	O
the	O
original	O
6502	B-General_Concept
's	O
8µm	O
NMOS	B-Algorithm
technology	O
,	O
making	O
the	O
chip	O
smaller	O
(	O
and	O
thus	O
less	O
expensive	O
)	O
as	O
well	O
as	O
using	O
much	O
less	O
power	O
.	O
</s>
<s>
In	O
addition	O
to	O
changes	O
made	O
in	O
the	O
65C02	B-General_Concept
,	O
the	O
65CE02	B-General_Concept
also	O
included	O
improvements	O
to	O
the	O
processor	B-General_Concept
pipeline	I-General_Concept
to	O
allow	O
one-byte	O
instructions	O
to	O
complete	O
in	O
1	O
cycle	O
,	O
rather	O
than	O
the	O
6502	B-General_Concept
's	O
(	O
and	O
most	O
variants	O
)	O
minimum	O
of	O
2	O
cycles	O
.	O
</s>
<s>
It	O
also	O
removed	O
1	O
cycle	O
delays	O
when	O
crossing	O
page	B-General_Concept
boundaries	O
.	O
</s>
<s>
Other	O
changes	O
included	O
the	O
addition	O
of	O
a	O
third	O
index	B-General_Concept
register	I-General_Concept
,	O
Z	B-Algorithm
,	O
along	O
with	O
the	O
addition	O
and	O
modification	O
of	O
a	O
number	O
of	O
instructions	O
to	O
use	O
this	O
register	O
.	O
</s>
<s>
The	O
zero-page	O
,	O
the	O
first	O
256	O
bytes	O
of	O
memory	O
that	O
were	O
used	O
as	O
pseudo-registers	O
,	O
could	O
now	O
be	O
moved	O
to	O
any	O
page	B-General_Concept
in	O
main	O
memory	O
using	O
the	O
B(ase page )	O
register	O
.	O
</s>
<s>
The	O
stack	B-General_Concept
register	I-General_Concept
was	O
widened	O
from	O
8	O
to	O
16-bits	O
using	O
a	O
similar	O
page	B-General_Concept
register	O
,	O
SPH	O
(	O
stack	B-General_Concept
pointer	O
high	O
)	O
,	O
allowing	O
the	O
stack	B-General_Concept
to	O
be	O
moved	O
out	O
of	O
page	B-General_Concept
one	O
and	O
to	O
grow	O
to	O
larger	O
sizes	O
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
was	O
the	O
basis	O
for	O
the	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
CSG	O
4510	B-General_Concept
that	O
was	O
developed	O
for	O
the	O
unreleased	O
Commodore	B-Device
65	I-Device
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
was	O
later	O
used	O
for	O
the	O
A2232	O
serial	B-Protocol
port	I-Protocol
card	O
for	O
the	O
Amiga	B-Device
computer	I-Device
.	O
</s>
<s>
By	O
the	O
late	O
1970s	O
,	O
the	O
original	O
MOS	B-Architecture
Technology	I-Architecture
team	O
that	O
designed	O
the	O
6502	B-General_Concept
had	O
broken	O
up	O
.	O
</s>
<s>
Bill	O
Mensch	O
had	O
moved	O
to	O
Arizona	O
and	O
set	O
up	O
the	O
Western	O
Design	O
Center	O
(	O
WDC	O
)	O
to	O
provide	O
6502-based	O
design	O
services	O
.	O
</s>
<s>
Around	O
1981	O
,	O
the	O
main	O
licensees	O
of	O
the	O
6502	B-General_Concept
design	O
,	O
Rockwell	O
Semiconductor	O
,	O
GTE	O
and	O
Signetics	O
,	O
began	O
a	O
redesign	O
effort	O
with	O
Mensch	O
that	O
led	O
to	O
the	O
WDC	B-General_Concept
65C02	I-General_Concept
.	O
</s>
<s>
This	O
was	O
mainly	O
a	O
CMOS	B-Device
implementation	O
of	O
the	O
original	O
NMOS	B-Algorithm
6502	B-General_Concept
that	O
used	O
10	O
to	O
20	O
times	O
less	O
power	O
,	O
but	O
it	O
also	O
included	O
a	O
number	O
of	O
new	O
instructions	O
to	O
help	O
improve	O
the	O
code	O
density	O
in	O
certain	O
applications	O
.	O
</s>
<s>
New	O
instructions	O
included	O
INA/DEA	O
to	O
increment	O
and	O
decrement	O
the	O
accumulator	B-General_Concept
,	O
STZ	O
to	O
write	O
a	O
zero	O
to	O
a	O
memory	O
location	O
,	O
and	O
BRA	O
which	O
was	O
a	O
jump	O
with	O
a	O
branch-style	O
1-byte	O
relative	O
address	O
.	O
</s>
<s>
The	O
65C02	B-General_Concept
also	O
fixed	O
a	O
number	O
of	O
minor	O
bugs	O
in	O
the	O
original	O
6502	B-General_Concept
design	O
.	O
</s>
<s>
The	O
original	O
6502	B-General_Concept
was	O
designed	O
in	O
the	O
era	O
before	O
microcomputers	B-Architecture
existed	O
,	O
when	O
microprocessors	O
were	O
used	O
as	O
the	O
basis	O
for	O
simpler	O
systems	O
like	O
smart	B-General_Concept
terminals	I-General_Concept
,	O
desktop	O
calculators	O
and	O
many	O
different	O
industrial	O
controller	O
systems	O
.	O
</s>
<s>
This	O
was	O
also	O
an	O
era	O
when	O
memory	O
devices	O
were	O
generally	O
based	O
on	O
static	B-Architecture
RAM	I-Architecture
,	O
which	O
was	O
very	O
expensive	O
and	O
had	O
low	O
memory	B-Device
density	I-Device
.	O
</s>
<s>
For	O
both	O
of	O
these	O
reasons	O
,	O
the	O
ability	O
to	O
handle	O
"	O
large	O
"	O
amounts	O
of	O
memory	O
was	O
not	O
required	O
,	O
and	O
many	O
processors	O
had	O
operating	O
modes	O
that	O
worked	O
with	O
small	O
portions	O
of	O
a	O
larger	O
address	B-General_Concept
space	I-General_Concept
in	O
order	O
to	O
offer	O
higher	O
performance	O
.	O
</s>
<s>
Such	O
was	O
the	O
case	O
in	O
the	O
6502	B-General_Concept
,	O
which	O
used	O
the	O
first	O
memory	B-General_Concept
page	I-General_Concept
,	O
or	O
"	O
zero	O
page	B-General_Concept
"	O
,	O
to	O
provide	O
faster	O
access	O
,	O
and	O
the	O
second	O
page	B-General_Concept
,	O
"	O
page	B-General_Concept
one	O
"	O
,	O
to	O
hold	O
a	O
256-byte	O
stack	B-General_Concept
.	O
</s>
<s>
By	O
the	O
1980s	O
,	O
these	O
assumptions	O
were	O
no	O
longer	O
valid	O
,	O
many	O
machines	O
based	O
on	O
these	O
processors	O
now	O
shipped	O
with	O
the	O
maximum	O
64kB	O
that	O
the	O
6502	B-General_Concept
could	O
address	O
,	O
using	O
the	O
far	O
less	O
expensive	O
and	O
denser	O
dynamic	O
RAM	O
.	O
</s>
<s>
The	O
speed	O
advantages	O
of	O
the	O
zero	O
page	B-General_Concept
addressing	O
mode	O
remained	O
,	O
but	O
now	O
existing	O
within	O
a	O
memory	O
space	O
that	O
was	O
dramatically	O
larger	O
.	O
</s>
<s>
Likewise	O
,	O
the	O
single-page	O
call	B-General_Concept
stack	I-General_Concept
was	O
now	O
a	O
pittance	O
within	O
the	O
overall	O
memory	O
,	O
and	O
high-level	B-Language
languages	I-Language
that	O
made	O
prodigious	O
use	O
of	O
stack	B-General_Concept
space	O
could	O
not	O
easily	O
run	O
on	O
the	O
6502	B-General_Concept
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
is	O
a	O
further	O
improved	O
version	O
of	O
the	O
65C02	B-General_Concept
which	O
expands	O
the	O
memory	O
model	O
to	O
make	O
it	O
more	O
suitable	O
for	O
a	O
system	O
with	O
large	O
amounts	O
of	O
main	O
memory	O
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
adds	O
an	O
8-bit	O
B	O
register	O
,	O
for	O
Base	O
Page	B-General_Concept
,	O
that	O
offsets	O
the	O
zero	O
page	B-General_Concept
to	O
any	O
location	O
in	O
memory	O
.	O
</s>
<s>
B	O
is	O
set	O
to	O
zero	O
on	O
power-up	O
or	O
reset	O
,	O
so	O
the	O
65CE02	B-General_Concept
initially	O
works	O
exactly	O
like	O
the	O
6502	B-General_Concept
.	O
</s>
<s>
If	O
a	O
value	O
is	O
placed	O
into	O
the	O
B	O
register	O
using	O
TAB	O
(	O
Transfer	O
A	O
to	O
B	O
)	O
the	O
zero	O
page	B-General_Concept
then	O
moves	O
to	O
the	O
new	O
location	O
.	O
</s>
<s>
A	O
significant	O
use	O
of	O
this	O
feature	O
is	O
to	O
allow	O
small	O
routines	O
that	O
can	O
fit	O
within	O
the	O
256	O
bytes	O
of	O
a	O
page	B-General_Concept
to	O
use	O
zero-page	O
addressing	O
(	O
now	O
known	O
as	O
base	O
page	B-General_Concept
addressing	O
)	O
which	O
makes	O
the	O
code	O
smaller	O
because	O
addresses	O
no	O
longer	O
have	O
a	O
second	O
byte	O
,	O
which	O
also	O
makes	O
the	O
code	O
run	O
faster	O
because	O
the	O
second	O
byte	O
does	O
not	O
have	O
to	O
be	O
fetched	O
from	O
memory	O
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
also	O
extends	O
the	O
stack	B-General_Concept
from	O
the	O
original	O
256-bytes	O
of	O
page	B-General_Concept
one	O
to	O
,	O
in	O
theory	O
,	O
the	O
entire	O
address	B-General_Concept
space	I-General_Concept
.	O
</s>
<s>
It	O
does	O
this	O
by	O
adding	O
another	O
8-bit	O
register	O
,	O
SPH	O
,	O
for	O
Stack	B-General_Concept
Pointer	O
High	O
.	O
</s>
<s>
Normally	O
this	O
works	O
like	O
B	O
,	O
offsetting	O
the	O
base	O
address	O
of	O
the	O
stack	B-General_Concept
from	O
page	B-General_Concept
one	O
to	O
any	O
selected	O
page	B-General_Concept
.	O
</s>
<s>
It	O
otherwise	O
continues	O
to	O
work	O
as	O
before	O
,	O
having	O
a	O
maximum	O
size	O
of	O
one	O
page	B-General_Concept
,	O
256	O
bytes	O
.	O
</s>
<s>
Like	O
B	O
,	O
on	O
startup	O
or	O
reset	O
,	O
SPH	O
is	O
set	O
to	O
01	O
so	O
that	O
it	O
works	O
exactly	O
like	O
the	O
65C02	B-General_Concept
.	O
</s>
<s>
When	O
the	O
new	O
"	O
stack	B-General_Concept
extend	O
"	O
bit	O
in	O
the	O
status	B-General_Concept
register	I-General_Concept
is	O
set	O
,	O
using	O
the	O
new	O
CLE/SEE	O
instructions	O
,	O
the	O
stack	B-General_Concept
pointer	O
becomes	O
a	O
true	O
16-bit	O
value	O
.	O
</s>
<s>
The	O
value	O
in	O
SPH	O
is	O
added	O
to	O
the	O
value	O
in	O
the	O
original	O
SP	O
,	O
now	O
known	O
as	O
SPL	O
for	O
Stack	B-General_Concept
Pointer	O
Low	O
,	O
to	O
produce	O
a	O
16-bit	O
pointer	O
to	O
the	O
bottom	O
of	O
the	O
stack	B-General_Concept
.	O
</s>
<s>
This	O
allows	O
the	O
stack	B-General_Concept
to	O
grow	O
much	O
larger	O
than	O
the	O
original	O
256	O
bytes	O
,	O
which	O
was	O
too	O
small	O
for	O
high-level	B-Language
languages	I-Language
.	O
</s>
<s>
While	O
the	O
latter	O
is	O
more	O
flexible	O
,	O
it	O
does	O
mean	O
that	O
accesses	O
into	O
the	O
stack	B-General_Concept
have	O
to	O
construct	O
a	O
16-bit	O
address	O
from	O
the	O
two	O
registers	O
,	O
taking	O
an	O
extra	O
cycle	O
,	O
and	O
thus	O
slowing	O
overall	O
performance	O
.	O
</s>
<s>
Using	O
the	O
smaller	O
stack	B-General_Concept
,	O
where	O
possible	O
,	O
offers	O
better	O
performance	O
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
also	O
adds	O
a	O
new	O
index	B-General_Concept
register	I-General_Concept
,	O
Z	B-Algorithm
.	O
</s>
<s>
This	O
is	O
set	O
to	O
zero	O
on	O
startup	O
or	O
reset	O
,	O
meaning	O
that	O
its	O
store-Z-to-memory	O
instruction	O
,	O
STZ	O
,	O
works	O
just	O
like	O
it	O
does	O
in	O
the	O
65C02	B-General_Concept
where	O
the	O
same	O
instruction	O
means	O
store-zero-to-memory	O
.	O
</s>
<s>
This	O
allows	O
unmodified	O
65C02	B-General_Concept
code	O
to	O
run	O
on	O
the	O
65CE02	B-General_Concept
.	O
</s>
<s>
A	O
number	O
of	O
other	O
instructions	O
are	O
added	O
or	O
modified	O
to	O
allow	O
access	O
to	O
the	O
Z	B-Algorithm
register	O
.	O
</s>
<s>
Among	O
these	O
are	O
the	O
LDZ	O
to	O
load	O
the	O
value	O
from	O
memory	O
,	O
TZA/TAZ	O
to	O
transfer	O
the	O
value	O
to	O
or	O
from	O
the	O
accumulator	B-General_Concept
,	O
PHZ/PLZ	O
to	O
push	O
and	O
pull	O
Z	B-Algorithm
to	O
the	O
stack	B-General_Concept
,	O
INZ/DEZ	O
for	O
increment	O
and	O
decrement	O
,	O
and	O
CPZ	O
to	O
compare	O
the	O
value	O
in	O
Z	B-Algorithm
to	O
a	O
value	O
in	O
memory	O
.	O
</s>
<s>
The	O
65C02	B-General_Concept
added	O
BRA	O
,	O
Branch	O
Always	O
,	O
which	O
was	O
essentially	O
a	O
JMP	O
that	O
used	O
branch-style	O
8-bit	O
relative	O
address	O
instead	O
of	O
an	O
absolute	O
16-bit	O
address	O
.	O
</s>
<s>
For	O
unknown	O
reasons	O
,	O
the	O
65CE02	B-General_Concept
changed	O
the	O
mnemonic	O
to	O
BRU	O
.	O
</s>
<s>
In	O
the	O
65CE02	B-General_Concept
,	O
these	O
could	O
be	O
-32768	O
or	O
+32767	O
locations	O
,	O
by	O
following	O
the	O
branch	O
with	O
a	O
16-bit	O
value	O
.	O
</s>
<s>
For	O
instance	O
,	O
if	O
one	O
wanted	O
to	O
branch	O
to	O
address	O
$1234	O
if	O
the	O
accumulator	B-General_Concept
is	O
zero	O
,	O
one	O
would	O
do	O
a	O
CMP	O
#$	O
00/BNE	O
+	O
3/JMP	O
$1234	O
,	O
meaning	O
you	O
want	O
to	O
skip	O
over	O
the	O
3-byte	O
JMP	O
addr	O
if	O
the	O
accumulator	B-General_Concept
is	O
not	O
zero	O
.	O
</s>
<s>
In	O
the	O
65CE02	B-General_Concept
this	O
can	O
be	O
reduced	O
to	O
something	O
like	O
CMP	O
#$	O
00/BEQ	O
$0123	O
,	O
thereby	O
making	O
the	O
code	O
more	O
obvious	O
,	O
removing	O
two	O
bytes	O
of	O
instructions	O
,	O
and	O
removing	O
the	O
need	O
for	O
the	O
lost	O
cycles	O
fetching	O
and	O
running	O
the	O
branch	O
.	O
</s>
<s>
More	O
minor	O
changes	O
include	O
the	O
addition	O
of	O
ASR	O
to	O
perform	O
an	O
arithmetic	O
(	O
signed	O
)	O
right	O
shift	O
(	O
the	O
6502	B-General_Concept
only	O
had	O
logical	O
,	O
or	O
unsigned	O
right	O
shift	O
)	O
,	O
a	O
NEG	O
A	O
instruction	O
which	O
performs	O
a	O
two	B-General_Concept
's	I-General_Concept
complement	I-General_Concept
negation	O
on	O
the	O
accumulator	B-General_Concept
,	O
and	O
RTN	O
,	O
a	O
variation	O
on	O
RTS	O
(	O
ReTurn	O
from	O
Subroutine	O
)	O
that	O
returns	O
to	O
an	O
address	O
offset	O
into	O
the	O
stack	B-General_Concept
instead	O
of	O
at	O
the	O
top	O
,	O
avoiding	O
the	O
need	O
to	O
explicitly	O
POP	O
off	O
anything	O
the	O
routine	O
added	O
while	O
it	O
ran	O
.	O
</s>
<s>
The	O
system	O
also	O
added	O
a	O
new	O
addressing	O
mode	O
that	O
used	O
a	O
base	O
address	O
on	O
the	O
stack	B-General_Concept
as	O
the	O
basis	O
for	O
indirect	O
addressing	O
.	O
</s>
<s>
Although	O
the	O
data-sheet	O
is	O
not	O
clear	O
on	O
its	O
ultimate	O
purpose	O
,	O
it	O
appears	O
to	O
be	O
a	O
placeholder	O
intended	O
to	O
allow	O
instructions	O
to	O
be	O
passed	O
to	O
co-processor	O
units	O
,	O
like	O
a	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
A	O
major	O
oddity	O
of	O
the	O
original	O
6502	B-General_Concept
was	O
that	O
one-byte	O
instructions	O
like	O
INX	O
still	O
took	O
two	O
cycles	O
to	O
complete	O
.	O
</s>
<s>
This	O
allowed	O
for	O
simplifications	O
in	O
the	O
pipeline	B-General_Concept
system	O
;	O
the	O
next	O
byte	O
from	O
memory	O
was	O
fetched	O
while	O
the	O
operation	O
was	O
being	O
decoded	O
,	O
meaning	O
the	O
next	O
byte	O
was	O
fetched	O
no	O
matter	O
what	O
.	O
</s>
<s>
In	O
this	O
case	O
the	O
next	O
byte	O
was	O
the	O
following	O
instruction	O
,	O
but	O
it	O
had	O
no	O
way	O
to	O
feed	O
that	O
back	O
into	O
the	O
first	O
stage	O
of	O
the	O
pipeline	B-General_Concept
to	O
decode	O
it	O
.	O
</s>
<s>
Although	O
this	O
led	O
to	O
a	O
number	O
of	O
instructions	O
being	O
slower	O
than	O
they	O
could	O
have	O
been	O
,	O
this	O
"	O
feature	O
"	O
was	O
retained	O
in	O
the	O
65C02	B-General_Concept
,	O
although	O
whether	O
this	O
was	O
in	O
order	O
to	O
retain	O
its	O
pipeline	B-General_Concept
's	O
simplicity	O
or	O
its	O
cycle	O
timing	O
is	O
not	O
explained	O
in	O
available	O
sources	O
.	O
</s>
<s>
Maintaining	O
cycle	O
compatibility	O
was	O
not	O
a	O
requirement	O
for	O
the	O
65CE02	B-General_Concept
,	O
and	O
new	O
fabrication	O
processes	O
made	O
the	O
extra	O
circuitry	O
in	O
the	O
pipeline	B-General_Concept
a	O
non-issue	O
,	O
so	O
the	O
pipeline	B-General_Concept
was	O
re-arranged	O
to	O
correctly	O
handle	O
one-byte	O
instructions	O
in	O
a	O
single	O
cycle	O
.	O
</s>
<s>
These	O
improvements	O
allow	O
the	O
65CE02	B-General_Concept
to	O
execute	O
code	O
up	O
to	O
25%	O
faster	O
than	O
previous	O
65xx	O
models	O
.	O
</s>
<s>
Examples	O
include	O
"	O
indexed	O
indirect	O
"	O
where	O
the	O
value	O
in	O
one	O
of	O
the	O
index	B-General_Concept
registers	I-General_Concept
is	O
added	O
to	O
a	O
base	O
address	O
,	O
and	O
then	O
applies	O
the	O
instruction	O
to	O
the	O
resulting	O
address	O
.	O
</s>
<s>
In	O
the	O
original	O
6502	B-General_Concept
,	O
if	O
the	O
addition	O
of	O
the	O
two	O
values	O
crossed	O
a	O
page	B-General_Concept
boundary	O
,	O
every	O
256	O
locations	O
,	O
an	O
extra	O
cycle	O
was	O
needed	O
to	O
produce	O
the	O
final	O
address	O
value	O
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
removed	O
this	O
limitation	O
,	O
thereby	O
improving	O
the	O
performance	O
of	O
these	O
commonly	O
used	O
modes	O
.	O
</s>
<s>
It	O
is	O
fabricated	O
using	O
2µm	O
CMOS	B-Device
technology	O
,	O
allowing	O
for	O
lower	O
power	O
operation	O
compared	O
to	O
previous	O
NMOS	B-Algorithm
and	O
HMOS	B-Algorithm
versions	O
of	O
the	O
65xx	O
family	O
.	O
</s>
<s>
It	O
is	O
housed	O
in	O
a	O
40-pin	O
DIP	B-Algorithm
that	O
is	O
pin	O
compatible	O
with	O
the	O
6502	B-General_Concept
.	O
</s>
<s>
The	O
4510	B-General_Concept
is	O
a	O
system	B-Algorithm
in	I-Algorithm
package	I-Algorithm
(	O
SiP	O
)	O
variant	O
of	O
the	O
65CE02	B-General_Concept
that	O
includes	O
two	O
6526	B-Device
CIA	I-Device
I/O	B-Architecture
port	I-Architecture
controllers	O
and	O
a	O
custom	O
MMU	B-General_Concept
to	O
expand	O
the	O
address	B-General_Concept
space	I-General_Concept
to	O
20	O
bit	O
(	O
1	O
megabyte	O
)	O
.	O
</s>
<s>
It	O
is	O
housed	O
in	O
an	O
84-pin	O
PLCC	B-Algorithm
.	O
</s>
<s>
The	O
4510	B-General_Concept
was	O
used	O
in	O
the	O
unreleased	O
Commodore	B-Device
65	I-Device
home	O
computer	O
and	O
the	O
unreleased	O
Commodore	B-Device
CDTV	I-Device
cost-reduced	O
revision	O
.	O
</s>
<s>
The	O
65CE02	B-General_Concept
was	O
used	O
in	O
the	O
Commodore	O
A2232	O
serial	B-Protocol
port	I-Protocol
card	O
for	O
the	O
Amiga	B-Device
computer	I-Device
.	O
</s>
