<s>
COMPASS	B-Language
,	O
COMPrehensive	O
ASSembler	B-Language
,	O
is	O
any	O
of	O
a	O
family	O
of	O
macro	O
assembly	B-Language
languages	I-Language
for	O
Control	O
Data	O
Corporation	O
's	O
3000	B-Device
series	I-Device
,	O
and	O
for	O
the	O
60-bit	O
CDC	B-Device
6000	I-Device
series	I-Device
,	O
7600	B-Device
and	O
Cyber	B-Device
70	I-Device
and	I-Device
170	I-Device
series	I-Device
mainframe	B-Architecture
computers	I-Architecture
.	O
</s>
<s>
There	O
are	O
two	O
flavors	O
of	O
COMPASS	B-Language
on	O
the	O
60-bit	O
machines	O
:	O
</s>
<s>
COMPASS	B-Language
CP	O
is	O
the	O
assembly	B-Language
language	I-Language
for	O
the	O
CP	O
(	O
Central	O
Processor	O
)	O
,	O
the	O
processor	O
running	O
user	O
programs	O
.	O
</s>
<s>
COMPASS	B-Language
PP	O
is	O
the	O
assembly	B-Language
language	I-Language
for	O
the	O
PP	O
(	O
Peripheral	O
Processor	O
)	O
,	O
only	O
running	O
operating	B-General_Concept
system	I-General_Concept
code	O
.	O
</s>
<s>
COMPASS	B-Language
is	O
a	O
classical	O
two-pass	O
assembler	B-Language
with	O
macro	O
and	O
conditional	O
assembly	O
features	O
,	O
and	O
generates	O
a	O
full	O
listing	O
showing	O
both	O
the	O
source	O
assembly	B-Language
code	I-Language
and	O
the	O
generated	O
machine	B-Language
code	I-Language
(	O
in	O
octal	O
)	O
.	O
</s>
<s>
CDC	O
's	O
operating	B-General_Concept
systems	I-General_Concept
were	O
written	O
almost	O
entirely	O
in	O
COMPASS	B-Language
assembly	B-Language
language	I-Language
.	O
</s>
<s>
Central	O
processor	O
(	O
CP	O
or	O
CPU	O
)	O
hardware	O
maintains	O
24	O
operational	O
registers	B-General_Concept
,	O
named	O
A0	O
to	O
A7	O
,	O
X0	O
to	O
X7	O
and	O
B0	O
to	O
B7	O
.	O
</s>
<s>
Registers	B-General_Concept
X0	O
to	O
X7	O
are	O
60	O
bits	O
long	O
and	O
are	O
used	O
to	O
hold	O
data	O
,	O
while	O
registers	B-General_Concept
B0	O
to	O
B7	O
are	O
18	O
bits	O
long	O
and	O
their	O
major	O
purpose	O
is	O
to	O
hold	O
either	O
addresses	B-General_Concept
or	O
be	O
used	O
as	O
indexing	B-General_Concept
registers	I-General_Concept
,	O
except	O
that	O
B0	O
is	O
always	O
zero	O
.	O
</s>
<s>
A	O
or	O
address	B-General_Concept
registers	I-General_Concept
are	O
also	O
18	O
bits	O
long	O
.	O
</s>
<s>
Whenever	O
an	O
address	O
is	O
set	O
into	O
any	O
of	O
A1	O
to	O
A5	O
registers	B-General_Concept
,	O
the	O
data	O
at	O
that	O
memory	B-General_Concept
location	I-General_Concept
(	O
address	O
)	O
is	O
loaded	O
into	O
the	O
corresponding	O
X	O
register	O
.	O
</s>
<s>
Likewise	O
,	O
setting	O
an	O
address	O
into	O
one	O
of	O
A6	O
or	O
A7	O
registers	B-General_Concept
stores	O
the	O
data	O
held	O
in	O
the	O
corresponding	O
X6	O
or	O
X7	O
register	O
to	O
that	O
memory	B-General_Concept
location	I-General_Concept
.	O
</s>
<s>
CP	O
instructions	O
are	O
written	O
in	O
a	O
particularly	O
user-friendly	O
form	O
:	O
"	O
SA1	O
A0+B1	O
"	O
denotes	O
set	O
address	B-General_Concept
register	I-General_Concept
A1	O
to	O
the	O
sum	O
of	O
address	B-General_Concept
register	I-General_Concept
A0	O
and	O
index	B-General_Concept
register	I-General_Concept
B1	O
.	O
</s>
<s>
Peripheral	O
processor	O
(	O
PP	O
or	O
PPU	O
)	O
instructions	O
are	O
completely	O
different	O
from	O
CPU	B-Language
instructions	I-Language
.	O
</s>
<s>
Peripheral	O
processor	O
hardware	O
is	O
simpler	O
;	O
it	O
has	O
an	O
18-bit	O
A	O
(	O
accumulator	B-General_Concept
register	O
,	O
a	O
12-bit	O
Program	O
Address	B-General_Concept
register	I-General_Concept
,	O
a	O
12-bit	O
Q	O
register	O
(	O
not	O
programmer-visible	O
)	O
,	O
and	O
a	O
22-bit	O
R	O
register	O
(	O
used	O
to	O
accomplish	O
address	O
relocation	O
during	O
central	O
memory	O
read	O
and	O
write	O
instructions	O
on	O
Cyber	O
180	O
systems	O
)	O
.	O
</s>
<s>
No	O
special	O
job	O
validation	O
was	O
required	O
to	O
assemble	O
peripheral	O
processor	O
programs	O
,	O
but	O
to	O
be	O
executed	O
,	O
such	O
programs	O
were	O
required	O
to	O
installed	O
into	O
the	O
operating	B-General_Concept
system	I-General_Concept
via	O
special	O
system	O
editing	O
commands	O
.	O
</s>
