<s>
The	O
Blackfin	B-General_Concept
is	O
a	O
family	O
of	O
16-/32	O
-bit	O
microprocessors	B-Architecture
developed	O
,	O
manufactured	O
and	O
marketed	O
by	O
Analog	O
Devices	O
.	O
</s>
<s>
The	O
processors	O
have	O
built-in	O
,	O
fixed-point	O
digital	B-Architecture
signal	I-Architecture
processor	I-Architecture
(	O
DSP	B-Architecture
)	O
functionality	O
supplied	O
by	O
16-bit	O
multiply	B-Algorithm
–	I-Algorithm
accumulates	I-Algorithm
(	O
MACs	O
)	O
,	O
accompanied	O
on-chip	O
by	O
a	O
microcontroller	B-Architecture
.	O
</s>
<s>
It	O
was	O
designed	O
for	O
a	O
unified	O
low-power	O
processor	O
architecture	O
that	O
can	B-Protocol
run	O
operating	B-General_Concept
systems	I-General_Concept
while	O
simultaneously	O
handling	O
complex	O
numeric	O
tasks	O
such	O
as	O
real-time	B-General_Concept
H.264	B-Application
video	O
encoding	O
.	O
</s>
<s>
Blackfin	B-General_Concept
processors	O
use	O
a	O
32-bit	O
RISC	B-Architecture
microcontroller	B-Architecture
programming	I-Architecture
model	O
on	O
a	O
SIMD	B-Device
architecture	O
,	O
which	O
was	O
co-developed	O
by	O
Intel	O
and	O
Analog	O
Devices	O
,	O
as	O
MSA	O
(	O
Micro	O
Signal	O
Architecture	O
)	O
.	O
</s>
<s>
It	O
incorporates	O
aspects	O
of	O
ADI	O
's	O
older	O
SHARC	B-General_Concept
architecture	O
and	O
Intel	O
's	O
XScale	B-Application
architecture	O
into	O
a	O
single	O
core	O
,	O
combining	O
digital	O
signal	O
processing	O
(	O
DSP	B-Architecture
)	O
and	O
microcontroller	B-Architecture
functionality	O
.	O
</s>
<s>
There	O
are	O
many	O
differences	O
in	O
the	O
core	O
architecture	O
between	O
Blackfin/MSA	O
and	O
XScale/ARM	O
or	O
SHARC	B-General_Concept
,	O
but	O
the	O
combination	O
was	O
designed	O
to	O
improve	O
performance	O
,	O
programmability	O
and	O
power	O
consumption	O
over	O
traditional	O
DSP	B-Architecture
or	O
RISC	B-Architecture
architecture	O
designs	O
.	O
</s>
<s>
The	O
Blackfin	B-General_Concept
architecture	O
encompasses	O
various	O
CPU	O
models	O
,	O
each	O
targeting	O
particular	O
applications	O
.	O
</s>
<s>
The	O
BF-7xx	O
series	O
,	O
introduced	O
in	O
2014	O
,	O
comprise	O
the	O
Blackfin+	O
architecture	O
,	O
which	O
expands	O
on	O
the	O
Blackfin	B-General_Concept
architecture	O
with	O
some	O
new	O
processor	O
features	O
and	O
instructions	B-General_Concept
.	O
</s>
<s>
What	O
is	O
regarded	O
as	O
the	O
Blackfin	B-General_Concept
"	O
core	O
"	O
is	O
contextually	O
dependent	O
.	O
</s>
<s>
For	O
some	O
applications	O
,	O
the	O
DSP	B-Architecture
features	O
are	O
central	O
.	O
</s>
<s>
Blackfin	B-General_Concept
has	O
two	O
16-bit	O
hardware	O
MACs	O
,	O
two	O
40-bit	O
ALUs	O
and	O
accumulators	B-General_Concept
,	O
a	O
40-bit	O
barrel	O
shifter	O
,	O
and	O
four	O
8-bit	O
video	O
ALUs	O
;	O
Blackfin+	O
processors	O
add	O
a	O
32-bit	O
MAC	B-Algorithm
and	O
72-bit	O
accumulator	B-General_Concept
.	O
</s>
<s>
This	O
allows	O
the	O
processor	O
to	O
execute	O
up	O
to	O
three	O
instructions	B-General_Concept
per	O
clock	O
cycle	O
,	O
depending	O
on	O
the	O
level	O
of	O
optimization	B-Application
performed	O
by	O
the	O
compiler	B-Language
or	O
programmer	B-Application
.	O
</s>
<s>
Two	O
nested	O
zero-overhead	B-Device
loops	I-Device
and	O
four	O
circular	O
buffer	O
DAGs	O
(	O
data	O
address	O
generators	O
)	O
are	O
designed	O
to	O
assist	O
in	O
writing	O
efficient	O
code	O
requiring	O
fewer	O
instructions	B-General_Concept
.	O
</s>
<s>
Other	O
applications	O
use	O
the	O
RISC	B-Architecture
features	O
,	O
which	O
include	O
memory	B-General_Concept
protection	I-General_Concept
,	O
different	O
operating	O
modes	O
(	O
user	O
,	O
kernel	O
)	O
,	O
single-cycle	O
opcodes	B-Language
,	O
data	O
and	O
instruction	O
caches	O
,	O
and	O
instructions	B-General_Concept
for	O
bit	O
test	O
,	O
byte	O
,	O
word	O
,	O
or	O
integer	O
accesses	O
and	O
a	O
variety	O
of	O
on-chip	O
peripherals	O
.	O
</s>
<s>
The	O
ISA	B-General_Concept
is	O
designed	O
for	O
a	O
high	O
level	O
of	O
expressiveness	B-Language
,	O
allowing	O
the	O
assembly	O
programmer	B-Application
(	O
or	O
compiler	B-Language
)	O
to	O
optimize	O
an	O
algorithm	O
for	O
the	O
hardware	O
features	O
present	O
.	O
</s>
<s>
The	O
standard	O
Blackfin	B-General_Concept
assembly	O
language	O
is	O
written	O
using	O
an	O
algebraic	O
syntax	O
:	O
instead	O
of	O
prefix	O
commands	O
used	O
in	O
many	O
other	O
assembly	O
languages	O
.	O
</s>
<s>
The	O
Blackfin	B-General_Concept
uses	O
a	O
byte-addressable	B-General_Concept
,	O
flat	O
memory	B-General_Concept
map	I-General_Concept
.	O
</s>
<s>
Internal	O
L1	O
memory	O
,	O
internal	O
L2	O
memory	O
,	O
external	O
memory	O
and	O
all	O
memory-mapped	B-Architecture
control	B-Operating_System
registers	I-Operating_System
reside	O
in	O
this	O
32-bit	O
address	O
space	O
,	O
so	O
that	O
from	O
a	O
programming	O
point	O
of	O
view	O
,	O
the	O
Blackfin	B-General_Concept
has	O
a	O
Von	B-Architecture
Neumann	I-Architecture
architecture	I-Architecture
.	O
</s>
<s>
The	O
L1	O
internal	O
SRAM	B-Architecture
memory	O
,	O
which	O
runs	O
at	O
the	O
core-clock	O
speed	O
of	O
the	O
device	O
,	O
is	O
based	O
on	O
a	O
Harvard	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
Portions	O
of	O
instruction	O
and	O
data	O
L1	O
SRAM	B-Architecture
can	B-Protocol
be	O
optionally	O
configured	O
as	O
cache	O
independently	O
.	O
</s>
<s>
Certain	O
Blackfin	B-General_Concept
processors	O
also	O
have	O
between	O
64KB	O
and	O
256KB	O
of	O
L2	O
memory	O
.	O
</s>
<s>
Code	O
and	O
data	O
can	B-Protocol
be	O
mixed	O
in	O
L2	O
.	O
</s>
<s>
Blackfin	B-General_Concept
processors	O
support	O
a	O
variety	O
of	O
external	O
memories	O
including	O
SDRAM	O
,	O
DDR-SDRAM	O
,	O
NOR	O
flash	O
,	O
NAND	O
flash	O
and	O
SRAM	B-Architecture
.	O
</s>
<s>
Some	O
Blackfin	B-General_Concept
processors	O
also	O
include	O
mass-storage	O
interfaces	O
such	O
as	O
ATAPI	O
and	O
SD/SDIO	B-Device
.	O
</s>
<s>
They	O
can	B-Protocol
support	O
hundreds	O
of	O
megabytes	O
of	O
memory	O
in	O
the	O
external	O
memory	O
space	O
.	O
</s>
<s>
Coupled	O
with	O
the	O
core	O
and	O
memory	O
system	O
is	O
a	O
DMA	B-General_Concept
engine	I-General_Concept
that	O
can	B-Protocol
operate	O
between	O
any	O
of	O
its	O
peripherals	O
and	O
main	O
(	O
or	O
external	O
)	O
memory	O
.	O
</s>
<s>
The	O
processors	O
typically	O
have	O
a	O
dedicated	O
DMA	B-General_Concept
channel	O
for	O
each	O
peripheral	O
,	O
which	O
is	O
designed	O
for	O
higher	O
throughput	O
for	O
applications	O
that	O
can	B-Protocol
use	O
it	O
,	O
such	O
as	O
real-time	B-General_Concept
standard-definition	O
(	O
D1	O
)	O
video	O
encoding	O
and	O
decoding	O
.	O
</s>
<s>
The	O
architecture	O
of	O
Blackfin	B-General_Concept
contains	O
the	O
usual	O
CPU	O
,	O
memory	O
,	O
and	O
I/O	O
that	O
is	O
found	O
on	O
microprocessors	B-Architecture
or	O
microcontrollers	B-Architecture
.	O
</s>
<s>
These	O
features	O
enable	O
operating	B-General_Concept
systems	I-General_Concept
.	O
</s>
<s>
All	O
Blackfin	B-General_Concept
processors	O
contain	O
a	O
Memory	B-General_Concept
Protection	I-General_Concept
Unit	I-General_Concept
(	O
MPU	O
)	O
.	O
</s>
<s>
The	O
MPU	O
allows	O
Blackfin	B-General_Concept
to	O
support	O
operating	B-General_Concept
systems	I-General_Concept
,	O
RTOSs	O
and	O
kernels	O
like	O
ThreadX	B-Operating_System
,	O
μC/OS	B-Operating_System
-II	I-Operating_System
,	O
or	O
NOMMU	O
Linux	B-Application
.	O
</s>
<s>
Although	O
the	O
MPU	O
is	O
referred	O
to	O
as	O
a	O
Memory	B-General_Concept
Management	I-General_Concept
Unit	I-General_Concept
(	O
MMU	O
)	O
in	O
the	O
Blackfin	B-General_Concept
documentation	O
,	O
the	O
Blackfin	B-General_Concept
MPU	O
does	O
not	O
provide	O
address	B-Architecture
translation	I-Architecture
like	O
a	O
traditional	O
MMU	O
,	O
so	O
it	O
does	O
not	O
support	O
virtual	B-Architecture
memory	I-Architecture
or	O
separate	O
memory	O
addresses	O
per	O
process	O
.	O
</s>
<s>
This	O
is	O
why	O
Blackfin	B-General_Concept
currently	O
can	B-Protocol
not	O
support	O
operating	B-General_Concept
systems	I-General_Concept
requiring	O
virtual	B-Architecture
memory	I-Architecture
such	O
as	O
WinCE	B-Operating_System
or	O
QNX	B-Operating_System
.	O
</s>
<s>
Blackfin	B-General_Concept
supports	O
three	O
run-time	B-Operating_System
modes	I-Operating_System
:	O
supervisor	O
,	O
user	O
and	O
emulation	O
.	O
</s>
<s>
However	O
,	O
when	O
in	O
user	O
mode	O
,	O
system	O
resources	O
and	O
regions	O
of	O
memory	O
can	B-Protocol
be	O
protected	O
(	O
with	O
the	O
help	O
of	O
the	O
MPU	O
)	O
.	O
</s>
<s>
In	O
a	O
modern	O
operating	B-General_Concept
system	I-General_Concept
or	O
RTOS	B-Operating_System
,	O
the	O
kernel	O
typically	O
runs	O
in	O
supervisor	O
mode	O
and	O
threads/processes	O
will	O
run	O
in	O
user	O
mode	O
.	O
</s>
<s>
an	O
exception	B-General_Concept
will	O
be	O
thrown	O
and	O
the	O
kernel	O
will	O
then	O
be	O
able	O
to	O
shut	O
down	O
the	O
offending	O
thread/process	O
.	O
</s>
<s>
The	O
official	O
guidance	O
from	O
ADI	O
on	O
how	O
to	O
use	O
the	O
Blackfin	B-General_Concept
in	O
non-OS	O
environments	O
is	O
to	O
reserve	O
the	O
lowest-priority	O
interrupt	O
for	O
general-purpose	O
code	O
so	O
that	O
all	O
software	O
is	O
run	O
in	O
supervisor	O
space	O
.	O
</s>
<s>
Blackfin	B-General_Concept
uses	O
a	O
variable-length	O
RISC-like	O
instruction	B-General_Concept
set	I-General_Concept
consisting	O
of	O
16-	O
,	O
32	O
-	O
and	O
64-bit	O
instructions	B-General_Concept
.	O
</s>
<s>
Commonly	O
used	O
control	O
instructions	B-General_Concept
are	O
encoded	O
as	O
16-bit	O
opcodes	B-Language
while	O
complex	O
DSP	B-Architecture
and	O
mathematically	O
intensive	O
functions	O
are	O
encoded	O
as	O
32	O
-	O
and	O
64-bit	O
opcodes	B-Language
.	O
</s>
<s>
This	O
variable	B-General_Concept
length	O
opcode	B-Language
encoding	O
is	O
designed	O
for	O
code	O
density	O
equivalence	O
to	O
modern	O
microprocessor	B-Architecture
architectures	O
.	O
</s>
<s>
The	O
Blackfin	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
contains	O
media-processing	O
extensions	O
to	O
help	O
accelerate	O
pixel-processing	O
operations	O
commonly	O
used	O
in	O
video	O
compression	O
and	O
image	B-General_Concept
compression	I-General_Concept
and	O
decompression	O
algorithms	O
.	O
</s>
<s>
Blackfin	B-General_Concept
processors	O
contain	O
an	O
array	O
of	O
connectivity	O
peripherals	O
,	O
depending	O
on	O
the	O
specific	O
processor	O
:	O
</s>
<s>
PPI	B-Device
:	O
A	O
parallel	O
input/output	O
port	O
that	O
can	B-Protocol
be	O
used	O
to	O
connect	O
to	O
LCDs	O
,	O
video	O
encoders	O
(	O
video	O
DACs	O
)	O
,	O
video	O
decoders	O
(	O
video	O
ADCs	O
)	O
,	O
CMOS	O
sensors	O
,	O
CCDs	O
and	O
generic	O
,	O
parallel	O
,	O
high-speed	O
devices	O
.	O
</s>
<s>
The	O
PPI	B-Device
can	B-Protocol
run	O
up	O
to	O
75MHz	O
and	O
can	B-Protocol
be	O
configured	O
from	O
8	O
to	O
16-bits	O
wide	O
.	O
</s>
<s>
SPORT	O
:	O
A	O
synchronous	O
,	O
high	O
speed	O
serial	O
port	O
that	O
can	B-Protocol
support	O
TDM	B-Protocol
,	O
I²S	O
and	O
a	O
number	O
of	O
other	O
configurable	O
framing	O
modes	O
for	O
connection	O
to	O
ADCs	O
,	O
DACs	O
,	O
other	O
processors	O
,	O
FPGAs	O
,	O
etc	O
.	O
</s>
<s>
All	O
of	O
the	O
peripheral	O
control	B-Operating_System
registers	I-Operating_System
are	O
memory-mapped	B-Architecture
in	O
the	O
normal	O
address	O
space	O
.	O
</s>
<s>
ADI	O
provides	O
its	O
own	O
software	O
development	O
toolchains	B-General_Concept
.	O
</s>
<s>
The	O
original	O
VisualDSP++	O
IDE	B-Application
is	O
still	O
supported	O
(	O
its	O
last	O
release	O
was	O
5.1.2	O
in	O
)	O
,	O
but	O
is	O
approaching	O
end	O
of	O
life	O
and	O
has	O
not	O
had	O
support	O
added	O
for	O
the	O
new	O
BF6xx	O
and	O
BF7xx	O
processors	O
.	O
</s>
<s>
The	O
newer	O
toolchain	B-General_Concept
is	O
CrossCore	O
Embedded	O
Studio	O
,	O
which	O
uses	O
supports	O
all	O
Blackfin	B-General_Concept
and	O
Blackfin+	O
processors	O
using	O
upgraded	O
versions	O
of	O
the	O
same	O
compiler	B-Language
and	O
tools	O
internally	O
,	O
but	O
with	O
a	O
UI	O
based	O
on	O
Eclipse	B-Application
CDT	I-Application
.	O
</s>
<s>
Other	O
options	O
include	O
Green	O
Hills	O
Software	O
's	O
MULTI	O
IDE	B-Application
and	O
the	O
GNU	B-Application
GCC	I-Application
Toolchain	B-General_Concept
for	O
the	O
Blackfin	B-General_Concept
processor	O
family	O
.	O
</s>
<s>
GCC	B-Application
lacks	O
support	O
for	O
BF50x	O
,	O
BF566	O
,	O
and	O
BF59x	O
,	O
and	O
has	O
incomplete	O
support	O
for	O
BF561	O
.	O
</s>
<s>
Blackfin	B-General_Concept
is	O
also	O
supported	O
by	O
National	O
Instruments	O
 '	O
LabVIEW	B-Application
Embedded	O
Module	O
,	O
which	O
requires	O
VisualDSP++	O
.	O
</s>
<s>
Several	O
commercial	O
and	O
open-source	O
operating	B-General_Concept
systems	I-General_Concept
support	O
running	O
on	O
Blackfin	B-General_Concept
.	O
</s>
<s>
+	O
OS/RTOS/Kernels	O
on	O
BlackfinTitle	O
License	O
Comments	O
ThreadX	B-Operating_System
Nucleus	B-Operating_System
μC/OS	B-Operating_System
-II	I-Operating_System
INTEGRITY	B-Operating_System
RTEMS	B-Operating_System
RTXC	B-Operating_System
Quadros	I-Operating_System
VDK	O
ADI	O
's	O
real-time	B-General_Concept
kernel	O
.	O
</s>
<s>
.NET	B-Application
Micro	I-Application
Framework	I-Application
Stand-alone	O
version	O
from	O
Microsoft	O
.	O
</s>
<s>
Blackfin	B-General_Concept
was	O
previously	O
supported	O
by	O
μClinux	B-Application
and	O
later	O
by	O
Linux	B-Application
with	O
the	O
NOMMU	O
feature	O
,	O
but	O
as	O
it	O
was	O
not	O
ever	O
widely	O
used	O
and	O
no	O
longer	O
had	O
a	O
maintainer	O
,	O
support	O
was	O
removed	O
from	O
Linux	B-Application
on	O
April	O
1	O
,	O
2018	O
;	O
4.16	O
was	O
the	O
last	O
release	O
to	O
include	O
Blackfin	B-General_Concept
support	O
.	O
</s>
