<s>
Atomic	B-Algorithm
layer	I-Algorithm
etching	I-Algorithm
is	O
an	O
emerging	O
technique	O
in	O
semiconductor	B-Architecture
manufacture	I-Architecture
,	O
in	O
which	O
a	O
sequence	O
alternating	O
between	O
self-limiting	O
chemical	O
modification	O
steps	O
which	O
affect	O
only	O
the	O
top	O
atomic	O
layers	O
of	O
the	O
wafer	O
,	O
and	O
etching	O
steps	O
which	O
remove	O
only	O
the	O
chemically-modified	O
areas	O
,	O
allows	O
the	O
removal	O
of	O
individual	O
atomic	O
layers	O
.	O
</s>
<s>
This	O
is	O
a	O
better-controlled	O
process	O
than	O
reactive	B-Algorithm
ion	I-Algorithm
etching	I-Algorithm
,	O
though	O
the	O
issue	O
with	O
commercial	O
use	O
of	O
it	O
has	O
been	O
throughput	O
;	O
sophisticated	O
gas	O
handling	O
is	O
required	O
,	O
and	O
removal	O
rates	O
of	O
one	O
atomic	O
layer	O
per	O
second	O
are	O
around	O
the	O
state	O
of	O
the	O
art	O
.	O
</s>
<s>
ALD	O
is	O
substantially	O
more	O
mature	O
,	O
having	O
been	O
used	O
by	O
Intel	O
for	O
high-κ	B-Algorithm
dielectric	I-Algorithm
layers	O
since	O
2007	O
and	O
in	O
Finland	O
in	O
the	O
fabrication	B-Architecture
of	O
thin	O
film	O
electroluminescent	O
devices	O
since	O
1985	O
.	O
</s>
