<s>
PRISM	O
(	O
Parallel	O
Reduced	B-Architecture
Instruction	I-Architecture
Set	I-Architecture
Multiprocessor	O
)	O
was	O
Apollo	O
Computer	O
's	O
high-performance	O
CPU	B-Device
used	O
in	O
their	O
DN10000	B-Device
series	O
workstations	B-Device
.	O
</s>
<s>
It	O
was	O
for	O
some	O
time	O
the	O
fastest	O
microprocessor	B-Architecture
available	O
,	O
a	O
high	O
fraction	O
of	O
a	O
Cray-1	B-Device
in	O
a	O
workstation	B-Device
.	O
</s>
<s>
Hewlett-Packard	O
purchased	O
Apollo	O
in	O
1989	O
,	O
ending	O
development	O
of	O
PRISM	O
,	O
although	O
some	O
of	O
PRISM	O
's	O
ideas	O
were	O
later	O
used	O
in	O
HP	O
's	O
own	O
HP-PA	B-Device
Reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
and	O
Itanium	B-General_Concept
processors	O
.	O
</s>
<s>
PRISM	O
was	O
based	O
on	O
what	O
would	O
be	O
known	O
today	O
as	O
a	O
VLIW-design	O
,	O
while	O
most	O
efforts	O
of	O
the	O
era	O
,	O
1988	O
,	O
were	O
based	O
on	O
a	O
more	O
"	O
pure	O
"	O
RISC	B-Architecture
approach	O
.	O
</s>
<s>
In	O
early	O
RISC	B-Architecture
designs	O
,	O
the	O
core	O
processor	O
was	O
simplified	O
as	O
much	O
as	O
possible	O
in	O
order	O
to	O
allow	O
more	O
of	O
the	O
chip	O
's	O
real-estate	O
to	O
be	O
used	O
for	O
registers	B-General_Concept
and	O
simplifying	O
the	O
addition	O
of	O
instruction	B-General_Concept
pipelines	I-General_Concept
for	O
improved	O
performance	O
.	O
</s>
<s>
The	O
compilers	B-Language
used	O
with	O
the	O
systems	O
were	O
expected	O
to	O
dedicate	O
more	O
time	O
during	O
compilation	B-Language
to	O
making	O
effective	O
use	O
of	O
the	O
registers	B-General_Concept
and	O
cleaning	O
the	O
instruction	O
stream	O
.	O
</s>
<s>
By	O
doing	O
instruction	O
scheduling	O
in	O
the	O
compiler	B-Language
,	O
this	O
design	O
avoided	O
the	O
problems	O
and	O
complexity	O
of	O
dynamic	O
instruction	O
scheduling	O
(	O
where	O
instructions	O
for	O
multiple	O
functional	B-General_Concept
units	I-General_Concept
must	O
be	O
selected	O
carefully	O
in	O
order	O
to	O
avoid	O
interdependencies	O
between	O
intermediate	O
values	O
)	O
encountered	O
in	O
superscalar	B-General_Concept
designs	O
such	O
as	O
Digital	O
Equipment	O
Corporation	O
's	O
Alpha	B-Device
.	O
</s>
<s>
In	O
some	O
respects	O
,	O
the	O
VLIW	B-General_Concept
design	O
can	O
be	O
thought	O
of	O
as	O
"	O
super-RISCy	O
"	O
,	O
as	O
it	O
offloads	O
the	O
instruction	O
selection	O
process	O
to	O
the	O
compiler	B-Language
as	O
well	O
.	O
</s>
<s>
In	O
the	O
VLIW	B-General_Concept
design	O
,	O
the	O
compiler	B-Language
examines	O
the	O
code	O
and	O
selects	O
instructions	O
that	O
are	O
known	O
to	O
be	O
"	O
safe	O
"	O
,	O
and	O
then	O
packages	O
them	O
into	O
longer	O
instruction	O
words	O
.	O
</s>
<s>
For	O
instance	O
,	O
for	O
a	O
CPU	B-Device
with	O
two	O
functional	B-General_Concept
units	I-General_Concept
,	O
like	O
the	O
PRISM	O
,	O
the	O
compiler	B-Language
would	O
find	O
pairs	O
of	O
safe	O
instructions	O
and	O
stuff	O
them	O
into	O
a	O
single	O
larger	O
word	O
.	O
</s>
<s>
Inside	O
the	O
CPU	B-Device
,	O
the	O
instructions	O
are	O
simply	O
split	O
apart	O
again	O
,	O
and	O
fed	O
into	O
the	O
selected	O
units	O
.	O
</s>
<s>
This	O
design	O
minimizes	O
logical	O
changes	O
to	O
the	O
CPU	B-Device
as	O
functional	B-General_Concept
units	I-General_Concept
are	O
added	O
,	O
as	O
the	O
compiler	B-Language
is	O
handling	O
the	O
instruction	O
selection	O
.	O
</s>
<s>
However	O
,	O
this	O
also	O
ties	O
the	O
compiled	B-Language
code	O
very	O
tightly	O
to	O
the	O
processor	O
design	O
;	O
for	O
instance	O
,	O
if	O
a	O
new	O
generation	O
of	O
the	O
CPU	B-Device
adds	O
additional	O
functional	B-General_Concept
units	I-General_Concept
,	O
all	O
programs	O
running	O
on	O
it	O
must	O
be	O
re-compiled	O
so	O
the	O
compiler	B-Language
can	O
re-arrange	O
the	O
instructions	O
again	O
,	O
perhaps	O
four-wide	O
instead	O
of	O
two-wide	O
.	O
</s>
<s>
In	O
comparison	O
,	O
a	O
more	O
traditional	O
design	O
like	O
the	O
PowerPC	B-Architecture
(	O
PPC	O
)	O
has	O
seen	O
dramatic	O
internal	O
changes	O
,	O
yet	O
code	O
written	O
for	O
the	O
first	O
PPC	O
's	O
will	O
still	O
run	O
without	O
modification	O
on	O
the	O
latest	O
versions	O
.	O
</s>
<s>
The	O
Apollo	O
compilers	B-Language
were	O
the	O
first	O
commercial	O
compilers	B-Language
to	O
use	O
single	O
static	O
assignment	O
techniques	O
.	O
</s>
<s>
PRISM	O
was	O
a	O
"	O
pure	O
"	O
32-bit	O
design	O
,	O
including	O
thirty-two	O
32-bit	O
integer	O
and	O
thirty-two	O
64-bit	O
floating	B-Algorithm
point	I-Algorithm
registers	B-General_Concept
(	O
overlaid	O
by	O
sixty-four	O
32-bit	O
registers	B-General_Concept
)	O
.	O
</s>
<s>
PRISM	O
could	O
dispatch	O
a	O
single	O
integer	O
or	O
one	O
integer	O
and	O
one	O
floating	B-Algorithm
point	I-Algorithm
instruction	O
per	O
clock	O
cycle	O
.	O
</s>
<s>
The	O
floating-point	B-Algorithm
instruction	O
could	O
,	O
in	O
turn	O
,	O
combine	O
a	O
floating-point	B-Algorithm
add	O
and	O
multiply	O
in	O
a	O
single	O
instruction	O
.	O
</s>
<s>
The	O
compiler	B-Language
attempted	O
to	O
always	O
pair	O
(	O
or	O
triple	O
)	O
instructions	O
up	O
to	O
maintain	O
full	O
use	O
of	O
the	O
internal	O
units	O
,	O
but	O
if	O
it	O
failed	O
to	O
find	O
a	O
safe	O
pair	O
it	O
simply	O
fed	O
in	O
a	O
single	O
integer	O
instruction	O
.	O
</s>
<s>
PRISM	O
was	O
one	O
of	O
the	O
first	O
designs	O
to	O
include	O
a	O
multiply	O
with	O
add/subtract/truncate	O
in	O
a	O
single	O
(	O
five	O
operand	O
)	O
instruction	O
,	O
so	O
it	O
was	O
often	O
described	O
as	O
a	O
three-issue	O
CPU	B-Device
.	O
</s>
<s>
The	O
original	O
PRISM	O
design	O
was	O
introduced	O
in	O
1988	O
in	O
the	O
one-to-four-CPU	O
Apollo	B-Device
DN10000	I-Device
workstations	B-Device
.	O
</s>
<s>
The	O
"	O
DN	O
"	O
in	O
the	O
name	O
refers	O
to	O
"	O
Domain	O
Node	O
"	O
,	O
Domain/OS	B-Application
being	O
the	O
Unix-like	B-Operating_System
operating	I-Operating_System
system	I-Operating_System
used	O
on	O
all	O
of	O
Apollo	O
's	O
machines	O
.	O
</s>
<s>
Note	O
that	O
PRISM	O
was	O
a	O
multi-chip	O
CPU	B-Device
board	O
,	O
not	O
a	O
single	O
microprocessor	B-Architecture
;	O
this	O
was	O
fairly	O
common	O
for	O
high-end	O
CPUs	B-Device
at	O
the	O
time	O
.	O
</s>
<s>
Approximately	O
one	O
thousand	O
DN10000	B-Device
systems	O
were	O
sold	O
.	O
</s>
<s>
PRISM	O
II	O
,	O
running	O
at	O
twice	O
the	O
clock	O
speed	O
,	O
was	O
delayed	O
by	O
problems	O
in	O
fabing	B-Architecture
,	O
and	O
then	O
eventually	O
cancelled	O
after	O
the	O
HP	O
purchase	O
.	O
</s>
<s>
Nevertheless	O
,	O
several	O
features	O
of	O
the	O
PRISM	O
design	O
were	O
put	O
into	O
later	O
generations	O
of	O
the	O
HP-PA	B-Device
architecture	O
,	O
and	O
the	O
two	O
main	O
proponents	O
of	O
the	O
VLIW	B-General_Concept
concept	O
,	O
Intel	O
and	O
HP	O
,	O
later	O
collaborated	O
on	O
the	O
Itanium	B-General_Concept
.	O
</s>
<s>
The	O
PRISM	O
was	O
claimed	O
to	O
be	O
the	O
fastest	O
CPU	B-Device
on	O
the	O
market	O
during	O
its	O
short	O
life-span	O
.	O
</s>
<s>
Benchmarking	O
indicated	O
that	O
the	O
speed	O
of	O
the	O
DN10000	B-Device
's	O
CPU	B-Device
was	O
comparable	O
to	O
that	O
of	O
the	O
MIPS	O
M/2000	O
-6	O
,	O
a	O
20MHz	O
R3000	O
,	O
but	O
the	O
DN10000	B-Device
as	O
a	O
system	O
had	O
around	O
twice	O
the	O
performance	O
of	O
the	O
MIPS	O
M/2000	O
-6	O
.	O
</s>
<s>
In	O
comparison	O
with	O
common	O
RISC	B-Architecture
designs	O
of	O
the	O
era	O
,	O
the	O
PRISM	O
was	O
effectively	O
two	O
CPUs	B-Device
in	O
one	O
,	O
making	O
it	O
roughly	O
double	O
the	O
performance	O
of	O
a	O
RISC	B-Architecture
CPU	B-Device
running	O
at	O
the	O
same	O
clock	O
speed	O
.	O
</s>
<s>
Although	O
the	O
Intel	B-General_Concept
i860	I-General_Concept
also	O
used	O
a	O
VLIW	B-General_Concept
(	O
or	O
properly	O
LIW	O
in	O
both	O
cases	O
,	O
as	O
two	O
is	O
not	O
"	O
very	O
"	O
long	O
)	O
,	O
extracting	O
performance	O
from	O
the	O
i860	O
proved	O
notoriously	O
difficult	O
,	O
and	O
in	O
practice	O
the	O
PRISM	O
was	O
much	O
faster	O
.	O
</s>
<s>
Digital	O
Equipment	O
Corporation	O
also	O
engineered	O
a	O
RISC	B-Architecture
chip	I-Architecture
named	I-Architecture
PRISM	I-Architecture
during	O
the	O
same	O
era	O
,	O
but	O
that	O
project	O
was	O
canceled	O
in	O
1988	O
,	O
and	O
never	O
entered	O
production	O
.	O
</s>
