<s>
In	O
computing	O
,	O
an	O
aperture	B-General_Concept
is	O
a	O
portion	O
of	O
physical	B-General_Concept
address	I-General_Concept
space	O
(	O
i.e.	O
</s>
<s>
physical	O
memory	B-General_Concept
)	O
that	O
is	O
associated	O
with	O
a	O
particular	O
peripheral	B-Device
device	I-Device
or	O
a	O
memory	B-General_Concept
unit	O
.	O
</s>
<s>
Apertures	B-General_Concept
may	O
reach	O
external	B-Device
devices	I-Device
such	O
as	O
ROM	B-Device
or	O
RAM	B-Architecture
chips	I-Architecture
,	O
or	O
internal	O
memory	B-General_Concept
on	O
the	O
CPU	B-General_Concept
itself	O
.	O
</s>
<s>
Typically	O
,	O
a	O
memory	B-General_Concept
device	I-General_Concept
attached	O
to	O
a	O
computer	O
accepts	O
addresses	O
starting	O
at	O
zero	O
,	O
and	O
so	O
a	O
system	O
with	O
more	O
than	O
one	O
such	O
device	O
would	O
have	O
ambiguous	O
addressing	O
.	O
</s>
<s>
To	O
resolve	O
this	O
,	O
the	O
memory	B-General_Concept
logic	O
will	O
contain	O
several	O
aperture	B-General_Concept
selectors	B-Protocol
,	O
each	O
containing	O
a	O
range	O
selector	O
and	O
an	O
interface	O
to	O
one	O
of	O
the	O
memory	B-General_Concept
devices	I-General_Concept
.	O
</s>
<s>
The	O
set	O
of	O
selector	O
address	B-General_Concept
ranges	I-General_Concept
of	O
the	O
apertures	B-General_Concept
are	O
disjoint	O
.	O
</s>
<s>
When	O
the	O
CPU	B-General_Concept
presents	O
a	O
physical	B-General_Concept
address	I-General_Concept
within	O
the	O
range	O
recognized	O
by	O
an	O
aperture	B-General_Concept
,	O
the	O
aperture	B-General_Concept
unit	O
routes	O
the	O
request	O
(	O
with	O
the	O
address	O
remapped	O
to	O
a	O
zero	O
base	O
)	O
to	O
the	O
attached	O
device	O
.	O
</s>
<s>
Thus	O
,	O
apertures	B-General_Concept
form	O
a	O
layer	O
of	O
address	B-General_Concept
translation	I-General_Concept
below	O
the	O
level	O
of	O
the	O
usual	O
virtual-to-physical	O
mapping	O
.	O
</s>
