<s>
Anodic	B-Algorithm
bonding	I-Algorithm
is	O
a	O
wafer	B-Algorithm
bonding	I-Algorithm
process	O
to	O
seal	O
glass	O
to	O
either	O
silicon	O
or	O
metal	O
without	O
introducing	O
an	O
intermediate	O
layer	O
;	O
it	O
is	O
commonly	O
used	O
to	O
seal	O
glass	O
to	O
silicon	B-Architecture
wafers	I-Architecture
in	O
electronics	O
and	O
microfluidics	O
.	O
</s>
<s>
The	O
requirements	O
for	O
anodic	B-Algorithm
bonding	I-Algorithm
are	O
clean	O
and	O
even	O
wafer	B-Architecture
surfaces	O
and	O
atomic	O
contact	O
between	O
the	O
bonding	O
substrates	B-Architecture
through	O
a	O
sufficiently	O
powerful	O
electrostatic	O
field	O
.	O
</s>
<s>
Anodic	B-Algorithm
bonding	I-Algorithm
can	O
be	O
applied	O
with	O
glass	O
wafers	B-Architecture
at	O
temperatures	O
of	O
250	O
to	O
400°C	O
or	O
with	O
sputtered	O
glass	O
at	O
400°C	O
.	O
</s>
<s>
The	O
glass	O
substrate	B-Architecture
encapsulation	O
protects	O
from	O
environmental	O
influences	O
,	O
e.g.	O
</s>
<s>
Further	O
,	O
other	O
materials	O
are	O
used	O
for	O
anodic	B-Algorithm
bonding	I-Algorithm
with	O
silicon	O
,	O
i.e.	O
</s>
<s>
Anodic	B-Algorithm
bonding	I-Algorithm
on	O
silicon	O
substrates	B-Architecture
is	O
divided	O
into	O
bonding	O
using	O
a	O
thin	O
sheet	O
of	O
glass	O
(	O
a	O
wafer	B-Architecture
)	O
or	O
a	O
glass	O
layer	O
that	O
is	O
deposited	O
onto	O
the	O
silicon	O
using	O
a	O
technique	O
such	O
as	O
sputtering	O
.	O
</s>
<s>
The	O
glass	O
wafer	B-Architecture
is	O
often	O
sodium-containing	O
Borofloat	O
or	O
Pyrex	O
glasses	O
.	O
</s>
<s>
With	O
an	O
intermediate	O
glass	O
layer	O
,	O
it	O
is	O
also	O
possible	O
to	O
connect	O
two	O
silicon	B-Architecture
wafers	I-Architecture
.	O
</s>
<s>
The	O
glass	O
layers	O
are	O
deposited	O
by	O
sputtering	O
,	O
spin-on	O
of	O
a	O
glass	O
solution	O
or	O
vapor	O
deposition	O
upon	O
the	O
processed	O
silicon	B-Architecture
wafer	I-Architecture
.	O
</s>
<s>
Bonding	O
of	O
thermally	O
oxidized	O
wafers	B-Architecture
without	O
a	O
glass	O
layer	O
is	O
also	O
possible	O
.	O
</s>
<s>
The	O
procedural	O
steps	O
of	O
anodic	B-Algorithm
bonding	I-Algorithm
are	O
divided	O
into	O
the	O
following	O
:	O
</s>
<s>
Differing	O
coefficients	O
of	O
thermal	O
expansion	O
pose	O
challenges	O
for	O
anodic	B-Algorithm
bonding	I-Algorithm
.	O
</s>
<s>
Anodic	B-Algorithm
bonding	I-Algorithm
is	O
first	O
mentioned	O
by	O
Wallis	O
and	O
Pomerantz	O
in	O
1969	O
.	O
</s>
<s>
It	O
is	O
applied	O
as	O
bonding	O
of	O
silicon	B-Architecture
wafers	I-Architecture
to	O
sodium	O
containing	O
glass	O
wafers	B-Architecture
under	O
the	O
influence	O
of	O
an	O
applied	O
electric	O
field	O
.	O
</s>
<s>
The	O
anodic	B-Algorithm
bonding	I-Algorithm
procedure	O
is	O
able	O
to	O
bond	O
hydrophilic	O
and	O
hydrophobic	O
silicon	O
surfaces	O
equally	O
effectively	O
.	O
</s>
<s>
Even	O
though	O
anodic	B-Algorithm
bonding	I-Algorithm
is	O
relatively	O
tolerant	O
to	O
contaminations	O
,	O
a	O
widely	O
established	O
cleaning	O
procedure	O
RCA	B-Algorithm
takes	O
place	O
to	O
remove	O
any	O
surface	O
impurities	O
.	O
</s>
<s>
The	O
glass	O
wafer	B-Architecture
can	O
also	O
be	O
chemically	O
etched	O
or	O
powder	O
blasted	O
for	O
creating	O
small	O
cavities	O
,	O
where	O
MEMS	O
devices	O
can	O
be	O
accommodated	O
.	O
</s>
<s>
The	O
wafers	B-Architecture
that	O
meet	O
the	O
requirements	O
are	O
put	O
into	O
atomic	O
contact	O
.	O
</s>
<s>
The	O
anodic	B-Algorithm
bonding	I-Algorithm
procedure	O
is	O
based	O
on	O
a	O
glass	O
wafer	B-Architecture
that	O
is	O
usually	O
placed	O
above	O
a	O
silicon	B-Architecture
wafer	I-Architecture
.	O
</s>
<s>
An	O
electrode	O
is	O
in	O
contact	O
with	O
the	O
glass	O
wafer	B-Architecture
either	O
through	O
a	O
needle	O
or	O
a	O
full	O
area	O
cathode	O
electrode	O
.	O
</s>
<s>
The	O
wafers	B-Architecture
are	O
placed	O
between	O
the	O
chuck	O
and	O
the	O
top	O
tool	O
used	O
as	O
bond	O
electrode	O
at	O
temperatures	O
between	O
200	O
and	O
500°C	O
(	O
compare	O
to	O
image	O
"	O
scheme	O
of	O
anodic	B-Algorithm
bonding	I-Algorithm
procedure	O
"	O
)	O
but	O
below	O
the	O
softening	O
point	O
of	O
glass	O
(	O
glass	O
transition	O
temperature	O
)	O
.	O
</s>
<s>
This	O
affects	O
a	O
positive	O
volume	O
charge	O
in	O
the	O
silicon	B-Architecture
wafer	I-Architecture
on	O
the	O
opposite	O
side	O
.	O
</s>
<s>
As	O
a	O
result	O
,	O
a	O
few	O
micrometer	O
thick	O
high-impedance	O
depletion	O
region	O
is	O
developed	O
at	O
the	O
bond	O
barrier	O
in	O
the	O
glass	O
wafer	B-Architecture
.	O
</s>
<s>
Based	O
on	O
the	O
high	O
field	O
intensity	O
in	O
the	O
depletion	O
region	O
or	O
in	O
the	O
gap	O
at	O
the	O
interface	O
,	O
both	O
wafer	B-Architecture
surfaces	O
are	O
pressed	O
together	O
at	O
a	O
specific	O
bond	O
voltage	O
and	O
bond	O
temperature	O
.	O
</s>
<s>
The	O
pressure	O
is	O
applied	O
to	O
create	O
intimate	O
contact	O
between	O
the	O
surfaces	O
to	O
ensure	O
good	O
electrical	O
conduction	O
across	O
the	O
wafer	B-Architecture
pair	O
.	O
</s>
<s>
If	O
using	O
thermally	O
oxidized	O
wafers	B-Architecture
without	O
a	O
glass	O
layer	O
,	O
the	O
diffusion	O
of	O
OH−	O
and	O
H+	O
ions	O
instead	O
of	O
Na+	O
ions	O
leads	O
to	O
the	O
bonding	O
.	O
</s>
