<s>
Alder	B-Device
Lake	I-Device
is	O
Intel	O
's	O
codename	B-Architecture
for	O
the	O
12th	O
generation	O
of	O
Intel	B-Device
Core	I-Device
processors	O
based	O
on	O
a	O
hybrid	O
architecture	O
utilizing	O
Golden	B-Device
Cove	I-Device
performance	O
cores	B-Architecture
and	O
Gracemont	B-Device
efficient	O
cores	B-Architecture
.	O
</s>
<s>
It	O
is	O
fabricated	O
using	O
Intel	O
's	O
Intel	B-Algorithm
7	I-Algorithm
process	O
,	O
previously	O
referred	O
to	O
as	O
Intel	O
10nm	O
Enhanced	O
SuperFin	O
(	O
10ESF	O
)	O
.	O
</s>
<s>
The	O
10ESF	O
has	O
a	O
10%	O
-15	O
%	O
boost	O
in	O
performance	O
over	O
the	O
10SF	O
used	O
in	O
the	O
mobile	O
Tiger	B-Device
Lake	I-Device
processors	O
.	O
</s>
<s>
Intel	O
officially	O
announced	O
12th	O
Gen	O
Intel	B-Device
Core	I-Device
CPUs	O
on	O
October	O
27	O
,	O
2021	O
.	O
</s>
<s>
Intel	O
officially	O
announced	O
12th	O
Gen	O
Intel	B-Device
Core	I-Device
mobile	O
CPUs	O
and	O
non-K	O
series	O
desktop	O
CPUs	O
on	O
January	O
4	O
,	O
2022	O
.	O
</s>
<s>
Fabricated	O
using	O
Intel	O
's	O
Intel	B-Algorithm
7	I-Algorithm
process	O
,	O
which	O
was	O
previously	O
referred	O
to	O
as	O
Intel	O
10nm	O
Enhanced	O
SuperFin	O
(	O
10ESF	O
)	O
,	O
Intel	O
officially	O
announced	O
12th	O
Gen	O
Intel	B-Device
Core	I-Device
CPUs	O
on	O
October	O
27	O
,	O
2021	O
.	O
</s>
<s>
Intel	O
then	O
officially	O
announced	O
12th	O
Gen	O
Intel	B-Device
Core	I-Device
mobile	O
CPUs	O
and	O
non-K	O
series	O
desktop	O
CPUs	O
on	O
January	O
4	O
,	O
2022	O
.	O
</s>
<s>
It	O
further	O
was	O
announced	O
in	O
January	O
2022	O
that	O
Intel	B-Device
Alder	I-Device
Lake	I-Device
would	O
use	O
a	O
hybrid	O
architecture	O
combining	O
performance	O
and	O
efficiency	O
cores	B-Architecture
,	O
similar	O
to	O
ARM	B-Architecture
big.LITTLE	I-Architecture
.	O
</s>
<s>
While	O
the	O
desktop	O
Alder	B-Device
Lake	I-Device
processors	O
were	O
already	O
on	O
the	O
market	O
by	O
January	O
2022	O
,	O
the	O
mobile	O
processors	O
were	O
not	O
,	O
although	O
release	O
was	O
expected	O
early	O
that	O
year	O
.	O
</s>
<s>
Gracemont	B-Device
was	O
the	O
name	O
given	O
to	O
the	O
efficiency	O
cores	B-Architecture
,	O
while	O
Golden	B-Device
Cove	I-Device
cores	B-Architecture
were	O
set	O
for	O
tasks	O
such	O
as	O
gaming	O
and	O
video	O
processing	O
.	O
</s>
<s>
Intel	O
officially	O
announced	O
the	O
HX	O
processor	O
series	O
on	O
May	O
10	O
,	O
2022	O
,	O
including	O
Core	B-Device
i5	I-Device
,	O
Core	B-Device
i7	I-Device
and	O
Core	B-Device
i9	I-Device
models	O
,	O
when	O
Intel	O
announced	O
"	O
seven	O
new	O
mobile	O
processors	O
for	O
the	O
12th	O
Gen	O
Intel	B-Device
Core	I-Device
mobile	O
family	O
at	O
its	O
Intel	O
Vision	O
event	O
.	O
</s>
<s>
With	O
the	O
lineup	O
based	O
on	O
Intel	O
's	O
desktop	O
Alder	B-Device
Lake	I-Device
chips	O
,	O
it	O
was	O
named	O
the	O
Alder	O
Lake-HX	O
series	O
,	O
or	O
12th-gen	O
Core	O
HX	O
,	O
with	O
the	O
Core	O
i9-12950HX	O
as	O
the	O
flagship	O
and	O
Intel	O
's	O
first	O
16-core	O
chip	O
designed	O
for	O
laptops	O
.	O
</s>
<s>
AVX-512	B-General_Concept
(	O
including	O
FP16	O
)	O
is	O
present	O
but	O
disabled	O
by	O
default	O
to	O
match	O
E-cores	O
.	O
</s>
<s>
On	O
early	O
revisions	O
of	O
microprocessors	O
it	O
still	O
can	O
be	O
enabled	O
on	O
some	O
motherboards	O
with	O
some	O
BIOS	O
versions	O
by	O
disabling	O
the	O
E-cores	O
.	O
</s>
<s>
Intel	O
has	O
physically	O
fused	O
off	O
AVX-512	B-General_Concept
on	O
later	O
revisions	O
of	O
Alder	B-Device
Lake	I-Device
CPUs	O
manufactured	O
in	O
early	O
2022	O
and	O
onward	O
.	O
</s>
<s>
Skylake-like	O
IPC	O
.	O
</s>
<s>
New	O
instruction	B-General_Concept
set	I-General_Concept
extensions	O
:	O
</s>
<s>
Intel	O
Thread	B-Operating_System
Director	O
(	O
only	O
for	O
CPUs	O
with	O
P	O
and	O
E	O
cores	B-Architecture
)	O
,	O
which	O
is	O
a	O
marketing	O
name	O
for	O
Enhanced	O
Hardware	O
Feedback	O
Interface	O
(	O
EHFI	O
)	O
.	O
</s>
<s>
This	O
is	O
a	O
hardware	O
technology	O
to	O
assist	O
the	O
OS	O
thread	B-Operating_System
scheduler	O
with	O
more	O
efficient	O
load	O
distribution	O
between	O
heterogeneous	O
CPU	B-Architecture
cores	I-Architecture
.	O
</s>
<s>
Cores	B-Architecture
:	O
</s>
<s>
LGA	B-Device
1700	I-Device
socket	O
for	O
desktop	O
processors	O
.	O
</s>
<s>
For	O
the	O
Alder	B-Device
Lake	I-Device
generation	O
,	O
Intel	O
will	O
initially	O
produce	O
4	O
different	O
dies	O
.	O
</s>
<s>
Each	O
die	O
has	O
a	O
different	O
number	O
of	O
P-cores	O
(	O
P	O
)	O
and	O
E-cores	O
(	O
E	O
)	O
and	O
GPU	B-Application
Execution	O
Units	O
.	O
</s>
<s>
Alder	B-Device
Lake	I-Device
requires	O
special	O
support	O
from	O
the	O
operating	O
system	O
due	O
to	O
its	O
relatively	O
unusual-for-x86	O
hybrid	O
nature	O
.	O
</s>
<s>
For	O
software	O
unable	O
to	O
be	O
upgraded	O
,	O
a	O
UEFI-provided	O
compatibility	O
mode	O
may	O
be	O
used	O
to	O
disable	O
the	O
E	O
cores	B-Architecture
;	O
it	O
is	O
enabled	O
by	O
the	O
user	O
turning	O
on	O
scroll	B-Device
lock	I-Device
.	O
</s>
<s>
The	O
P	O
and	O
E	O
cores	B-Architecture
of	O
early	O
versions	O
of	O
Alder	B-Device
Lake	I-Device
CPUs	O
reported	O
different	O
CPUID	B-Architecture
models	O
.	O
</s>
<s>
This	O
has	O
caused	O
issues	O
with	O
digital	O
rights	O
management	O
systems	O
that	O
perceive	O
the	O
P	O
and	O
E	O
cores	B-Architecture
as	O
being	O
separate	O
computers	O
,	O
and	O
falsely	O
enforce	O
license	B-Application
restrictions	O
preventing	O
a	O
particular	O
piece	O
of	O
software	O
from	O
being	O
executed	O
on	O
more	O
than	O
one	O
device	O
at	O
a	O
time	O
.	O
</s>
<s>
Some	O
of	O
the	O
games	O
were	O
identified	O
by	O
Intel	O
as	O
only	O
having	O
this	O
bug	O
on	O
Windows	B-Operating_System
10	I-Operating_System
,	O
and	O
functioning	O
correctly	O
on	O
Windows	B-Application
11	I-Application
(	O
with	O
some	O
of	O
them	O
dependent	O
on	O
Windows	B-Application
11	I-Application
patches	O
scheduled	O
to	O
be	O
released	O
in	O
November	O
2021	O
)	O
.	O
</s>
<s>
ExamSoft	O
similarly	O
stated	O
that	O
its	O
monitoring	O
software	O
for	O
educational	O
assessments	O
(	O
such	O
as	O
the	O
bar	O
examination	O
)	O
was	O
similarly	O
incompatible	O
with	O
Alder	B-Device
Lake	I-Device
CPUs	O
due	O
to	O
checks	O
detecting	O
virtual	B-Architecture
machines	I-Architecture
.	O
</s>
<s>
This	O
problem	O
has	O
been	O
fixed	O
in	O
a	O
microcode	B-Device
update	O
.	O
</s>
<s>
The	O
P	O
and	O
E	O
cores	B-Architecture
now	O
return	O
the	O
same	O
CPUID	B-Architecture
when	O
both	O
are	O
enabled	O
.	O
</s>
<s>
A	O
different	O
CPUID	B-Architecture
is	O
reported	O
when	O
E	O
cores	B-Architecture
are	O
disabled	O
and	O
only	O
P	O
cores	B-Architecture
are	O
enabled	O
.	O
</s>
<s>
The	O
AVX-512	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
extension	O
is	O
implemented	O
in	O
the	O
P	O
cores	B-Architecture
but	O
disabled	O
due	O
to	O
incompatibility	O
with	O
the	O
E	O
cores	B-Architecture
.	O
</s>
<s>
Hackers	B-Application
have	O
shown	O
that	O
it	O
is	O
possible	O
to	O
enable	O
the	O
AVX-512	B-General_Concept
instructions	O
on	O
the	O
P	O
cores	B-Architecture
when	O
the	O
E	O
cores	B-Architecture
are	O
disabled	O
and	O
an	O
old	O
microcode	B-Device
version	O
is	O
used	O
.	O
</s>
<s>
There	O
are	O
minor	O
differences	O
between	O
the	O
behavior	O
of	O
the	O
two	O
cores	B-Architecture
with	O
regard	O
to	O
an	O
undefined	O
overflow	O
flag	O
in	O
certain	O
bitwise	O
operations	O
.	O
</s>
<s>
Alder	B-Device
Lake	I-Device
's	O
CPU	O
topology	O
has	O
performance	O
implications	O
,	O
especially	O
for	O
gaming	O
environments	O
where	O
the	O
developers	O
are	O
not	O
used	O
to	O
NUMA	B-Operating_System
setups	O
.	O
</s>
<s>
Microsoft	O
added	O
support	O
for	O
Intel	O
Thread	B-Operating_System
Director	O
(	O
ITD	O
)	O
in	O
Windows	B-Application
11	I-Application
.	O
</s>
<s>
Support	O
in	O
Linux	O
is	O
merged	O
in	O
kernel	O
5.18	O
but	O
this	O
alone	O
is	O
not	O
sufficient	O
until	O
the	O
kernel	O
gets	O
hints	O
from	O
userspace	O
in	O
order	O
to	O
schedule	O
tasks	O
to	O
run	O
on	O
certain	O
types	O
of	O
cores	B-Architecture
.	O
</s>
<s>
The	O
CPU	O
family	O
no	O
longer	O
features	O
Intel	O
SGX	O
which	O
is	O
a	O
requirement	O
for	O
playing	O
UltraHD	B-Device
Blu-Ray	O
discs	O
.	O
</s>
<s>
Models	O
without	O
the	O
F	O
suffix	O
feature	O
either	O
of	O
the	O
following	O
integrated	O
UHD	B-Application
Graphics	I-Application
GPUs	O
,	O
all	O
with	O
base	O
frequency	O
of	O
300MHz	O
:	O
</s>
<s>
UHD	B-Application
Graphics	I-Application
770	O
with	O
32	O
EUs	O
,	O
</s>
<s>
UHD	B-Application
Graphics	I-Application
730	O
with	O
24	O
EUs	O
,	O
</s>
<s>
UHD	B-Application
Graphics	I-Application
710	O
with	O
16	O
EUs	O
.	O
</s>
<s>
By	O
default	O
,	O
Alder	B-Device
Lake	I-Device
CPUs	O
are	O
configured	O
to	O
run	O
at	O
Turbo	O
Power	O
at	O
all	O
times	O
and	O
Base	O
Power	O
is	O
only	O
guaranteed	O
when	O
P-Cores/E	O
-cores	O
do	O
not	O
exceed	O
the	O
base	O
clock	O
rate	O
.	O
</s>
<s>
CPUs	O
in	O
bold	O
below	O
feature	O
ECC	B-General_Concept
memory	I-General_Concept
support	O
only	O
when	O
paired	O
with	O
a	O
motherboard	O
based	O
on	O
the	O
W680	O
chipset	O
.	O
</s>
<s>
+	O
Processor	O
branding	O
Model	O
Cores	B-Architecture
(	O
threads	B-Operating_System
)	O
Base	O
clock	O
rate	O
(	O
GHz	O
)	O
TurboBoost	B-Device
2.0	O
(	O
GHz	O
)	O
Turbo	O
Max	O
3.0	O
(	O
GHz	O
)	O
GPU	B-Application
Smart	O
cache	O
Power	O
Release	O
date	O
Price	O
(	O
USD	O
)	O
Model	O
Max	O
.	O
</s>
<s>
CPUs	O
in	O
bold	O
below	O
feature	O
ECC	B-General_Concept
memory	I-General_Concept
support	O
only	O
when	O
paired	O
with	O
a	O
motherboard	O
based	O
on	O
the	O
WM690	O
chipset	O
.	O
</s>
<s>
+	O
Processor	O
branding	O
Model	O
Cores	B-Architecture
(	O
threads	B-Operating_System
)	O
Base	O
clock	O
rate	O
(	O
GHz	O
)	O
TurboBoost	B-Device
2.0	O
(	O
GHz	O
)	O
UHD	B-Application
Graphics	I-Application
Smart	O
cache	O
Power	O
Price	O
(	O
USD	O
)	O
EUs	O
Max	O
.	O
</s>
<s>
+	O
Processor	O
branding	O
Model	O
Cores	B-Architecture
(	O
threads	B-Operating_System
)	O
Base	O
clock	O
rate	O
(	O
GHz	O
)	O
TurboBoost	B-Device
2.0	O
(	O
GHz	O
)	O
Iris	B-Application
Xe	I-Application
Graphics	I-Application
Smart	O
cache	O
Power	O
Price	O
(	O
USD	O
)	O
EUs	O
Max	O
.	O
</s>
<s>
+	O
Processorbranding	O
Model	O
Cores(threads )	O
Base	O
clock	O
rate	O
(	O
GHz	O
)	O
TurboBoost	B-Device
2.0	O
(	O
GHz	O
)	O
Iris	B-Application
Xe	I-Application
Graphics	I-Application
Smartcache	O
Power	O
Price(USD )	O
EUs	O
Max	O
.	O
</s>
<s>
+	O
Processor	O
branding	O
Model	O
Cores(threads )	O
Base	O
clock	O
rate	O
(	O
GHz	O
)	O
TurboBoost	B-Device
2.0	O
(	O
GHz	O
)	O
Iris	B-Application
Xe	I-Application
Graphics	I-Application
Smart	O
cache	O
Power	O
Price	O
(	O
USD	O
)	O
EUs	O
Max	O
.	O
</s>
<s>
These	O
CPUs	O
feature	O
only	O
E-cores	O
and	O
have	O
6MB	O
of	O
Smart	O
Cache	O
.	O
</s>
<s>
Processor	O
branding	O
Model	O
Cores	B-Architecture
(	O
threads	B-Operating_System
)	O
Base	O
clock	O
rate	O
(	O
GHz	O
)	O
TurboBoost	B-Device
2.0	O
(	O
GHz	O
)	O
Iris	B-Application
Xe	I-Application
Graphics	I-Application
Smart	O
cachePrice	O
(	O
USD	O
)	O
EUs	O
Max	O
.	O
</s>
<s>
Processor	O
branding	O
Model	O
Cores	B-Architecture
(	O
threads	B-Operating_System
)	O
Base	O
clock	O
rate	O
(	O
GHz	O
)	O
TurboBoost	B-Device
2.0	O
(	O
GHz	O
)	O
Graphics	B-Application
Smart	O
cachePrice	O
(	O
USD	O
)	O
Brand	O
EUs	O
Max	O
.	O
</s>
