<s>
Itanium	B-General_Concept
(	O
)	O
is	O
a	O
discontinued	O
family	O
of	O
64-bit	B-Device
Intel	O
microprocessors	B-Architecture
that	O
implement	O
the	O
Intel	B-General_Concept
Itanium	I-General_Concept
architecture	I-General_Concept
(	O
formerly	O
called	O
IA-64	B-General_Concept
)	O
.	O
</s>
<s>
The	O
Itanium	B-General_Concept
architecture	O
originated	O
at	O
Hewlett-Packard	O
(	O
HP	O
)	O
,	O
and	O
was	O
later	O
jointly	O
developed	O
by	O
HP	O
and	O
Intel	O
.	O
</s>
<s>
Launched	O
in	O
June	O
2001	O
,	O
Intel	O
initially	O
marketed	O
the	O
processors	O
for	O
enterprise	B-Application
servers	I-Application
and	O
high-performance	B-Architecture
computing	I-Architecture
systems	O
.	O
</s>
<s>
In	O
the	O
concept	O
phase	O
,	O
engineers	O
said	O
"	O
we	O
could	O
run	O
circles	O
around	O
PowerPC	B-Architecture
,	O
that	O
we	O
could	O
kill	O
the	O
x86.	O
"	O
</s>
<s>
Early	O
predictions	O
were	O
that	O
IA-64	B-General_Concept
would	O
expand	O
to	O
the	O
lower-end	O
servers	O
,	O
supplanting	O
Xeon	B-Device
,	O
and	O
eventually	O
penetrate	O
into	O
the	O
personal	B-Device
computers	I-Device
,	O
eventually	O
to	O
supplant	O
RISC	B-Architecture
and	O
complex	B-Architecture
instruction	I-Architecture
set	I-Architecture
computing	I-Architecture
(	O
CISC	B-Architecture
)	O
architectures	O
for	O
all	O
general-purpose	O
applications	O
.	O
</s>
<s>
When	O
first	O
released	O
in	O
2001	O
,	O
Itanium	B-General_Concept
's	O
performance	O
was	O
disappointing	O
compared	O
to	O
better-established	O
RISC	B-Architecture
and	O
CISC	B-Architecture
processors	I-Architecture
.	O
</s>
<s>
Emulation	B-Application
to	O
run	O
existing	O
x86	B-Operating_System
applications	O
and	O
operating	O
systems	O
was	O
particularly	O
poor	O
.	O
</s>
<s>
Itanium-based	O
systems	O
were	O
produced	O
by	O
HP/Hewlett	O
Packard	O
Enterprise	O
(	O
HPE	O
)	O
(	O
the	O
HPE	B-General_Concept
Integrity	I-General_Concept
Servers	I-General_Concept
line	O
)	O
and	O
several	O
other	O
manufacturers	O
.	O
</s>
<s>
In	O
2008	O
,	O
Itanium	B-General_Concept
was	O
the	O
fourth-most	O
deployed	O
microprocessor	B-Architecture
architecture	O
for	O
enterprise-class	B-General_Concept
systems	I-General_Concept
,	O
behind	O
x86-64	B-Device
,	O
Power	B-Architecture
ISA	I-Architecture
,	O
and	O
SPARC	B-Architecture
.	O
</s>
<s>
In	O
2019	O
,	O
Intel	O
announced	O
that	O
new	O
orders	O
for	O
Itanium	B-General_Concept
would	O
be	O
accepted	O
until	O
January	O
30	O
,	O
2020	O
,	O
and	O
shipments	O
would	O
cease	O
by	O
July	O
29	O
,	O
2021	O
.	O
</s>
<s>
Itanium	B-General_Concept
never	O
sold	O
well	O
outside	O
enterprise	B-Application
servers	I-Application
and	O
high-performance	B-Architecture
computing	I-Architecture
systems	O
,	O
and	O
was	O
ultimately	O
replaced	O
by	O
Itanium	B-General_Concept
's	O
most	O
serious	O
competition	O
which	O
came	O
from	O
x86-64	B-Device
processors	O
which	O
were	O
designed	O
by	O
rival	O
AMD	O
as	O
a	O
compatible	O
extension	O
to	O
the	O
32	O
bit	O
X86	B-Operating_System
including	O
Intel	O
's	O
own	O
Xeon	B-Device
line	O
and	O
AMD	O
's	O
Opteron	B-General_Concept
line	O
.	O
</s>
<s>
Since	O
2009	O
,	O
most	O
servers	O
were	O
being	O
shipped	O
with	O
x86-64	B-Device
processors	O
,	O
and	O
they	O
dominate	O
the	O
low	O
cost	O
desktop	O
and	O
laptop	O
markets	O
which	O
are	O
were	O
not	O
initially	O
targeted	O
by	O
Itanium	B-General_Concept
.	O
</s>
<s>
In	O
an	O
article	O
titled	O
"	O
Intel	O
's	O
Itanium	B-General_Concept
is	O
finally	O
dead	O
:	O
The	O
Itanic	O
sunken	O
by	O
the	O
x86	B-Operating_System
juggernaut	O
"	O
Techspot	O
declared	O
"	O
Itanium	B-General_Concept
's	O
promise	O
ended	O
up	O
sunken	O
by	O
a	O
lack	O
of	O
legacy	O
32-bit	O
support	O
and	O
difficulties	O
in	O
working	O
with	O
the	O
architecture	O
for	O
writing	O
and	O
maintaining	O
software	O
"	O
while	O
the	O
dream	O
of	O
a	O
single	O
dominant	O
ISA	O
would	O
be	O
realized	O
by	O
the	O
AMD64	B-Device
extensions	O
.	O
</s>
<s>
In	O
1989	O
,	O
HP	O
started	O
to	O
research	O
an	O
architecture	O
that	O
would	O
exceed	O
the	O
expected	O
limits	O
of	O
the	O
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
architectures	O
caused	O
by	O
the	O
great	O
increase	O
in	O
complexity	O
needed	O
for	O
executing	O
multiple	O
instructions	O
per	O
cycle	O
due	O
to	O
the	O
need	O
for	O
dynamic	O
dependency	B-Operating_System
checking	O
and	O
precise	O
exception	B-General_Concept
handling	I-General_Concept
.	O
</s>
<s>
HP	O
hired	O
Bob	O
Rau	O
of	O
Cydrome	O
and	O
Josh	O
Fisher	O
of	O
Multiflow	O
,	O
the	O
pioneers	O
of	O
very	B-General_Concept
long	I-General_Concept
instruction	I-General_Concept
word	I-General_Concept
(	O
VLIW	B-General_Concept
)	O
computing	O
.	O
</s>
<s>
One	O
VLIW	B-General_Concept
instruction	O
word	O
can	O
contain	O
several	O
independent	O
instructions	O
,	O
which	O
can	O
be	O
executed	O
in	O
parallel	O
without	O
having	O
to	O
evaluate	O
them	O
for	O
independence	O
.	O
</s>
<s>
A	O
compiler	B-Language
must	O
attempt	O
to	O
find	O
valid	B-Operating_System
combinations	I-Operating_System
of	I-Operating_System
instructions	I-Operating_System
that	I-Operating_System
can	I-Operating_System
be	I-Operating_System
executed	I-Operating_System
at	I-Operating_System
the	I-Operating_System
same	I-Operating_System
time	I-Operating_System
,	O
effectively	O
performing	O
the	O
instruction	O
scheduling	O
that	O
conventional	O
superscalar	B-General_Concept
processors	I-General_Concept
must	O
do	O
in	O
hardware	O
at	O
runtime	O
.	O
</s>
<s>
HP	O
researchers	O
modified	O
the	O
classic	O
VLIW	B-General_Concept
into	O
a	O
new	O
type	O
of	O
architecture	O
,	O
later	O
named	O
Explicitly	B-General_Concept
Parallel	I-General_Concept
Instruction	I-General_Concept
Computing	I-General_Concept
(	O
EPIC	B-General_Concept
)	O
,	O
which	O
differs	O
by	O
:	O
having	O
template	O
bits	O
which	O
show	O
which	O
instructions	O
are	O
independent	O
inside	O
and	O
between	O
the	O
bundles	O
of	O
three	O
instructions	O
,	O
which	O
enables	O
the	O
explicitly	O
parallel	O
execution	O
of	O
multiple	O
bundles	O
and	O
increasing	O
the	O
processors	O
 '	O
issue	B-Operating_System
width	I-Operating_System
without	O
the	O
need	O
to	O
recompile	B-Language
;	O
by	O
predication	B-General_Concept
of	O
instructions	O
to	O
reduce	O
the	O
need	O
for	O
branches	B-General_Concept
;	O
and	O
by	O
full	O
interlocking	O
to	O
eliminate	O
the	O
delay	B-General_Concept
slots	I-General_Concept
.	O
</s>
<s>
In	O
EPIC	B-General_Concept
the	O
assignment	O
of	O
execution	B-General_Concept
units	I-General_Concept
to	O
instructions	O
and	O
the	O
timing	O
of	O
their	O
issuing	O
can	O
be	O
decided	O
by	O
hardware	O
,	O
unlike	O
in	O
the	O
classic	O
VLIW	B-General_Concept
.	O
</s>
<s>
HP	O
intended	O
to	O
use	O
these	O
features	O
in	O
PA-WideWord	O
,	O
the	O
planned	O
successor	O
to	O
their	O
PA-RISC	B-Device
ISA	O
.	O
</s>
<s>
EPIC	B-General_Concept
was	O
intended	O
to	O
provide	O
the	O
best	O
balance	O
between	O
the	O
efficient	O
use	O
of	O
silicon	O
area	O
and	O
electricity	O
,	O
and	O
general-purpose	O
flexibility	O
.	O
</s>
<s>
In	O
1993	O
HP	O
held	O
an	O
internal	O
competition	O
to	O
design	O
the	O
best	O
(	O
simulated	O
)	O
microarchitectures	O
of	O
a	O
RISC	B-Architecture
and	O
an	O
EPIC	B-General_Concept
type	O
,	O
led	O
by	O
Jerry	O
Huck	O
and	O
Rajiv	O
Gupta	O
respectively	O
.	O
</s>
<s>
The	O
EPIC	B-General_Concept
team	O
won	O
,	O
with	O
over	O
double	O
the	O
simulated	O
performance	O
of	O
the	O
RISC	B-Architecture
competitor	O
.	O
</s>
<s>
In	O
1989	O
Intel	O
had	O
launched	O
the	O
i860	B-General_Concept
,	O
which	O
it	O
marketed	O
for	O
workstations	B-Device
,	O
servers	O
,	O
and	O
iPSC	O
and	O
Paragon	B-Device
supercomputers	B-Architecture
.	O
</s>
<s>
It	O
differed	O
from	O
other	O
RISCs	B-Architecture
by	O
being	O
able	O
to	O
switch	O
between	O
the	O
normal	O
single	O
instruction	O
per	O
cycle	O
mode	O
,	O
and	O
a	O
mode	O
where	O
pairs	O
of	O
instructions	O
are	O
explicitly	O
defined	O
as	O
parallel	O
so	O
as	O
to	O
execute	O
them	O
in	O
the	O
same	O
cycle	O
without	O
having	O
to	O
do	O
dependency	B-Operating_System
checking	O
.	O
</s>
<s>
Both	O
of	O
these	O
features	O
were	O
left	O
largely	O
unused	O
because	O
compilers	B-Language
did	O
n't	O
support	O
them	O
,	O
a	O
problem	O
that	O
later	O
challenged	O
Itanium	B-General_Concept
too	O
.	O
</s>
<s>
Without	O
them	O
,	O
i860	B-General_Concept
's	O
parallelism	O
(	O
and	O
thus	O
performance	O
)	O
was	O
no	O
better	O
than	O
other	O
RISCs	B-Architecture
,	O
so	O
it	O
failed	O
in	O
the	O
market	O
.	O
</s>
<s>
Itanium	B-General_Concept
would	O
adopt	O
a	O
more	O
flexible	O
form	O
of	O
explicit	O
parallelism	O
than	O
i860	B-General_Concept
had	O
.	O
</s>
<s>
At	O
the	O
time	O
Intel	O
was	O
looking	O
to	O
extend	O
x86	B-Operating_System
to	O
64	B-Device
bits	I-Device
in	O
a	O
processor	O
codenamed	O
P7	O
,	O
which	O
they	O
found	O
challenging	O
.	O
</s>
<s>
Later	O
Intel	O
claimed	O
that	O
four	O
different	O
design	O
teams	O
had	O
explored	O
64-bit	B-Device
extensions	O
,	O
but	O
each	O
of	O
them	O
concluded	O
that	O
it	O
was	O
not	O
economically	O
feasible	O
.	O
</s>
<s>
At	O
the	O
meeting	O
with	O
HP	O
,	O
Intel	O
's	O
engineers	O
were	O
impressed	O
when	O
Jerry	O
Huck	O
and	O
Rajiv	O
Gupta	O
presented	O
the	O
PA-WideWord	O
architecture	O
they	O
had	O
designed	O
to	O
replace	O
PA-RISC	B-Device
.	O
</s>
<s>
"	O
When	O
we	O
saw	O
WideWord	O
,	O
we	O
saw	O
a	O
lot	O
of	O
things	O
we	O
had	O
only	O
been	O
looking	O
at	O
doing	O
,	O
already	O
in	O
their	O
full	O
glory	O
"	O
,	O
said	O
Intel	O
's	O
John	O
Crawford	O
,	O
who	O
in	O
1994	O
became	O
the	O
chief	O
architect	O
of	O
Merced	O
,	O
and	O
who	O
had	O
earlier	O
argued	O
against	O
extending	O
the	O
x86	B-Operating_System
with	O
P7	O
.	O
</s>
<s>
HP	O
's	O
Gupta	O
recalled	O
:	O
"	O
I	O
looked	O
Albert	O
Yu	O
[	O
Intel	O
's	O
general	O
manager	O
for	O
microprocessors ]	O
in	O
the	O
eyes	O
and	O
showed	O
him	O
we	O
could	O
run	O
circles	O
around	O
PowerPC	B-Architecture
,	O
that	O
we	O
could	O
kill	O
PowerPC	B-Architecture
,	O
that	O
we	O
could	O
kill	O
the	O
x86.	O
"	O
</s>
<s>
In	O
June	O
1994	O
Intel	O
and	O
HP	O
announced	O
their	O
joint	O
effort	O
to	O
make	O
a	O
new	O
ISA	O
that	O
would	O
adopt	O
ideas	O
of	O
Wide	O
Word	O
and	O
VLIW	B-General_Concept
.	O
</s>
<s>
Later	O
it	O
was	O
confirmed	O
that	O
the	O
P7	O
codename	B-Architecture
had	O
indeed	O
passed	O
to	O
the	O
HP-Intel	O
processor	O
.	O
</s>
<s>
By	O
early	O
1996	O
Intel	O
revealed	O
its	O
new	O
codename	B-Architecture
,	O
Merced	O
.	O
</s>
<s>
HP	O
believed	O
that	O
it	O
was	O
no	O
longer	O
cost-effective	O
for	O
individual	O
enterprise	O
systems	O
companies	O
such	O
as	O
itself	O
to	O
develop	O
proprietary	O
microprocessors	B-Architecture
,	O
so	O
it	O
partnered	O
with	O
Intel	O
in	O
1994	O
to	O
develop	O
the	O
IA-64	B-General_Concept
architecture	O
,	O
derived	O
from	O
EPIC	B-General_Concept
.	O
</s>
<s>
Intel	O
was	O
willing	O
to	O
undertake	O
the	O
very	O
large	O
development	O
effort	O
on	O
IA-64	B-General_Concept
in	O
the	O
expectation	O
that	O
the	O
resulting	O
microprocessor	B-Architecture
would	O
be	O
used	O
by	O
the	O
majority	O
of	O
enterprise	O
systems	O
manufacturers	O
.	O
</s>
<s>
HP	O
prevailed	O
upon	O
the	O
discovery	O
of	O
a	B-Device
floating-point	I-Device
hardware	I-Device
bug	I-Device
in	O
Intel	O
's	O
Pentium	B-General_Concept
.	O
</s>
<s>
The	O
designers	O
had	O
to	O
reduce	O
the	O
complexity	O
(	O
and	O
thus	O
performance	O
)	O
of	O
subsystems	O
,	O
including	O
the	O
x86	B-Operating_System
unit	O
and	O
cutting	O
the	O
L2	O
cache	B-General_Concept
to	O
96	O
KB	O
.	O
</s>
<s>
Eventually	O
it	O
was	O
agreed	O
that	O
the	O
size	O
target	O
could	O
only	O
be	O
reached	O
by	O
using	O
the	O
180	B-Algorithm
nm	I-Algorithm
process	I-Algorithm
instead	O
of	O
the	O
intended	O
250	O
nm	O
.	O
</s>
<s>
The	O
expectations	O
for	O
Merced	O
waned	O
over	O
time	O
as	O
delays	O
and	O
performance	O
deficiencies	O
emerged	O
,	O
shifting	O
the	O
focus	O
and	O
onus	O
for	O
success	O
onto	O
the	O
HP-led	O
second	O
Itanium	B-General_Concept
design	O
,	O
codenamed	O
McKinley	O
.	O
</s>
<s>
In	O
July	O
1997	O
the	O
switch	O
to	O
the	O
180	B-Algorithm
nm	I-Algorithm
process	I-Algorithm
delayed	O
Merced	O
into	O
the	O
second	O
half	O
of	O
1999	O
.	O
</s>
<s>
Shortly	O
before	O
the	O
reveal	O
of	O
EPIC	B-General_Concept
at	O
the	O
Microprocessor	B-Architecture
Forum	O
in	O
October	O
1997	O
,	O
an	O
analyst	O
of	O
the	O
Microprocessor	B-Architecture
Report	O
said	O
that	O
Itanium	B-General_Concept
"	O
will	O
not	O
show	O
the	O
competitive	O
performance	O
until	O
2001	O
.	O
</s>
<s>
At	O
the	O
Forum	O
,	O
Intel	O
's	O
Fred	O
Pollack	O
originated	O
the	O
"	O
wait	O
for	O
McKinley	O
"	O
mantra	O
when	O
he	O
said	O
that	O
it	O
will	O
double	O
the	O
Merced	O
's	O
performance	O
and	O
will	O
"	O
knock	O
your	O
socks	O
off	O
"	O
,	O
while	O
using	O
the	O
same	O
180	B-Algorithm
nm	I-Algorithm
process	I-Algorithm
as	O
Merced	O
.	O
</s>
<s>
Pollack	O
also	O
said	O
that	O
Merced	O
's	O
x86	B-Operating_System
performance	O
will	O
be	O
lower	O
than	O
the	O
fastest	O
x86	B-Operating_System
processors	O
,	O
and	O
that	O
x86	B-Operating_System
"	O
will	O
continue	O
to	O
grow	O
at	O
its	O
historical	O
rates	O
"	O
.	O
</s>
<s>
Intel	O
said	O
that	O
IA-64	B-General_Concept
wo	O
n't	O
have	O
much	O
presence	O
in	O
the	O
consumer	O
market	O
for	O
5	O
to	O
10	O
years	O
.	O
</s>
<s>
In	O
late	O
May	O
1998	O
Merced	O
was	O
delayed	O
to	O
mid-2000	O
,	O
and	O
by	O
August	O
1998	O
analysts	O
were	O
questioning	O
its	O
commercial	O
viability	O
,	O
given	O
that	O
McKinley	O
would	O
arrive	O
shortly	O
after	O
with	O
double	O
the	O
performance	O
,	O
as	O
delays	O
were	O
causing	O
Merced	O
to	O
turn	O
into	O
simply	O
a	O
development	O
vehicle	O
for	O
the	O
Itanium	B-General_Concept
ecosystem	O
.	O
</s>
<s>
The	O
same	O
day	O
it	O
was	O
reported	O
that	O
due	O
to	O
the	O
delays	O
,	O
HP	O
will	O
extend	O
its	O
line	O
of	O
PA-RISC	B-Device
PA-8000	B-General_Concept
series	O
processors	O
from	O
PA-8500	B-General_Concept
to	O
as	O
far	O
as	O
PA-8900	B-General_Concept
.	O
</s>
<s>
In	O
October	O
1998	O
HP	O
announced	O
its	O
plans	O
for	O
four	O
more	O
generations	O
of	O
PA-RISC	B-Device
processors	O
,	O
with	O
PA-8900	B-General_Concept
set	O
to	O
reach	O
1.2	O
GHz	O
in	O
2003	O
.	O
</s>
<s>
In	O
July	O
1999	O
,	O
upon	O
reports	O
that	O
the	O
first	O
silicon	O
will	O
be	O
made	O
in	O
late	O
August	O
,	O
analysts	O
predicted	O
a	O
delay	O
to	O
late	O
2000	O
,	O
and	O
came	O
into	O
agreement	O
that	O
Merced	O
will	O
be	O
used	O
chiefly	O
for	O
debugging	O
and	O
testing	O
the	O
IA-64	B-General_Concept
software	O
.	O
</s>
<s>
By	O
July	O
2000	O
HP	O
was	O
telling	O
the	O
press	O
that	O
the	O
first	O
Itanium	B-General_Concept
systems	O
will	O
be	O
for	O
niche	O
uses	O
,	O
and	O
that	O
"	O
You	O
're	O
not	O
going	O
to	O
put	O
this	O
stuff	O
near	O
your	O
data	O
center	O
for	O
several	O
years	O
.	O
</s>
<s>
"	O
,	O
HP	O
expecting	O
its	O
Itanium	B-General_Concept
systems	O
to	O
outsell	O
the	O
PA-RISC	B-Device
systems	O
only	O
in	O
2005	O
.	O
</s>
<s>
The	O
same	O
July	O
Intel	O
told	O
of	O
another	O
delay	O
,	O
due	O
to	O
a	O
stepping	B-General_Concept
change	O
to	O
fix	O
bugs	O
.	O
</s>
<s>
Server	O
makers	O
had	O
largely	O
forgone	O
spending	O
on	O
the	O
R&D	O
for	O
the	O
Merced-based	O
systems	O
,	O
instead	O
using	O
motherboards	B-Device
or	O
whole	O
servers	O
of	O
Intel	O
's	O
design	O
.	O
</s>
<s>
To	O
foster	O
a	O
wide	O
ecosystem	O
,	O
by	O
mid-2000	O
Intel	O
had	O
provided	O
15,000	O
Itaniums	B-General_Concept
in	O
5,000	O
systems	O
to	O
software	O
developers	O
and	O
hardware	O
designers	O
.	O
</s>
<s>
In	O
March	O
2001	O
Intel	O
said	O
Itanium	B-General_Concept
systems	O
would	O
begin	O
shipping	O
to	O
customers	O
in	O
the	O
second	O
quarter	O
,	O
followed	O
by	O
a	O
broader	O
deployment	O
in	O
the	O
second	O
half	O
of	O
the	O
year	O
.	O
</s>
<s>
During	O
development	O
,	O
Intel	O
,	O
HP	O
,	O
and	O
industry	O
analysts	O
predicted	O
that	O
IA-64	B-General_Concept
would	O
dominate	O
first	O
in	O
64-bit	B-Device
servers	O
and	O
workstations	B-Device
,	O
then	O
expand	O
to	O
the	O
lower-end	O
servers	O
,	O
supplanting	O
Xeon	B-Device
,	O
and	O
finally	O
penetrate	O
into	O
the	O
personal	B-Device
computers	I-Device
,	O
eventually	O
to	O
supplant	O
RISC	B-Architecture
and	O
complex	B-Architecture
instruction	I-Architecture
set	I-Architecture
computing	I-Architecture
(	O
CISC	B-Architecture
)	O
architectures	O
for	O
all	O
general-purpose	O
applications	O
,	O
though	O
not	O
replacing	O
x86	B-Operating_System
"	O
for	O
the	O
foreseeable	O
future	O
"	O
according	O
to	O
Intel	O
.	O
</s>
<s>
In	O
1997-1998	O
Intel	O
CEO	O
Andy	O
Grove	O
predicted	O
that	O
Itanium	B-General_Concept
will	O
not	O
come	O
to	O
the	O
desktop	O
computers	O
for	O
four	O
of	O
five	O
years	O
after	O
launch	O
,	O
and	O
said	O
"	O
I	O
do	O
n't	O
see	O
Merced	O
appearing	O
on	O
a	O
mainstream	O
desktop	O
inside	O
of	O
a	O
decade	O
"	O
.	O
</s>
<s>
In	O
contrast	O
,	O
Itanium	B-General_Concept
was	O
expected	O
to	O
capture	O
70%	O
of	O
the	O
64-bit	B-Device
server	O
market	O
in	O
2002	O
.	O
</s>
<s>
Already	O
in	O
1998	O
Itanium	B-General_Concept
's	O
focus	O
on	O
the	O
high	O
end	O
of	O
the	O
computer	O
market	O
was	O
criticized	O
for	O
making	O
it	O
vulnerable	O
to	O
challengers	O
expanding	O
from	O
the	O
lower-end	O
market	O
segments	O
,	O
but	O
many	O
people	O
in	O
the	O
computer	O
industry	O
feared	O
voicing	O
doubts	O
about	O
Itanium	B-General_Concept
in	O
the	O
fear	O
of	O
Intel	O
's	O
retaliation	O
.	O
</s>
<s>
Compaq	O
and	O
Silicon	O
Graphics	O
decided	O
to	O
abandon	O
further	O
development	O
of	O
the	O
Alpha	B-Device
and	O
MIPS	B-Device
architectures	I-Device
respectively	O
in	O
favor	O
of	O
migrating	O
to	O
IA-64	B-General_Concept
.	O
</s>
<s>
Several	O
groups	O
ported	O
operating	O
systems	O
for	O
the	O
architecture	O
,	O
including	O
Microsoft	B-Application
Windows	I-Application
,	O
OpenVMS	B-Operating_System
,	O
Linux	B-Application
,	O
HP-UX	B-Application
,	O
Solaris	B-Application
,	O
</s>
<s>
Tru64	B-Operating_System
UNIX	I-Operating_System
,	O
and	O
Monterey/64	B-Operating_System
.	O
</s>
<s>
By	O
1997	O
,	O
it	O
was	O
apparent	O
that	O
the	O
IA-64	B-General_Concept
architecture	O
and	O
the	O
compiler	B-Language
were	O
much	O
more	O
difficult	O
to	O
implement	O
than	O
originally	O
thought	O
,	O
and	O
the	O
delivery	O
timeframe	O
of	O
Merced	O
began	O
slipping	O
.	O
</s>
<s>
Intel	O
announced	O
the	O
official	O
name	O
of	O
the	O
processor	O
,	O
Itanium	B-General_Concept
,	O
on	O
October	O
4	O
,	O
1999	O
.	O
</s>
<s>
Within	O
hours	O
,	O
the	O
name	O
Itanic	O
had	O
been	O
coined	O
on	O
a	O
Usenet	B-Application
newsgroup	O
,	O
a	O
reference	O
to	O
the	O
RMS	O
Titanic	O
,	O
the	O
"	O
unsinkable	O
"	O
ocean	O
liner	O
that	O
sank	O
on	O
her	O
maiden	O
voyage	O
in	O
1912	O
.	O
</s>
<s>
"	O
Itanic	O
"	O
was	O
then	O
used	O
often	O
by	O
The	O
Register	O
,	O
and	O
others	O
,	O
to	O
imply	O
that	O
the	O
multibillion-dollar	O
investment	O
in	O
Itanium	B-General_Concept
—	O
and	O
the	O
early	O
hype	O
associated	O
with	O
it	O
—	O
would	O
be	O
followed	O
by	O
its	O
relatively	O
quick	O
demise	O
.	O
</s>
<s>
After	O
having	O
sampled	O
40,000	O
chips	O
to	O
the	O
partners	O
,	O
Intel	O
launched	O
Itanium	B-General_Concept
on	O
May	O
29	O
,	O
2001	O
,	O
with	O
first	O
OEM	O
systems	O
from	O
HP	O
,	O
IBM	O
and	O
Dell	O
shipping	O
to	O
customers	O
in	O
June	O
.	O
</s>
<s>
By	O
then	O
Itanium	B-General_Concept
's	O
performance	O
was	O
not	O
superior	O
to	O
competing	O
RISC	B-Architecture
and	O
CISC	B-Architecture
processors	I-Architecture
.	O
</s>
<s>
Itanium	B-General_Concept
competed	O
at	O
the	O
low-end	O
(	O
primarily	O
four-CPU	O
and	O
smaller	O
systems	O
)	O
with	O
servers	O
based	O
on	O
x86	B-Operating_System
processors	O
,	O
and	O
at	O
the	O
high-end	O
with	O
IBM	B-Device
POWER	I-Device
and	O
Sun	O
Microsystems	O
SPARC	B-Architecture
processors	O
.	O
</s>
<s>
Intel	O
repositioned	O
Itanium	B-General_Concept
to	O
focus	O
on	O
the	O
high-end	O
business	O
and	O
HPC	B-Architecture
computing	O
markets	O
,	O
attempting	O
to	O
duplicate	O
the	O
x86	B-Operating_System
's	O
successful	O
"	O
horizontal	O
"	O
market	O
(	O
i.e.	O
,	O
single	O
architecture	O
,	O
multiple	O
systems	O
vendors	O
)	O
.	O
</s>
<s>
The	O
success	O
of	O
this	O
initial	O
processor	O
version	O
was	O
limited	O
to	O
replacing	O
the	O
PA-RISC	B-Device
in	O
HP	O
systems	O
,	O
Alpha	B-Device
in	O
Compaq	O
systems	O
and	O
MIPS	B-Device
in	O
SGI	O
systems	O
,	O
though	O
IBM	O
also	O
delivered	O
a	O
supercomputer	B-Architecture
based	O
on	O
this	O
processor	O
.	O
</s>
<s>
POWER	O
and	O
SPARC	B-Architecture
remained	O
strong	O
,	O
while	O
the	O
32-bit	B-Device
x86	I-Device
architecture	O
continued	O
to	O
grow	O
into	O
the	O
enterprise	O
space	O
,	O
building	O
on	O
the	O
economies	O
of	O
scale	O
fueled	O
by	O
its	O
enormous	O
installed	O
base	O
.	O
</s>
<s>
Only	O
a	O
few	O
thousand	O
systems	O
using	O
the	O
original	O
Merced	O
Itanium	B-General_Concept
processor	O
were	O
sold	O
,	O
due	O
to	O
relatively	O
poor	O
performance	O
,	O
high	O
cost	O
and	O
limited	O
software	O
availability	O
.	O
</s>
<s>
Few	O
of	O
the	O
microarchitectural	O
features	O
of	O
Merced	O
would	O
be	O
carried	O
over	O
to	O
all	O
the	O
subsequent	O
Itanium	B-General_Concept
designs	O
,	O
including	O
the	O
16+16	O
KB	O
L1	O
cache	B-General_Concept
size	O
and	O
the	O
6-wide	O
(	O
two-bundle	O
)	O
instruction	O
decoding	O
.	O
</s>
<s>
The	O
Itanium	B-General_Concept
2	O
processor	O
was	O
released	O
in	O
July	O
2002	O
,	O
and	O
was	O
marketed	O
for	O
enterprise	B-Application
servers	I-Application
rather	O
than	O
for	O
the	O
whole	O
gamut	O
of	O
high-end	O
computing	O
.	O
</s>
<s>
It	O
relieved	O
many	O
of	O
the	O
performance	O
problems	O
of	O
the	O
original	O
Itanium	B-General_Concept
processor	O
,	O
which	O
were	O
mostly	O
caused	O
by	O
an	O
inefficient	O
memory	O
subsystem	O
by	O
approximately	O
halving	O
the	O
latency	O
and	O
doubling	O
the	O
fill	O
bandwidth	O
of	O
each	O
of	O
the	O
three	O
levels	O
of	O
cache	B-General_Concept
,	O
while	O
expanding	O
the	O
L2	O
cache	B-General_Concept
from	O
96	O
to	O
256	O
KB	O
.	O
</s>
<s>
Floating-point	O
data	O
is	O
excluded	O
from	O
the	O
L1	O
cache	B-General_Concept
,	O
because	O
the	O
L2	O
cache	B-General_Concept
's	O
higher	O
bandwidth	O
is	O
more	O
beneficial	O
to	O
typical	O
floating-point	O
applications	O
than	O
low	O
latency	O
.	O
</s>
<s>
The	O
L3	O
cache	B-General_Concept
was	O
now	O
integrated	O
on-chip	O
,	O
tripling	O
in	O
associativity	O
and	O
doubling	O
in	O
bus	B-Architecture
width	O
.	O
</s>
<s>
McKinley	O
also	O
greatly	O
increases	O
the	O
number	O
of	O
possible	O
instruction	O
combinations	O
in	O
a	O
VLIW-bundle	O
and	O
reaches	O
25%	O
higher	O
frequency	O
,	O
despite	O
having	O
only	O
eight	O
pipeline	O
stages	O
versus	O
Merced	O
's	O
ten	O
.	O
</s>
<s>
McKinley	O
contains	O
221	O
million	O
transistors	O
(	O
of	O
which	O
25	O
million	O
are	O
for	O
logic	O
and	O
181	O
million	O
for	O
L3	O
cache	B-General_Concept
)	O
,	O
measured	O
19.5mm	O
by	O
21.6mm	O
(	O
421mm2	O
)	O
and	O
was	O
fabricated	O
in	O
a	O
180nm	B-Algorithm
,	O
bulk	O
CMOS	O
process	O
with	O
six	O
layers	O
of	O
aluminium	O
metallization	O
.	O
</s>
<s>
In	O
2003	O
,	O
AMD	O
released	O
the	O
Opteron	B-General_Concept
CPU	B-General_Concept
,	O
which	O
implements	O
its	O
own	O
64-bit	B-Device
architecture	I-Device
called	O
AMD64	B-Device
.	O
</s>
<s>
The	O
Opteron	B-General_Concept
gained	O
rapid	O
acceptance	O
in	O
the	O
enterprise	B-Application
server	I-Application
space	O
because	O
it	O
provided	O
an	O
easy	O
upgrade	O
from	O
x86	B-Operating_System
.	O
</s>
<s>
Under	O
the	O
influence	O
of	O
Microsoft	O
,	O
Intel	O
responded	O
by	O
implementing	O
AMD	O
's	O
x86-64	B-Device
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
instead	O
of	O
IA-64	B-General_Concept
in	O
its	O
Xeon	B-Device
microprocessors	B-Architecture
in	O
2004	O
,	O
resulting	O
in	O
a	O
new	O
industry-wide	O
de	O
facto	O
standard	O
.	O
</s>
<s>
In	O
2003	O
Intel	O
released	O
a	O
new	O
Itanium2	O
family	O
member	O
,	O
codenamed	O
Madison	O
,	O
initially	O
with	O
up	O
to	O
1.5GHz	O
frequency	O
and	O
6	O
MB	O
of	O
L3	O
cache	B-General_Concept
.	O
</s>
<s>
The	O
Madison	O
9M	O
chip	O
released	O
in	O
November	O
2004	O
had	O
9	O
MB	O
of	O
L3	O
cache	B-General_Concept
and	O
frequency	O
up	O
to	O
1.6GHz	O
,	O
reaching	O
1.67GHz	O
in	O
July	O
2005	O
.	O
</s>
<s>
Both	O
chips	O
used	O
a	O
130nm	B-Algorithm
process	O
and	O
were	O
the	O
basis	O
of	O
all	O
new	O
Itanium	B-General_Concept
processors	O
until	O
Montecito	B-Device
was	O
released	O
in	O
July	O
2006	O
,	O
specifically	O
Deerfield	O
being	O
a	O
low	O
wattage	O
Madison	O
,	O
and	O
Fanwood	O
being	O
a	O
version	O
of	O
Madison	O
9M	O
for	O
lower-end	O
servers	O
with	O
one	O
or	O
two	O
CPU	B-General_Concept
sockets	O
.	O
</s>
<s>
In	O
November	O
2005	O
,	O
the	O
major	O
Itanium	B-General_Concept
server	O
manufacturers	O
joined	O
with	O
Intel	O
and	O
a	O
number	O
of	O
software	O
vendors	O
to	O
form	O
the	O
Itanium	B-General_Concept
Solutions	O
Alliance	O
to	O
promote	O
the	O
architecture	O
and	O
accelerate	O
the	O
software	O
porting	O
effort	O
.	O
</s>
<s>
The	O
Alliance	O
announced	O
that	O
its	O
members	O
would	O
invest	O
$10	O
billion	O
in	O
the	O
Itanium	B-General_Concept
Solutions	O
Alliance	O
by	O
the	O
end	O
of	O
the	O
decade	O
.	O
</s>
<s>
In	O
early	O
2003	O
,	O
due	O
to	O
the	O
success	O
of	O
IBM	O
's	O
dual-core	B-Architecture
POWER4	B-Device
,	O
Intel	O
announced	O
that	O
the	O
first	O
90	O
nm	O
Itanium	B-General_Concept
processor	O
,	O
codenamed	O
Montecito	B-Device
,	O
will	O
be	O
delayed	O
to	O
2005	O
so	O
as	O
to	O
change	O
it	O
into	O
a	O
dual-core	B-Architecture
,	O
thus	O
merging	O
it	O
with	O
the	O
Chivano	O
project	O
.	O
</s>
<s>
In	O
September	O
2004	O
Intel	O
demonstrated	O
a	O
working	O
Montecito	B-Device
system	O
,	O
and	O
claimed	O
that	O
the	O
inclusion	O
of	O
hyper-threading	B-Operating_System
increases	O
Montecito	B-Device
's	O
performance	O
by	O
10-20	O
%	O
and	O
that	O
its	O
frequency	O
could	O
reach	O
2GHz	O
.	O
</s>
<s>
After	O
a	O
delay	O
to	O
"	O
mid-2006	O
"	O
and	O
reduction	O
of	O
the	O
frequency	O
to	O
1.6GHz	O
,	O
on	O
July	O
18	O
Intel	O
delivered	O
Montecito	B-Device
(	O
marketed	O
as	O
the	O
Itanium	B-General_Concept
2	O
9000	O
series	O
)	O
,	O
a	O
dual-core	B-Architecture
processor	I-Architecture
with	O
a	O
switch-on-event	O
multithreading	O
and	O
split	O
256	O
KB	O
+	O
1	O
MB	O
L2	O
caches	O
that	O
roughly	O
doubled	O
the	O
performance	O
and	O
decreased	O
the	O
energy	O
consumption	O
by	O
about	O
20	O
percent	O
.	O
</s>
<s>
At	O
596mm²	O
die	O
size	O
and	O
1720	O
million	O
transistors	O
it	O
was	O
the	O
largest	O
microprocessor	B-Architecture
at	O
the	O
time	O
.	O
</s>
<s>
It	O
was	O
supposed	O
to	O
feature	O
Foxton	B-Device
Technology	I-Device
,	O
a	O
very	O
sophisticated	O
frequency	O
regulator	O
,	O
which	O
failed	O
to	O
pass	O
validation	O
and	O
was	O
thus	O
not	O
enabled	O
for	O
customers	O
.	O
</s>
<s>
Intel	O
released	O
the	O
Itanium	B-General_Concept
9100	O
series	O
,	O
codenamed	O
Montvale	B-General_Concept
,	O
in	O
November	O
2007	O
,	O
retiring	O
the	O
"	O
Itanium	B-General_Concept
2	O
"	O
brand	O
.	O
</s>
<s>
Originally	O
intended	O
to	O
use	O
the	O
65	B-Algorithm
nm	I-Algorithm
process	I-Algorithm
,	O
it	O
was	O
changed	O
into	O
a	O
fix	O
of	O
Montecito	B-Device
,	O
enabling	O
the	O
demand-based	O
switching	O
(	O
like	O
EIST	B-Device
)	O
and	O
up	O
to	O
667	O
MT/s	O
front-side	B-Architecture
bus	I-Architecture
,	O
which	O
were	O
intended	O
for	O
Montecito	B-Device
,	O
plus	O
a	O
core-level	O
lockstep	B-General_Concept
.	O
</s>
<s>
Montecito	B-Device
and	O
Montvale	B-General_Concept
were	O
the	O
last	O
Itanium	B-General_Concept
processors	O
in	O
which	O
design	O
Hewlett-Packard	O
'	O
s	O
engineering	O
team	O
at	O
Fort	O
Collins	O
had	O
a	O
key	O
role	O
,	O
as	O
the	O
team	O
was	O
subsequently	O
transferred	O
to	O
Intel	O
's	O
ownership	O
.	O
</s>
<s>
The	O
original	O
code	O
name	O
for	O
the	O
first	O
Itanium	B-General_Concept
with	O
more	O
than	O
two	O
cores	O
was	O
Tanglewood	O
,	O
but	O
it	O
was	O
changed	O
to	O
Tukwila	B-General_Concept
in	O
late	O
2003	O
due	O
to	O
trademark	O
issues	O
.	O
</s>
<s>
Intel	O
discussed	O
a	O
"	O
middle-of-the-decade	O
Itanium	B-General_Concept
"	O
to	O
succeed	O
Montecito	B-Device
,	O
achieving	O
ten	O
times	O
the	O
performance	O
of	O
Madison	O
.	O
</s>
<s>
It	O
was	O
being	O
designed	O
by	O
the	O
famed	O
DEC	B-Device
Alpha	I-Device
team	O
and	O
was	O
expected	O
have	O
eight	O
new	O
multithreading-focused	O
cores	O
.	O
</s>
<s>
In	O
early	O
2004	O
Intel	O
told	O
of	O
"	O
plans	O
to	O
achieve	O
up	O
to	O
double	O
the	O
performance	O
over	O
the	O
Intel	B-Device
Xeon	I-Device
processor	O
family	O
at	O
platform	O
cost	O
parity	O
by	O
2007	O
"	O
.	O
</s>
<s>
By	O
early	O
2005	O
Tukwila	B-General_Concept
was	O
redefined	O
,	O
now	O
having	O
fewer	O
cores	O
but	O
focusing	O
on	O
single-threaded	O
performance	O
and	O
multiprocessor	O
scalability	O
.	O
</s>
<s>
In	O
March	O
2005	O
,	O
Intel	O
disclosed	O
some	O
details	O
of	O
Tukwila	B-General_Concept
,	O
the	O
next	O
Itanium	B-General_Concept
processor	O
after	O
Montvale	B-General_Concept
,	O
to	O
be	O
released	O
in	O
2007	O
.	O
</s>
<s>
Tukwila	B-General_Concept
would	O
have	O
four	B-Architecture
processor	I-Architecture
cores	I-Architecture
and	O
would	O
replace	O
the	O
Itanium	B-General_Concept
bus	B-Architecture
with	O
a	O
new	O
Common	B-Architecture
System	I-Architecture
Interface	I-Architecture
,	O
which	O
would	O
also	O
be	O
used	O
by	O
a	O
new	O
Xeon	B-Device
processor	O
.	O
</s>
<s>
Tukwila	B-General_Concept
was	O
to	O
have	O
a	O
"	O
common	O
platform	O
architecture	O
"	O
with	O
a	O
Xeon	B-Device
codenamed	O
Whitefield	O
,	O
which	O
was	O
canceled	O
in	O
October	O
2005	O
,	O
when	O
Intel	O
revised	O
Tukwila	B-General_Concept
's	O
delivery	O
date	O
to	O
late	O
2008	O
.	O
</s>
<s>
In	O
May	O
2009	O
,	O
the	O
schedule	O
for	O
Tukwila	B-General_Concept
,	O
was	O
revised	O
again	O
,	O
with	O
the	O
release	O
to	O
OEMs	O
planned	O
for	O
the	O
first	O
quarter	O
of	O
2010	O
.	O
</s>
<s>
The	O
Itanium	B-General_Concept
9300	I-General_Concept
series	O
processor	O
,	O
codenamed	O
Tukwila	B-General_Concept
,	O
was	O
released	O
on	O
February	O
8	O
,	O
2010	O
,	O
with	O
greater	O
performance	O
and	O
memory	O
capacity	O
.	O
</s>
<s>
The	O
device	O
uses	O
a	O
65nm	B-Algorithm
process	I-Algorithm
,	O
includes	O
two	O
to	O
four	O
cores	O
,	O
up	O
to	O
24MB	O
on-die	O
caches	O
,	O
Hyper-Threading	B-Operating_System
technology	I-Operating_System
and	O
integrated	O
memory	O
controllers	O
.	O
</s>
<s>
It	O
implements	O
double-device	B-General_Concept
data	I-General_Concept
correction	I-General_Concept
,	O
which	O
helps	O
to	O
fix	O
memory	O
errors	O
.	O
</s>
<s>
Tukwila	B-General_Concept
also	O
implements	O
Intel	B-Architecture
QuickPath	I-Architecture
Interconnect	I-Architecture
(	O
QPI	B-Architecture
)	O
to	O
replace	O
the	O
Itanium	B-General_Concept
bus-based	O
architecture	O
.	O
</s>
<s>
With	O
QuickPath	B-Architecture
,	O
the	O
processor	O
has	O
integrated	O
memory	O
controllers	O
and	O
interfaces	O
the	O
memory	O
directly	O
,	O
using	O
QPI	B-Architecture
interfaces	I-Architecture
to	O
directly	O
connect	O
to	O
other	O
processors	O
and	O
I/O	O
hubs	O
.	O
</s>
<s>
QuickPath	B-Architecture
is	O
also	O
used	O
on	O
Intel	O
x86-64	O
processors	O
using	O
the	O
Nehalem	B-Device
microarchitecture	I-Device
,	O
which	O
possibly	O
enabled	O
Tukwila	B-General_Concept
and	O
Nehalem	B-Device
to	O
use	O
the	O
same	O
chipsets	B-Device
.	O
</s>
<s>
Tukwila	B-General_Concept
incorporates	O
two	O
memory	O
controllers	O
,	O
each	O
of	O
which	O
has	O
two	O
links	O
to	O
Scalable	O
Memory	O
Buffers	O
,	O
which	O
in	O
turn	O
support	O
multiple	O
DDR3	O
DIMMs	B-General_Concept
,	O
</s>
<s>
much	O
like	O
the	O
Nehalem-based	O
Xeon	B-Device
processor	O
code-named	O
Beckton	O
.	O
</s>
<s>
During	O
the	O
2012	O
Hewlett-Packard	O
Co	O
.	O
v	O
.	O
Oracle	B-Application
Corp	I-Application
.	I-Application
support	O
lawsuit	O
,	O
court	O
documents	O
unsealed	O
by	O
a	O
Santa	O
Clara	O
County	O
Court	O
judge	O
revealed	O
that	O
in	O
2008	O
,	O
Hewlett-Packard	O
had	O
paid	O
Intel	O
around	O
$440	O
million	O
to	O
keep	O
producing	O
and	O
updating	O
Itanium	B-General_Concept
microprocessors	I-General_Concept
from	O
2009	O
to	O
2014	O
.	O
</s>
<s>
In	O
2010	O
,	O
the	O
two	O
companies	O
signed	O
another	O
$250	O
million	O
deal	O
,	O
which	O
obliged	O
Intel	O
to	O
continue	O
making	O
Itanium	B-General_Concept
CPUs	O
for	O
HP	O
's	O
machines	O
until	O
2017	O
.	O
</s>
<s>
Under	O
the	O
terms	O
of	O
the	O
agreements	O
,	O
HP	O
had	O
to	O
pay	O
for	O
chips	O
it	O
gets	O
from	O
Intel	O
,	O
while	O
Intel	O
launches	O
Tukwila	B-General_Concept
,	O
Poulson	O
,	O
Kittson	O
,	O
and	O
Kittson+	O
chips	O
in	O
a	O
bid	O
to	O
gradually	O
boost	O
performance	O
of	O
the	O
platform	O
.	O
</s>
<s>
This	O
was	O
necessary	O
for	O
catching	O
up	O
after	O
Itanium	B-General_Concept
's	O
delays	O
left	O
it	O
at	O
90	O
nm	O
competing	O
against	O
65	B-Algorithm
nm	I-Algorithm
and	O
45	B-Algorithm
nm	I-Algorithm
processors	O
.	O
</s>
<s>
At	O
ISSCC	O
2011	O
,	O
Intel	O
presented	O
a	O
paper	O
called	O
"	O
A	O
32nm	B-Algorithm
3.1	O
Billion	O
Transistor	O
12-Wide-Issue	O
Itanium	B-General_Concept
Processor	O
for	O
Mission	O
Critical	O
Servers.	O
"	O
</s>
<s>
Information	O
presented	O
improvements	O
in	O
multithreading	O
,	O
resiliency	O
improvements	O
(	O
Intel	O
Instruction	O
Replay	O
RAS	O
)	O
and	O
few	O
new	O
instructions	O
(	O
thread	O
priority	O
,	O
integer	O
instruction	O
,	O
cache	B-General_Concept
prefetching	O
,	O
and	O
data	O
access	O
hints	O
)	O
.	O
</s>
<s>
Poulson	O
was	O
released	O
on	O
November	O
8	O
,	O
2012	O
,	O
as	O
the	O
Itanium	B-General_Concept
9500	O
series	O
processor	O
.	O
</s>
<s>
It	O
is	O
the	O
follow-on	O
processor	O
to	O
Tukwila	B-General_Concept
.	O
</s>
<s>
It	O
features	O
eight	O
cores	O
and	O
has	O
a	O
12-wide	O
issue	O
architecture	O
,	O
multithreading	O
enhancements	O
,	O
and	O
new	O
instructions	O
to	O
take	O
advantage	O
of	O
parallelism	O
,	O
especially	O
in	O
virtualization	B-Application
.	O
</s>
<s>
The	O
Poulson	O
L3	O
cache	B-General_Concept
size	O
is	O
32MB	O
and	O
common	O
for	O
all	O
cores	O
,	O
not	O
divided	O
like	O
previously	O
.	O
</s>
<s>
L2	O
cache	B-General_Concept
size	O
is	O
6MB	O
,	O
512IKB	O
,	O
256DKB	O
per	O
core	O
.	O
</s>
<s>
Die	O
size	O
is	O
544mm²	O
,	O
less	O
than	O
its	O
predecessor	O
Tukwila	B-General_Concept
(	O
698.75mm²	O
)	O
.	O
</s>
<s>
Intel	O
's	O
Product	O
Change	O
Notification	O
(	O
PCN	O
)	O
111456-01	O
lists	O
four	O
models	O
of	O
Itanium	B-General_Concept
9500	O
series	O
CPU	B-General_Concept
,	O
which	O
was	O
later	O
removed	O
in	O
a	O
revised	O
document	O
.	O
</s>
<s>
Intel	O
later	O
posted	O
Itanium	B-General_Concept
9500	O
reference	O
manual	O
.	O
</s>
<s>
Kittson	O
was	O
supposed	O
to	O
be	O
on	O
a	O
22nm	B-Algorithm
process	O
and	O
use	O
the	O
same	O
LGA2011	B-Device
socket	O
and	O
platform	O
as	O
Xeons	B-Device
.	O
</s>
<s>
On	O
31	O
January	O
2013	O
Intel	O
issued	O
an	O
update	O
to	O
their	O
plans	O
for	O
Kittson	O
:	O
it	O
would	O
have	O
the	O
same	O
LGA1248	B-Device
socket	O
and	O
32nm	B-Algorithm
process	O
as	O
Poulson	O
,	O
thus	O
effectively	O
halting	O
any	O
further	O
development	O
of	O
Itanium	B-General_Concept
processors	O
.	O
</s>
<s>
Meanwhile	O
,	O
the	O
aggressively	O
multicore	B-Architecture
Xeon	B-Device
E7	O
platform	O
displaced	O
Itanium-based	O
solutions	O
in	O
the	O
Intel	O
roadmap	O
.	O
</s>
<s>
Even	O
Hewlett-Packard	O
,	O
the	O
main	O
proponent	O
and	O
customer	O
for	O
Itanium	B-General_Concept
,	O
began	O
selling	O
x86-based	O
Superdome	B-Device
and	O
NonStop	B-Architecture
servers	O
,	O
and	O
started	O
to	O
treat	O
the	O
Itanium-based	O
versions	O
as	O
legacy	O
products	O
.	O
</s>
<s>
Intel	O
officially	O
launched	O
the	O
Itanium	B-General_Concept
9700	O
series	O
processor	O
family	O
on	O
May	O
11	O
,	O
2017	O
.	O
</s>
<s>
Kittson	O
has	O
no	O
microarchitecture	O
improvements	O
over	O
Poulson	O
;	O
despite	O
nominally	O
having	O
a	O
different	O
stepping	B-General_Concept
,	O
it	O
is	O
functionally	O
identical	O
with	O
the	O
9500	O
series	O
,	O
even	O
having	O
exactly	O
the	O
same	O
bugs	O
,	O
the	O
only	O
difference	O
being	O
the	O
133MHz	O
higher	O
frequency	O
of	O
9760	O
and	O
9750	O
over	O
9560	O
and	O
9550	O
respectively	O
.	O
</s>
<s>
Intel	O
announced	O
that	O
the	O
9700	O
series	O
will	O
be	O
the	O
last	O
Itanium	B-General_Concept
chips	O
produced	O
.	O
</s>
<s>
In	O
comparison	O
with	O
its	O
Xeon	B-Device
family	O
of	O
server	O
processors	O
,	O
Itanium	B-General_Concept
was	O
never	O
a	O
high-volume	O
product	O
for	O
Intel	O
.	O
</s>
<s>
According	O
to	O
Gartner	O
Inc.	O
,	O
the	O
total	O
number	O
of	O
Itanium	B-General_Concept
servers	O
(	O
not	O
processors	O
)	O
sold	O
by	O
all	O
vendors	O
in	O
2007	O
,	O
was	O
about	O
55,000	O
(	O
It	O
is	O
unclear	O
whether	O
clustered	O
servers	O
counted	O
as	O
a	O
single	O
server	O
or	O
not	O
.	O
)	O
.	O
</s>
<s>
This	O
compares	O
with	O
417,000	O
RISC	B-Architecture
servers	O
(	O
spread	O
across	O
all	O
RISC	B-Architecture
vendors	O
)	O
and	O
8.4	O
million	O
x86	B-Operating_System
servers	O
.	O
</s>
<s>
IDC	O
reports	O
that	O
a	O
total	O
of	O
184,000	O
Itanium-based	O
systems	O
were	O
sold	O
from	O
2001	O
through	O
2007	O
.	O
</s>
<s>
For	O
the	O
combined	O
POWER/SPARC/Itanium	O
systems	O
market	O
,	O
IDC	O
reports	O
that	O
POWER	O
captured	O
42%	O
of	O
revenue	O
and	O
SPARC	B-Architecture
captured	O
32%	O
,	O
while	O
Itanium-based	O
system	O
revenue	O
reached	O
26%	O
in	O
the	O
second	O
quarter	O
of	O
2008	O
.	O
</s>
<s>
According	O
to	O
an	O
IDC	O
analyst	O
,	O
in	O
2007	O
,	O
HP	O
accounted	O
for	O
perhaps	O
80%	O
of	O
Itanium	B-General_Concept
systems	O
revenue	O
.	O
</s>
<s>
According	O
to	O
Gartner	O
,	O
in	O
2008	O
,	O
HP	O
accounted	O
for	O
95%	O
of	O
Itanium	B-General_Concept
sales	O
.	O
</s>
<s>
HP	O
's	O
Itanium	B-General_Concept
system	O
sales	O
were	O
at	O
an	O
annual	O
rate	O
of	O
$4.4	O
Bn	O
at	O
the	O
end	O
of	O
2008	O
,	O
and	O
declined	O
to	O
$3.5	O
Bn	O
by	O
the	O
end	O
of	O
2009	O
,	O
</s>
<s>
compared	O
to	O
a	O
35%	O
decline	O
in	O
UNIX	B-Application
system	I-Application
revenue	O
for	O
Sun	O
and	O
an	O
11%	O
drop	O
for	O
IBM	O
,	O
with	O
an	O
x86-64	B-Device
server	O
revenue	O
increase	O
of	O
14%	O
during	O
this	O
period	O
.	O
</s>
<s>
In	O
December	O
2012	O
,	O
IDC	O
released	O
a	O
research	O
report	O
stating	O
that	O
Itanium	B-General_Concept
server	O
shipments	O
would	O
remain	O
flat	O
through	O
2016	O
,	O
with	O
annual	O
shipment	O
of	O
26,000	O
systems	O
(	O
a	O
decline	O
of	O
over	O
50%	O
compared	O
to	O
shipments	O
in	O
2008	O
)	O
.	O
</s>
<s>
By	O
2006	O
,	O
HP	O
manufactured	O
at	O
least	O
80%	O
of	O
all	O
Itanium	B-General_Concept
systems	O
,	O
and	O
sold	O
7,200	O
in	O
the	O
first	O
quarter	O
of	O
2006	O
.	O
</s>
<s>
The	O
bulk	O
of	O
systems	O
sold	O
were	O
enterprise	B-Application
servers	I-Application
and	O
machines	O
for	O
large-scale	O
technical	O
computing	O
,	O
with	O
an	O
average	O
selling	O
price	O
per	O
system	O
in	O
excess	O
of	O
US$	O
200,000	O
.	O
</s>
<s>
A	O
typical	O
system	O
uses	O
eight	O
or	O
more	O
Itanium	B-General_Concept
processors	O
.	O
</s>
<s>
By	O
2012	O
,	O
only	O
a	O
few	O
manufacturers	O
offered	O
Itanium	B-General_Concept
systems	O
,	O
including	O
HP	O
,	O
Bull	O
,	O
NEC	O
,	O
Inspur	O
and	O
Huawei	O
.	O
</s>
<s>
In	O
addition	O
,	O
Intel	O
offered	O
a	O
chassis	O
that	O
could	O
be	O
used	O
by	O
system	O
integrators	O
to	O
build	O
Itanium	B-General_Concept
systems	O
.	O
</s>
<s>
By	O
2015	O
,	O
only	O
HP	O
supplied	O
Itanium-based	O
systems	O
.	O
</s>
<s>
With	O
HP	O
split	O
in	O
late	O
2015	O
,	O
Itanium	B-General_Concept
systems	O
(	O
branded	O
as	O
Integrity	B-General_Concept
)	O
are	O
handled	O
by	O
Hewlett-Packard	O
Enterprise	O
(	O
HPE	O
)	O
,	O
with	O
a	O
major	O
update	O
in	O
2017	O
(	O
Integrity	B-General_Concept
i6	O
,	O
and	O
HP-UX	B-Application
11i	O
v3	O
Update	O
16	O
)	O
.	O
</s>
<s>
HPE	O
also	O
supports	O
a	O
few	O
other	O
operating	O
systems	O
,	O
including	O
Windows	B-Application
up	O
to	O
Server	B-Device
2008	I-Device
R2	I-Device
,	O
Linux	B-Application
,	O
OpenVMS	B-Operating_System
and	O
NonStop	B-Architecture
.	O
</s>
<s>
Itanium	B-General_Concept
is	O
not	O
affected	O
by	O
Spectre	B-Error_Name
and	O
Meltdown	B-Architecture
.	O
</s>
<s>
Prior	O
to	O
the	O
9300-series	O
(	O
Tukwila	B-General_Concept
)	O
,	O
chipsets	B-Device
were	O
needed	O
to	O
connect	O
to	O
the	O
main	O
memory	O
and	O
I/O	O
devices	O
,	O
as	O
the	O
front-side	B-Architecture
bus	I-Architecture
to	O
the	O
chipset	B-Device
was	O
the	O
sole	O
connection	O
out	O
of	O
the	O
processor	O
(	O
except	O
for	O
TAP	O
(	O
JTAG	O
)	O
and	O
SMBus	B-Algorithm
for	O
debugging	O
and	O
system	O
configuration	O
)	O
.	O
</s>
<s>
Two	O
generations	O
of	O
buses	O
existed	O
,	O
the	O
original	O
Itanium	B-General_Concept
processor	O
system	O
bus	B-Architecture
(	O
a.k.a.	O
</s>
<s>
Merced	O
bus	B-Architecture
)	O
had	O
a	O
64	B-Device
bit	I-Device
data	O
width	O
and	O
133MHz	O
clock	O
with	O
DDR	O
(	O
266	O
MT/s	O
)	O
,	O
being	O
soon	O
superseded	O
by	O
the	O
128-bit	O
200MHz	O
DDR	O
(	O
400	O
MT/s	O
)	O
Itanium	B-General_Concept
2	O
processor	O
system	O
bus	B-Architecture
(	O
a.k.a.	O
</s>
<s>
McKinley	O
bus	B-Architecture
)	O
,	O
which	O
later	O
reached	O
533	O
and	O
667	O
MT/s	O
.	O
</s>
<s>
Up	O
to	O
four	O
CPUs	O
per	O
single	O
bus	B-Architecture
could	O
be	O
used	O
,	O
but	O
prior	O
to	O
the	O
9000-series	O
the	O
bus	B-Architecture
speeds	O
of	O
over	O
400	O
MT/s	O
were	O
limited	O
to	O
up	O
to	O
two	O
processors	O
per	O
bus	B-Architecture
.	O
</s>
<s>
As	O
no	O
Itanium	B-General_Concept
chipset	B-Device
could	O
connect	O
to	O
more	O
than	O
four	O
sockets	O
,	O
high-end	O
servers	O
needed	O
multiple	O
interconnected	O
chipsets	B-Device
.	O
</s>
<s>
The	O
"	O
Tukwila	B-General_Concept
"	O
Itanium	B-General_Concept
processor	O
model	O
had	O
been	O
designed	O
to	O
share	O
a	O
common	O
chipset	B-Device
with	O
the	O
Intel	B-Device
Xeon	I-Device
processor	O
EX	O
(	O
Intel	O
's	O
Xeon	B-Device
processor	O
designed	O
for	O
four	O
processor	O
and	O
larger	O
servers	O
)	O
.	O
</s>
<s>
The	O
goal	O
was	O
to	O
streamline	O
system	O
development	O
and	O
reduce	O
costs	O
for	O
server	O
OEMs	O
,	O
many	O
of	O
which	O
develop	O
both	O
Itanium	B-General_Concept
-	O
and	O
Xeon-based	O
servers	O
.	O
</s>
<s>
In	O
the	O
times	O
before	O
on-chip	O
memory	O
controllers	O
and	O
QPI	B-Architecture
,	O
enterprise	B-Application
server	I-Application
manufacturers	O
differentiated	O
their	O
systems	O
by	O
designing	O
and	O
developing	O
chipsets	B-Device
that	O
interface	O
the	O
processor	O
to	O
memory	O
,	O
interconnections	O
,	O
and	O
peripheral	O
controllers	O
.	O
</s>
<s>
"	O
Enterprise	B-Application
server	I-Application
"	O
referred	O
to	O
the	O
then-lucrative	O
market	O
segment	O
of	O
high-end	O
servers	O
with	O
high	O
reliability	B-General_Concept
,	I-General_Concept
availability	I-General_Concept
and	I-General_Concept
serviceability	I-General_Concept
and	O
typically	O
16+	O
processor	O
sockets	O
,	O
justifying	O
their	O
pricing	O
by	O
having	O
a	O
custom	O
system-level	O
architecture	O
with	O
their	O
own	O
chipsets	B-Device
at	O
its	O
heart	O
,	O
with	O
capabilities	O
far	O
beyond	O
what	O
two-socket	O
"	O
commodity	O
servers	O
"	O
could	O
offer	O
.	O
</s>
<s>
Development	O
of	O
a	O
chipset	B-Device
costs	O
tens	O
of	O
millions	O
of	O
dollars	O
and	O
so	O
represented	O
a	O
major	O
commitment	O
to	O
the	O
use	O
of	O
Itanium	B-General_Concept
.	O
</s>
<s>
Neither	O
Intel	O
nor	O
IBM	O
would	O
develop	O
Itanium	B-General_Concept
2	O
chipsets	B-Device
to	O
support	O
newer	O
technologies	O
such	O
as	O
DDR2	O
or	O
PCI	B-Protocol
Express	O
.	O
</s>
<s>
Before	O
"	O
Tukwila	B-General_Concept
"	O
moved	O
away	O
from	O
the	O
FSB	B-Architecture
,	O
chipsets	B-Device
supporting	O
such	O
technologies	O
were	O
manufactured	O
by	O
all	O
Itanium	B-General_Concept
server	O
vendors	O
,	O
such	O
as	O
HP	O
,	O
Fujitsu	O
,	O
SGI	O
,	O
NEC	O
,	O
and	O
Hitachi	O
.	O
</s>
<s>
The	O
first	O
generation	O
of	O
Itanium	B-General_Concept
received	O
no	O
vendor-specific	O
chipsets	B-Device
,	O
only	O
Intel	O
's	O
460GX	O
consisting	O
of	O
ten	O
distinct	O
chips	O
.	O
</s>
<s>
It	O
supported	O
up	O
to	O
four	O
CPUs	O
and	O
64	O
GB	O
of	O
memory	O
at	O
4.2	O
GB/s	O
,	O
which	O
is	O
twice	O
the	O
system	O
bus	B-Architecture
's	O
bandwidth	O
.	O
</s>
<s>
460GX	O
had	O
an	O
AGP	B-Architecture
X4	O
graphics	O
bus	B-Architecture
,	O
two	O
64-bit	B-Device
66MHz	O
PCI	B-Protocol
buses	O
and	O
configurable	O
33MHz	O
dual	O
32-bit	O
or	O
single	O
64-bit	B-Device
PCI	B-Protocol
bus(es )	O
.	O
</s>
<s>
There	O
were	O
many	O
custom	O
chipset	B-Device
designs	O
for	O
Itanium	B-General_Concept
2	O
,	O
but	O
many	O
smaller	O
vendors	O
chose	O
to	O
use	O
Intel	O
's	O
E8870	O
chipset	B-Device
.	O
</s>
<s>
It	O
was	O
originally	O
designed	O
for	O
Rambus	O
RDRAM	O
serial	B-Protocol
memory	O
,	O
but	O
when	O
RDRAM	O
failed	O
to	O
succeed	O
Intel	O
added	O
four	O
DDR	O
SDRAM-to-RDRAM	O
converter	O
chips	O
to	O
the	O
chipset	B-Device
.	O
</s>
<s>
When	O
Intel	O
had	O
previously	O
made	O
such	O
a	O
converter	O
for	O
Pentium	B-General_Concept
III	O
chipsets	B-Device
820	O
and	O
840	O
,	O
it	O
drastically	O
cut	O
performance	O
.	O
</s>
<s>
E8870	O
provides	O
eight	O
133MHz	O
PCI-X	O
buses	O
(	O
4.2	O
GB/s	O
total	O
because	O
of	O
bottlenecks	O
)	O
and	O
a	O
ICH4	O
hub	O
with	O
six	O
USB	O
2.0	O
ports	O
.	O
</s>
<s>
Two	O
E8870	O
can	O
be	O
linked	O
together	O
by	O
two	O
E8870SP	O
Scalability	O
Port	O
Switches	O
,	O
each	O
containing	O
a	O
1MB	O
(	O
~	O
200,000	O
cache	B-General_Concept
lines	O
)	O
snoop	O
filter	O
,	O
to	O
create	O
an	O
8-socket	O
system	O
with	O
double	O
the	O
memory	O
and	O
PCI-X	O
capacity	O
,	O
but	O
still	O
only	O
one	O
ICH4	O
.	O
</s>
<s>
In	O
2004	O
Intel	O
revealed	O
plans	O
for	O
its	O
next	O
Itanium	B-General_Concept
chipset	B-Device
,	O
codenamed	O
Bayshore	O
,	O
to	O
support	O
PCI-e	O
and	O
DDR2	O
memory	O
,	O
but	O
canceled	O
it	O
the	O
same	O
year	O
.	O
</s>
<s>
HP	O
has	O
designed	O
four	O
different	O
chipsets	B-Device
for	O
Itanium	B-General_Concept
2	O
:	O
zx1	B-General_Concept
,	O
sx1000	O
,	O
zx2	O
and	O
sx2000	O
.	O
</s>
<s>
All	O
support	O
4	O
sockets	O
per	O
chipset	B-Device
,	O
but	O
sx1000	O
and	O
sx2000	O
support	O
interconnection	O
of	O
up	O
to	O
16	O
chipsets	B-Device
to	O
create	O
up	O
to	O
a	O
64	O
socket	O
system	O
.	O
</s>
<s>
As	O
it	O
was	O
developed	O
in	O
collaboration	O
with	O
Itanium	B-General_Concept
2	O
's	O
development	O
,	O
booting	O
the	O
first	O
Itanium	B-General_Concept
2	O
in	O
February	O
2001	O
,	O
zx1	B-General_Concept
became	O
the	O
first	O
Itanium	B-General_Concept
2	O
chipset	B-Device
available	O
and	O
later	O
in	O
2004	O
also	O
the	O
first	O
to	O
support	O
533	O
MT/s	O
FSB	B-Architecture
.	O
</s>
<s>
In	O
its	O
basic	O
two-chip	O
version	O
it	O
directly	O
provides	O
four	O
channels	O
of	O
DDR-266	O
memory	O
,	O
giving	O
8.5	O
GB/s	O
of	O
bandwidth	O
and	O
32	O
GB	O
of	O
capacity	O
(	O
though	O
12	O
DIMM	B-General_Concept
slots	O
)	O
.	O
</s>
<s>
In	O
versions	O
with	O
memory	O
expander	O
boards	O
memory	O
bandwidth	O
reaches	O
12.8	O
GB/s	O
,	O
while	O
the	O
maximum	O
capacity	O
for	O
the	O
initial	O
two-board	O
48	O
DIMM	B-General_Concept
expanders	O
was	O
96	O
GB	O
,	O
and	O
the	O
later	O
single-board	O
32	O
DIMM	B-General_Concept
expander	O
up	O
to	O
128	O
GB	O
.	O
</s>
<s>
Eight	O
independent	O
links	O
went	O
to	O
the	O
PCI-X	O
and	O
other	O
peripheral	O
devices	O
(	O
e.g.	O
</s>
<s>
AGP	B-Architecture
in	O
workstations	B-Device
)	O
,	O
totaling	O
4	O
GB/s	O
.	O
</s>
<s>
HP	O
's	O
first	O
high-end	O
Itanium	B-General_Concept
chipset	B-Device
was	O
sx1000	O
,	O
launched	O
in	O
mid-2003	O
with	O
the	O
Integrity	B-Device
Superdome	I-Device
flagship	O
server	O
.	O
</s>
<s>
It	O
has	O
two	O
independent	O
front-side	O
buses	O
,	O
each	O
bus	B-Architecture
supporting	O
two	O
sockets	O
,	O
giving	O
12.8	O
GB/s	O
of	O
combined	O
bandwidth	O
from	O
the	O
processors	O
to	O
the	O
chipset	B-Device
.	O
</s>
<s>
The	O
above	O
components	O
form	O
a	O
system	B-Device
board	I-Device
called	O
a	O
cell	O
.	O
</s>
<s>
Cells	O
maintain	O
cache	B-General_Concept
coherence	O
through	O
in-memory	O
directories	B-Architecture
,	O
which	O
causes	O
the	O
minimum	O
memory	O
latency	O
to	O
be	O
241	O
ns	O
.	O
</s>
<s>
The	O
latency	O
to	O
the	O
most	O
remote	O
(	O
NUMA	B-Operating_System
)	O
memory	O
is	O
463	O
ns	O
.	O
</s>
<s>
The	O
per-cell	O
bandwidth	O
to	O
the	O
I/O	O
subsystems	O
is	O
2	O
GB/s	O
,	O
despite	O
the	O
presence	O
of	O
8	O
GB/s	O
worth	O
of	O
PCI-X	O
buses	O
in	O
each	O
I/O	O
subsystem	O
.	O
</s>
<s>
For	O
the	O
inter-chipset	O
communication	O
,	O
25.5	O
GB/s	O
is	O
available	O
on	O
each	O
sx2000	O
through	O
its	O
three	O
serial	B-Protocol
links	I-Protocol
that	O
can	O
connect	O
to	O
a	O
set	O
of	O
three	O
independent	O
crossbars	O
,	O
which	O
connect	O
to	O
other	O
cells	O
or	O
up	O
to	O
3	O
other	O
sets	O
of	O
3	O
crossbars	O
.	O
</s>
<s>
The	O
chipset	B-Device
's	O
connection	O
to	O
its	O
I/O	O
module	O
is	O
now	O
serial	B-Protocol
with	O
an	O
8.5	O
GB/s	O
peak	O
and	O
5.5	O
GB/s	O
sustained	O
bandwidth	O
,	O
the	O
I/O	O
module	O
having	O
either	O
12	O
PCI-X	O
buses	O
at	O
up	O
to	O
266MHz	O
,	O
or	O
6	O
PCI-X	O
buses	O
and	O
6	O
PCIe	O
1.1	O
×8	O
slots	O
.	O
</s>
<s>
It	O
is	O
the	O
last	O
chipset	B-Device
to	O
support	O
HP	O
's	O
PA-RISC	B-Device
processors	O
(	O
PA-8900	B-General_Concept
)	O
.	O
</s>
<s>
HP	O
launched	O
the	O
first	O
zx2-based	O
servers	O
in	O
September	O
2006	O
.	O
zx2	O
can	O
operate	O
the	O
FSB	B-Architecture
at	O
667	O
MT/s	O
with	O
two	O
CPUs	O
or	O
533	O
MT/s	O
with	O
four	O
CPUs	O
.	O
</s>
<s>
9.8	O
GB/s	O
are	O
available	O
through	O
eight	O
independent	O
links	O
to	O
the	O
I/O	O
adapters	O
,	O
which	O
can	O
include	O
PCIe	O
×8	O
or	O
266MHz	O
PCI-X	O
.	O
</s>
<s>
In	O
May	O
2003	O
,	O
IBM	O
launched	O
the	O
XA-64	O
chipset	B-Device
for	O
Itanium	B-General_Concept
2	O
.	O
</s>
<s>
It	O
used	O
many	O
of	O
the	O
same	O
technologies	O
as	O
the	O
first	O
two	O
generations	O
of	O
XA-32	O
chipsets	B-Device
for	O
Xeon	B-Device
,	O
but	O
by	O
the	O
time	O
of	O
the	O
third	O
gen	O
XA-32	O
IBM	O
had	O
decided	O
to	O
discontinue	O
its	O
Itanium	B-General_Concept
products	O
.	O
</s>
<s>
XA-64	O
supported	O
56	O
GB	O
of	O
DDR	O
SDRAM	O
in	O
28	O
slots	O
at	O
6.4	O
GB/s	O
,	O
though	O
due	O
to	O
bottlenecks	O
only	O
3.2	O
GB/s	O
could	O
go	O
to	O
the	O
CPU	B-General_Concept
and	O
other	O
2	O
GB/s	O
to	O
devices	O
for	O
a	O
5.2	O
GB/s	O
total	O
.	O
</s>
<s>
The	O
CPU	B-General_Concept
's	O
memory	O
bottleneck	O
was	O
mitigated	O
by	O
an	O
off-chip	O
64	O
MB	O
DRAM	O
L4	O
cache	B-General_Concept
,	O
which	O
also	O
worked	O
as	O
a	O
snoop	O
filter	O
in	O
multi-chipset	O
systems	O
.	O
</s>
<s>
The	O
combined	O
bandwidth	O
of	O
the	O
four	O
PCI-X	O
buses	O
and	O
other	O
I/O	O
is	O
bottlenecked	O
to	O
2	O
GB/s	O
per	O
chipset	B-Device
.	O
</s>
<s>
Two	O
or	O
four	O
chipsets	B-Device
can	O
be	O
connected	O
to	O
make	O
an	O
8	O
or	O
16	O
socket	O
system	O
.	O
</s>
<s>
SGI	O
's	O
Altix	B-Architecture
supercomputers	B-Architecture
and	O
servers	O
used	O
the	O
SHUB	O
(	O
Super-Hub	O
)	O
chipset	B-Device
,	O
which	O
supports	O
two	O
Itanium	B-General_Concept
2	O
sockets	O
.	O
</s>
<s>
A	O
2.4	O
GB/s	O
XIO	B-Architecture
channel	O
connected	O
to	O
a	O
module	O
with	O
up	O
to	O
six	O
64-bit	B-Device
133MHz	O
PCI-X	O
buses	O
.	O
</s>
<s>
SHUBs	O
can	O
be	O
interconnected	O
by	O
the	O
dual	O
6.4	O
GB/s	O
NUMAlink4	O
link	O
planes	O
to	O
create	O
a	O
512-socket	O
cache-coherent	O
single-image	O
system	O
.	O
</s>
<s>
A	O
cache	B-General_Concept
for	O
the	O
in-memory	O
coherence	B-Architecture
directory	I-Architecture
saves	O
memory	O
bandwidth	O
and	O
reduces	O
latency	O
.	O
</s>
<s>
I/O	O
modules	O
with	O
four	O
133MHz	O
PCI-X	O
buses	O
can	O
connect	O
directly	O
to	O
the	O
NUMAlink4	O
network	O
.	O
</s>
<s>
SGI	O
's	O
second-generation	O
SHUB	O
2.0	O
chipset	B-Device
supported	O
up	O
to	O
48	O
GB	O
of	O
DDR2	O
memory	O
,	O
667	O
MT/s	O
FSB	B-Architecture
,	O
and	O
could	O
connect	O
to	O
I/O	O
modules	O
providing	O
PCI	B-Protocol
Express	O
.	O
</s>
<s>
It	O
supports	O
only	O
four	O
local	O
threads	O
,	O
so	O
when	O
having	O
two	O
dual-core	B-Architecture
CPUs	O
per	O
chipset	B-Device
,	O
Hyper-Threading	B-Operating_System
must	O
be	O
disabled	O
.	O
</s>
<s>
NetBSD	B-Device
(	O
a	O
tier	O
II	O
port	O
that	O
"	O
is	O
a	O
work-in-progress	O
effort	O
to	O
port	O
NetBSD	B-Device
to	O
the	O
Itanium	B-General_Concept
family	O
of	O
processors	O
.	O
</s>
<s>
The	O
Trillian	O
Project	O
was	O
an	O
effort	O
by	O
an	O
industry	O
consortium	O
to	O
port	O
the	O
Linux	B-Application
kernel	O
to	O
the	O
Itanium	B-General_Concept
processor	O
.	O
</s>
<s>
The	O
project	O
started	O
in	O
May	O
1999	O
with	O
the	O
goal	O
of	O
releasing	O
the	O
distribution	O
in	O
time	O
for	O
the	O
initial	O
release	O
of	O
Itanium	B-General_Concept
,	O
then	O
scheduled	O
for	O
early	O
2000	O
.	O
</s>
<s>
By	O
the	O
end	O
of	O
1999	O
,	O
the	O
project	O
included	O
Caldera	O
Systems	O
,	O
CERN	O
,	O
Cygnus	O
Solutions	O
,	O
Hewlett-Packard	O
,	O
IBM	O
,	O
Intel	O
,	O
Red	O
Hat	O
,	O
SGI	O
,	O
SuSE	O
,	O
TurboLinux	O
and	O
VA	O
Linux	B-Application
Systems	O
.	O
</s>
<s>
The	O
code	O
then	O
became	O
part	O
of	O
the	O
mainline	O
Linux	B-Application
kernel	O
more	O
than	O
a	O
year	O
before	O
the	O
release	O
of	O
the	O
first	O
Itanium	B-General_Concept
processor	O
.	O
</s>
<s>
the	O
free	B-Application
and	O
open	B-Application
source	I-Application
GCC	B-Application
compiler	I-Application
had	O
already	O
been	O
enhanced	O
to	O
support	O
the	O
Itanium	B-General_Concept
architecture	O
.	O
</s>
<s>
a	O
free	B-Application
and	O
open	B-Application
source	I-Application
simulator	O
had	O
been	O
developed	O
to	O
simulate	O
an	O
Itanium	B-General_Concept
processor	O
on	O
an	O
existing	O
computer	O
.	O
</s>
<s>
After	O
the	O
successful	O
completion	O
of	O
Project	O
Trillian	O
,	O
the	O
resulting	O
Linux	B-Application
kernel	O
was	O
used	O
by	O
all	O
of	O
the	O
manufacturers	O
of	O
Itanium	B-General_Concept
systems	O
(	O
HP	O
,	O
IBM	O
,	O
Dell	O
,	O
SGI	O
,	O
Fujitsu	O
,	O
Unisys	O
,	O
Hitachi	O
,	O
and	O
Groupe	O
Bull	O
.	O
)	O
</s>
<s>
With	O
the	O
notable	O
exception	O
of	O
HP	O
,	O
Linux	B-Application
is	O
either	O
the	O
primary	O
OS	O
or	O
the	O
only	O
OS	O
the	O
manufacturer	O
supports	O
for	O
Itanium	B-General_Concept
.	O
</s>
<s>
Ongoing	O
free	B-Application
and	I-Application
open	I-Application
source	I-Application
software	I-Application
support	O
for	O
Linux	B-Application
on	O
Itanium	B-General_Concept
subsequently	O
coalesced	O
at	O
Gelato	O
.	O
</s>
<s>
In	O
2005	O
,	O
Fedora	O
Linux	B-Application
started	O
adding	O
support	O
for	O
Itanium	B-General_Concept
and	O
Novell	O
added	O
support	O
for	O
SUSE	O
Linux	B-Application
.	O
</s>
<s>
In	O
2007	O
,	O
CentOS	O
added	O
support	O
for	O
Itanium	B-General_Concept
in	O
a	O
new	O
release	O
.	O
</s>
<s>
SUSE	O
Linux	B-Application
11	O
(	O
supported	O
until	O
2019	O
,	O
for	O
other	O
platforms	O
SUSE	O
11	O
is	O
supported	O
to	O
2022	O
)	O
.	O
</s>
<s>
In	O
2009	O
,	O
Red	O
Hat	O
dropped	O
Itanium	B-General_Concept
support	O
in	O
Enterprise	O
Linux	B-Application
6	O
.	O
</s>
<s>
Ubuntu	O
10.10	O
dropped	O
support	O
for	O
Itanium	B-General_Concept
.	O
</s>
<s>
In	O
2021	O
,	O
Linus	O
Torvalds	O
marked	O
the	O
Itanium	B-General_Concept
code	O
as	O
orphaned	O
.	O
</s>
<s>
Torvalds	O
said	O
:	O
"	O
HPE	O
no	O
longer	O
accepts	O
orders	O
for	O
new	O
Itanium	B-General_Concept
hardware	O
,	O
and	O
Intel	O
stopped	O
accepting	O
orders	O
a	O
year	O
ago	O
.	O
</s>
<s>
In	O
2001	O
,	O
Compaq	O
announced	O
that	O
OpenVMS	B-Operating_System
would	O
be	O
ported	O
to	O
the	O
Itanium	B-General_Concept
architecture	O
.	O
</s>
<s>
This	O
led	O
to	O
the	O
creation	O
of	O
the	O
V8.x	O
releases	O
of	O
OpenVMS	B-Operating_System
,	O
which	O
support	O
both	O
Itanium-based	O
HPE	B-General_Concept
Integrity	I-General_Concept
Servers	I-General_Concept
and	O
DEC	B-Device
Alpha	I-Device
hardware	O
.	O
</s>
<s>
Since	O
the	O
Itanium	B-General_Concept
porting	O
effort	O
began	O
,	O
ownership	O
of	O
OpenVMS	B-Operating_System
transferred	O
from	O
Compaq	O
to	O
HP	O
in	O
2001	O
,	O
and	O
then	O
to	O
VMS	B-Operating_System
Software	I-Operating_System
Inc	I-Operating_System
.	O
(	O
VSI	O
)	O
in	O
2014	O
.	O
</s>
<s>
V8.0	O
(	O
2003	O
)	O
-	O
First	O
pre-production	O
release	O
of	O
OpenVMS	B-Operating_System
on	O
Itanium	B-General_Concept
available	O
outside	O
HP	O
.	O
</s>
<s>
V8.2	O
(	O
2005	O
)	O
-	O
First	O
production-grade	O
release	O
of	O
OpenVMS	B-Operating_System
on	O
Itanium	B-General_Concept
.	O
</s>
<s>
V8.4	O
(	O
2010	O
)	O
-	O
Final	O
release	O
of	O
OpenVMS	B-Operating_System
supported	O
by	O
HP	O
.	O
</s>
<s>
V8.4-2L3	O
(	O
2021	O
)	O
-	O
Final	O
release	O
of	O
OpenVMS	B-Operating_System
on	O
Itanium	B-General_Concept
supported	O
by	O
VSI	O
.	O
</s>
<s>
Support	O
for	O
Itanium	B-General_Concept
has	O
been	O
dropped	O
in	O
the	O
V9.x	O
releases	O
of	O
OpenVMS	B-Operating_System
,	O
which	O
run	O
on	O
x86-64	B-Device
only	O
.	O
</s>
<s>
NonStop	B-Architecture
OS	I-Architecture
was	O
ported	O
from	O
MIPS-based	O
hardware	O
to	O
Itanium	B-General_Concept
in	O
2005	O
.	O
</s>
<s>
NonStop	B-Architecture
OS	I-Architecture
was	O
later	O
ported	O
to	O
x86-64	B-Device
in	O
2015	O
.	O
</s>
<s>
Sales	O
of	O
Itanium-based	O
NonStop	B-Architecture
hardware	O
ended	O
in	O
2020	O
,	O
with	O
support	O
ending	O
in	O
2025	O
.	O
</s>
<s>
In	O
2005	O
,	O
Itanium	B-General_Concept
support	O
in	O
GCC	B-Application
which	O
is	O
used	O
for	O
compiling	B-Language
Linux	B-Application
was	O
improved	O
.	O
</s>
<s>
GNU	B-Application
Compiler	I-Application
Collection	I-Application
deprecated	O
support	O
for	O
IA-64	B-General_Concept
in	O
GCC	B-Application
10	O
,	O
after	O
Intel	O
announced	O
the	O
planned	O
phase-out	O
of	O
this	O
ISA	O
.	O
</s>
<s>
LLVM	B-Application
(	O
Clang	O
)	O
dropped	O
Itanium	B-General_Concept
support	O
in	O
version	O
2.6	O
.	O
</s>
<s>
HP	O
sells	O
a	O
virtualization	B-Application
technology	O
for	O
Itanium	B-General_Concept
called	O
Integrity	B-Device
Virtual	I-Device
Machines	I-Device
.	O
</s>
<s>
Emulation	B-Application
is	O
a	O
technique	O
that	O
allows	O
a	O
computer	O
to	O
execute	O
binary	O
code	O
that	O
was	O
compiled	B-Language
for	O
a	O
different	O
type	O
of	O
computer	O
.	O
</s>
<s>
Before	O
IBM	O
's	O
acquisition	O
of	O
QuickTransit	O
in	O
2009	O
,	O
application	O
binary	O
software	O
for	O
IRIX/MIPS	O
and	O
Solaris/SPARC	O
could	O
run	O
via	O
type	O
of	O
emulation	B-Application
called	O
"	O
dynamic	O
binary	O
translation	O
"	O
on	O
Linux/Itanium	O
.	O
</s>
<s>
Similarly	O
,	O
HP	O
implemented	O
a	O
method	O
to	O
execute	O
PA-RISC/HP	O
-UX	O
on	O
the	O
Itanium/HP	O
-UX	O
via	O
emulation	B-Application
,	O
to	O
simplify	O
migration	O
of	O
its	O
PA-RISC	B-Device
customers	O
to	O
the	O
radically	O
different	O
Itanium	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
Itanium	B-General_Concept
processors	O
can	O
also	O
run	O
the	O
mainframe	O
environment	O
GCOS	B-Application
from	O
Groupe	O
Bull	O
and	O
several	O
x86	B-Operating_System
operating	O
systems	O
via	O
instruction	B-Application
set	I-Application
simulators	I-Application
.	O
</s>
<s>
Itanium	B-General_Concept
was	O
aimed	O
at	O
the	O
enterprise	B-Application
server	I-Application
and	O
high-performance	B-Architecture
computing	I-Architecture
(	O
HPC	B-Architecture
)	O
markets	O
.	O
</s>
<s>
Other	O
enterprise	O
-	O
and	O
HPC-focused	O
processor	O
lines	O
include	O
Oracle	B-Application
's	O
and	O
Fujitsu	O
's	O
SPARC	B-Architecture
processors	O
and	O
IBM	O
's	O
Power	B-Device
microprocessors	I-Device
.	O
</s>
<s>
Measured	O
by	O
quantity	O
sold	O
,	O
Itanium	B-General_Concept
's	O
most	O
serious	O
competition	O
came	O
from	O
x86-64	B-Device
processors	O
including	O
Intel	O
's	O
own	O
Xeon	B-Device
line	O
and	O
AMD	O
's	O
Opteron	B-General_Concept
line	O
.	O
</s>
<s>
Since	O
2009	O
,	O
most	O
servers	O
were	O
being	O
shipped	O
with	O
x86-64	B-Device
processors	O
.	O
</s>
<s>
In	O
2005	O
,	O
Itanium	B-General_Concept
systems	O
accounted	O
for	O
about	O
14%	O
of	O
HPC	B-Architecture
systems	O
revenue	O
,	O
but	O
the	O
percentage	O
declined	O
as	O
the	O
industry	O
shifted	O
to	O
x86-64	B-Device
clusters	O
for	O
this	O
application	O
.	O
</s>
<s>
An	O
October	O
2008	O
Gartner	O
report	O
on	O
the	O
Tukwila	B-General_Concept
processor	O
,	O
stated	O
that	O
"	O
the	O
...	O
future	O
roadmap	O
for	O
Itanium	B-General_Concept
looks	O
as	O
strong	O
as	O
that	O
of	O
any	O
RISC	B-Architecture
peer	O
like	O
Power	O
or	O
SPARC.	O
"	O
</s>
<s>
An	O
Itanium-based	O
computer	O
first	O
appeared	O
on	O
the	O
list	O
of	O
the	O
TOP500	B-Operating_System
supercomputers	B-Architecture
in	O
November	O
2001	O
.	O
</s>
<s>
The	O
best	O
position	O
ever	O
achieved	O
by	O
an	O
Itanium	B-General_Concept
2	O
based	O
system	O
in	O
the	O
list	O
was	O
No	O
.	O
</s>
<s>
In	O
November	O
2004	O
,	O
Columbia	B-General_Concept
entered	O
the	O
list	O
at	O
No	O
.	O
</s>
<s>
2	O
with	O
51.8	O
Teraflops	O
,	O
and	O
there	O
was	O
at	O
least	O
one	O
Itanium-based	O
computer	O
in	O
the	O
top	O
10	O
from	O
then	O
until	O
June	O
2007	O
.	O
</s>
<s>
The	O
peak	O
number	O
of	O
Itanium-based	O
machines	O
on	O
the	O
list	O
occurred	O
in	O
the	O
November	O
2004	O
list	O
,	O
at	O
84	O
systems	O
(	O
16.8	O
%	O
)	O
;	O
by	O
June	O
2012	O
,	O
this	O
had	O
dropped	O
to	O
one	O
system	O
(	O
0.2	O
%	O
)	O
,	O
and	O
no	O
Itanium	B-General_Concept
system	O
remained	O
on	O
the	O
list	O
in	O
November	O
2012	O
.	O
</s>
<s>
The	O
Itanium	B-General_Concept
processors	O
show	O
a	O
progression	O
in	O
capability	O
.	O
</s>
<s>
McKinley	O
dramatically	O
improved	O
the	O
memory	O
hierarchy	O
and	O
allowed	O
Itanium	B-General_Concept
to	O
become	O
reasonably	O
competitive	O
.	O
</s>
<s>
Madison	O
,	O
with	O
the	O
shift	O
to	O
a	O
130nm	B-Algorithm
process	O
,	O
allowed	O
for	O
enough	O
cache	B-General_Concept
space	O
to	O
overcome	O
the	O
major	O
performance	O
bottlenecks	O
.	O
</s>
<s>
Montecito	B-Device
,	O
with	O
a	O
90nm	O
process	O
,	O
allowed	O
for	O
a	O
dual-core	B-Architecture
implementation	O
and	O
a	O
major	O
improvement	O
in	O
performance	O
per	O
watt	O
.	O
</s>
<s>
Montvale	B-General_Concept
added	O
three	O
new	O
features	O
:	O
core-level	O
lockstep	B-General_Concept
,	O
demand-based	O
switching	O
and	O
front-side	B-Architecture
bus	I-Architecture
frequency	O
of	O
up	O
to	O
667MHz	O
.	O
</s>
<s>
Codename	B-Architecture
process	O
Released	O
Clock	O
L2	O
Cache/core	O
L3	O
Cache/processor	O
Bus	B-Architecture
dies/dev	O
.	O
</s>
<s>
cores/die	O
TDP/dev	O
.	O
</s>
<s>
Comments	O
ItaniumMerced	O
180	O
nm	O
2001-05-29	O
733	O
MHz	O
96	O
KB	O
none	O
266	O
MHz	O
1	O
1	O
116	O
2	O
or	O
4	O
MB	O
off-die	O
L3	O
cache	B-General_Concept
800	O
MHz	O
130	O
2	O
or	O
4	O
MB	O
off-die	O
L3	O
cache	B-General_Concept
Itanium	B-General_Concept
2McKinley	O
180	O
nm	O
2002-07-08	O
900	O
MHz	O
256	O
KB	O
1.5	O
MB	O
400	O
MHz	O
1	O
1	O
90	O
HW	O
branchlong1	O
GHz	O
100	O
3	O
MB	O
Madison	O
130	O
nm	O
2003-06-30	O
1.3	O
GHz	O
3	O
MB	O
97	O
1.4	O
GHz	O
4	O
MB	O
91	O
1.5	O
GHz	O
6	O
MB	O
107	O
2003-09-08	O
1.4	O
GHz	O
1.5	O
MB	O
91	O
3	O
MB	O
1.6	O
GHz	O
99	O
Deerfield	O
1.0	O
GHz	O
1.5	O
MB	O
55	O
Low	O
voltageHondo	O
1.1	O
GHz	O
4	O
MB	O
2	O
1	O
170	O
Not	O
a	O
product	O
of	O
Intel	O
,	O
but	O
of	O
HP	O
.	O
</s>
<s>
32	O
MB	O
L4Fanwood	O
1.3	O
GHz	O
3	O
MB	O
1	O
1	O
62	O
Low	O
voltage1.6	O
GHz	O
99	O
533	O
MHz	O
Madison	O
9M	O
1.5	O
GHz	O
4	O
MB	O
400	O
MHz	O
122	O
1.6	O
GHz	O
6	O
MB	O
9	O
MB	O
1.67	O
GHz	O
6	O
MB	O
667	O
MHz	O
9	O
MB	O
Itanium	B-General_Concept
2	O
9000	O
seriesMontecito	O
90	O
nm	O
1.4	O
–	O
1.6	O
GHz	O
256	O
KB	O
(	O
D	O
)	O
+1	O
MB	O
(	O
I	O
)	O
6	O
–	O
24	O
MB	O
400	O
–	O
533	O
MHz	O
1	O
2	O
75	O
–	O
104	O
Virtualization	B-Application
,	O
Multithread	O
,	O
no	O
HW	O
IA-32	B-Device
Itanium	B-General_Concept
9100	O
seriesMontvale	O
90	O
nm	O
1.42	O
–	O
1.66	O
GHz	O
256	O
KB	O
(	O
D	O
)	O
+1	O
MB	O
(	O
I	O
)	O
8	O
–	O
24	O
MB	O
400	O
–	O
667	O
MHz	O
1	O
1	O
–	O
2	O
75	O
–	O
104	O
Core-level	O
lockstep	B-General_Concept
,	O
demand-based	O
switching	O
Itanium	B-General_Concept
9300	I-General_Concept
seriesTukwila	O
65	O
nm	O
1.33	O
–	O
1.73	O
GHz	O
256	O
KB	O
(	O
D	O
)	O
+512	O
KB	O
(	O
I	O
)	O
10	O
–	O
24	O
MB	O
QPI	B-Architecture
with4.8	O
GT/s	O
1	O
2	O
–	O
4	O
130	O
–	O
185	O
A	O
new	O
point-to-point	O
processor	O
interconnect	O
,	O
the	O
QPI	B-Architecture
,	O
replacing	O
the	O
FSB	B-Architecture
.	O
</s>
<s>
Turbo	B-Device
Boost	I-Device
Itanium	B-General_Concept
9500	O
seriesPoulson	O
32	O
nm	O
1.73	O
–	O
2.53	O
GHz	O
256	O
KB	O
(	O
D	O
)	O
+512	O
KB	O
(	O
I	O
)	O
20	O
–	O
32	O
MB	O
QPI	B-Architecture
with6.4	O
GT/s	O
1	O
4	O
–	O
8	O
130	O
–	O
170	O
Doubled	O
issue	B-Operating_System
width	I-Operating_System
(	O
from	O
6	O
to	O
12	O
instructions	O
per	O
cycle	O
)	O
,	O
Instruction	O
Replay	O
technology	O
,	O
Dual-domain	O
hyperthreading	B-Operating_System
Itanium	B-General_Concept
9700	O
seriesKittson	O
32	O
nm	O
1.73	O
–	O
2.66	O
GHz	O
256	O
KB	O
(	O
D	O
)	O
+512	O
KB	O
(	O
I	O
)	O
20	O
–	O
32	O
MB	O
QPI	B-Architecture
with6.4	O
GT/s	O
1	O
4	O
–	O
8	O
130	O
–	O
170	O
No	O
architectural	O
improvements	O
over	O
Poulson	O
,	O
5	O
%	O
higher	O
clock	O
for	O
the	O
top	O
model	O
Codename	B-Architecture
process	O
Released	O
Clock	O
L2	O
Cache/core	O
L3	O
Cache/processor	O
Bus	B-Architecture
dies/dev	O
.	O
</s>
<s>
When	O
first	O
released	O
in	O
2001	O
,	O
Itanium	B-General_Concept
's	O
performance	O
was	O
disappointing	O
compared	O
to	O
better-established	O
RISC	B-Architecture
and	O
CISC	B-Architecture
processors	I-Architecture
.	O
</s>
<s>
Emulation	B-Application
to	O
run	O
existing	O
x86	B-Operating_System
applications	O
and	O
operating	O
systems	O
was	O
particularly	O
poor	O
,	O
with	O
one	O
benchmark	O
in	O
2001	O
reporting	O
that	O
it	O
was	O
equivalent	O
at	O
best	O
to	O
a	O
100MHz	O
Pentium	B-General_Concept
in	O
this	O
mode	O
(	O
1.1GHz	O
Pentiums	B-General_Concept
were	O
on	O
the	O
market	O
at	O
that	O
time	O
)	O
.	O
</s>
<s>
Itanium	B-General_Concept
failed	O
to	O
make	O
significant	O
inroads	O
against	O
IA-32	B-Device
or	O
RISC	B-Architecture
,	O
and	O
suffered	O
further	O
following	O
the	O
arrival	O
of	O
x86-64	B-Device
systems	O
which	O
offered	O
greater	O
compatibility	O
with	O
older	O
x86	B-Operating_System
applications	O
.	O
</s>
<s>
In	O
a	O
2009	O
article	O
on	O
the	O
history	O
of	O
the	O
processor	O
—	O
"	O
How	O
the	O
Itanium	B-General_Concept
Killed	O
the	O
Computer	O
Industry	O
"	O
—	O
journalist	O
John	O
C	O
.	O
Dvorak	O
reported	O
"	O
This	O
continues	O
to	O
be	O
one	O
of	O
the	O
great	O
fiascos	O
of	O
the	O
last	O
50	O
years	O
"	O
.	O
</s>
<s>
In	O
an	O
interview	O
,	O
Donald	O
Knuth	O
said	O
"	O
The	O
Itanium	B-General_Concept
approach	O
...	O
was	O
supposed	O
to	O
be	O
so	O
terrific	O
—	O
until	O
it	O
turned	O
out	O
that	O
the	O
wished-for	O
compilers	B-Language
were	O
basically	O
impossible	O
to	O
write.	O
"	O
</s>
<s>
Both	O
Red	O
Hat	O
and	O
Microsoft	O
announced	O
plans	O
to	O
drop	O
Itanium	B-General_Concept
support	O
in	O
their	O
operating	O
systems	O
due	O
to	O
lack	O
of	O
market	O
interest	O
;	O
however	O
,	O
other	O
Linux	B-Application
distributions	I-Application
such	O
as	O
Gentoo	B-Application
and	O
Debian	O
remain	O
available	O
for	O
Itanium	B-General_Concept
.	O
</s>
<s>
On	O
March	O
22	O
,	O
2011	O
,	O
Oracle	B-Application
Corporation	I-Application
announced	O
that	O
it	O
would	O
no	O
longer	O
develop	O
new	O
products	O
for	O
HP-UX	B-Application
on	O
Itanium	B-General_Concept
,	O
although	O
it	O
would	O
continue	O
to	O
provide	O
support	O
for	O
existing	O
products	O
.	O
</s>
<s>
Following	O
this	O
announcement	O
,	O
HP	O
sued	O
Oracle	B-Application
for	O
breach	O
of	O
contract	O
,	O
arguing	O
that	O
Oracle	B-Application
had	O
violated	O
conditions	O
imposed	O
during	O
settlement	O
over	O
Oracle	B-Application
's	O
hiring	O
of	O
former	O
HP	O
CEO	O
Mark	O
Hurd	O
as	O
its	O
co-CEO	O
,	O
requiring	O
the	O
vendor	O
to	O
support	O
Itanium	B-General_Concept
on	O
its	O
software	O
"	O
until	O
such	O
time	O
as	O
HP	O
discontinues	O
the	O
sales	O
of	O
its	O
Itanium-based	O
servers	O
"	O
,	O
and	O
that	O
the	O
breach	O
had	O
harmed	O
its	O
business	O
.	O
</s>
<s>
In	O
2012	O
,	O
a	O
court	O
ruled	O
in	O
favor	O
of	O
HP	O
,	O
and	O
ordered	O
Oracle	B-Application
to	O
resume	O
its	O
support	O
for	O
Itanium	B-General_Concept
.	O
</s>
<s>
Oracle	B-Application
unsuccessfully	O
appealed	O
the	O
decision	O
to	O
the	O
California	O
Court	O
of	O
Appeal	O
in	O
2021	O
.	O
</s>
<s>
A	O
former	O
Intel	O
official	O
reported	O
that	O
the	O
Itanium	B-General_Concept
business	O
had	O
become	O
profitable	O
for	O
Intel	O
in	O
late	O
2009	O
.	O
</s>
<s>
By	O
2009	O
,	O
the	O
chip	O
was	O
almost	O
entirely	O
deployed	O
on	O
servers	O
made	O
by	O
HP	O
,	O
which	O
had	O
over	O
95%	O
of	O
the	O
Itanium	B-General_Concept
server	O
market	O
share	O
,	O
making	O
the	O
main	O
operating	O
system	O
for	O
Itanium	B-General_Concept
HP-UX	B-Application
.	O
</s>
<s>
On	O
March	O
22	O
,	O
2011	O
,	O
Intel	O
reaffirmed	O
its	O
commitment	O
to	O
Itanium	B-General_Concept
with	O
multiple	O
generations	O
of	O
chips	O
in	O
development	O
and	O
on	O
schedule	O
.	O
</s>
<s>
Although	O
Itanium	B-General_Concept
did	O
attain	O
limited	O
success	O
in	O
the	O
niche	O
market	O
of	O
high-end	O
computing	O
,	O
Intel	O
had	O
originally	O
hoped	O
it	O
would	O
find	O
broader	O
acceptance	O
as	O
a	O
replacement	O
for	O
the	O
original	O
x86	B-Operating_System
architecture	I-Operating_System
.	O
</s>
<s>
AMD	O
chose	O
a	O
different	O
direction	O
,	O
designing	O
the	O
less	O
radical	O
x86-64	B-Device
,	O
a	O
64-bit	B-Device
extension	O
to	O
the	O
existing	O
x86	B-Operating_System
architecture	I-Operating_System
,	O
which	O
Microsoft	O
then	O
supported	O
,	O
forcing	O
Intel	O
to	O
introduce	O
the	O
same	O
extensions	O
in	O
its	O
own	O
x86-based	O
processors	O
.	O
</s>
<s>
These	O
designs	O
can	O
run	O
existing	O
32-bit	O
applications	O
at	O
native	O
hardware	O
speed	O
,	O
while	O
offering	O
support	O
for	O
64-bit	B-Device
memory	O
addressing	O
and	O
other	O
enhancements	O
to	O
new	O
applications	O
.	O
</s>
<s>
This	O
architecture	O
has	O
now	O
become	O
the	O
predominant	O
64-bit	B-Device
architecture	I-Device
in	O
the	O
desktop	O
and	O
portable	O
market	O
.	O
</s>
<s>
Although	O
some	O
Itanium-based	O
workstations	B-Device
were	O
initially	O
introduced	O
by	O
companies	O
such	O
as	O
SGI	O
,	O
they	O
are	O
no	O
longer	O
available	O
.	O
</s>
<s>
HP	O
begins	O
investigating	O
EPIC	B-General_Concept
.	O
</s>
<s>
September	O
:	O
HP	O
,	O
Novell	O
,	O
and	O
SCO	O
announce	O
plans	O
for	O
a	O
"	O
high	O
volume	O
UNIX	B-Application
operating	I-Application
system	I-Application
"	O
to	O
deliver	O
"	O
64-bit	B-Device
networked	O
computing	O
on	O
the	O
HP/Intel	O
architecture	O
"	O
.	O
</s>
<s>
October	O
:	O
Compaq	O
announces	O
it	O
will	O
use	O
IA-64	B-General_Concept
.	O
</s>
<s>
June	O
:	O
IDC	O
predicts	O
IA-64	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
38bn/yr	O
by	O
2001	O
.	O
</s>
<s>
October	O
:	O
Dell	O
announces	O
it	O
will	O
use	O
IA-64	B-General_Concept
.	O
</s>
<s>
December	O
:	O
Intel	O
and	O
Sun	O
announce	O
joint	O
effort	O
to	O
port	O
Solaris	B-Application
to	O
IA-64	B-General_Concept
.	O
</s>
<s>
March	O
:	O
SCO	O
admits	O
HP/SCO	B-Operating_System
Unix	I-Operating_System
alliance	I-Operating_System
is	O
now	O
dead	O
.	O
</s>
<s>
June	O
:	O
IDC	O
predicts	O
IA-64	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
30bn/yr	O
by	O
2001	O
.	O
</s>
<s>
October	O
:	O
Project	B-Operating_System
Monterey	I-Operating_System
is	O
formed	O
to	O
create	O
a	O
common	O
UNIX	B-Application
for	O
IA-64	B-General_Concept
.	O
</s>
<s>
February	O
:	O
Project	O
Trillian	O
is	O
formed	O
to	O
port	O
Linux	B-Application
to	O
IA-64	B-General_Concept
.	O
</s>
<s>
August	O
:	O
IDC	O
predicts	O
IA-64	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
25bn/yr	O
by	O
2002	O
.	O
</s>
<s>
October	O
:	O
Intel	O
announces	O
the	O
Itanium	B-General_Concept
name	O
.	O
</s>
<s>
June	O
:	O
IDC	O
predicts	O
Itanium	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
25bn/yr	O
by	O
2003	O
.	O
</s>
<s>
July	O
:	O
Sun	O
and	O
Intel	O
drop	O
Solaris-on-Itanium	O
plans	O
.	O
</s>
<s>
August	O
:	O
AMD	O
releases	O
specification	O
for	O
x86-64	B-Device
,	O
a	O
set	O
of	O
64-bit	B-Device
extensions	O
to	O
Intel	O
's	O
own	O
x86	B-Operating_System
architecture	I-Operating_System
intended	O
to	O
compete	O
with	O
IA-64	B-General_Concept
.	O
</s>
<s>
It	O
will	O
eventually	O
market	O
this	O
under	O
the	O
name	O
"	O
AMD64	B-Device
"	O
.	O
</s>
<s>
June	O
:	O
IDC	O
predicts	O
Itanium	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
15bn/yr	O
by	O
2004	O
.	O
</s>
<s>
June	O
:	O
Project	B-Operating_System
Monterey	I-Operating_System
dies	O
.	O
</s>
<s>
July	O
:	O
Itanium	B-General_Concept
is	O
released	O
.	O
</s>
<s>
October	O
:	O
IDC	O
predicts	O
Itanium	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
12bn/yr	O
by	O
the	O
end	O
of	O
2004	O
.	O
</s>
<s>
October	O
25:The	O
final	O
client	O
version	O
of	O
Windows	B-Application
available	O
for	O
IA-64	B-General_Concept
,	O
Windows	B-Application
XP	I-Application
is	O
released	O
.	O
</s>
<s>
November	O
:	O
IBM	O
's	O
320-processor	O
Titan	O
NOW	O
Cluster	O
at	O
National	B-General_Concept
Center	I-General_Concept
for	I-General_Concept
Supercomputing	I-General_Concept
Applications	I-General_Concept
is	O
listed	O
on	O
the	O
TOP500	B-Operating_System
list	O
at	O
position	O
#34	O
.	O
</s>
<s>
November	O
:	O
Compaq	O
delays	O
Itanium	B-General_Concept
Product	O
release	O
due	O
to	O
problems	O
with	O
processor	O
.	O
</s>
<s>
March	O
:	O
IDC	O
predicts	O
Itanium	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
5bn/yr	O
by	O
end	O
2004	O
.	O
</s>
<s>
April	O
:	O
IDC	O
predicts	O
Itanium	B-General_Concept
systems	O
sales	O
will	O
reach	O
$	O
9bn/yr	O
by	O
end	O
2007	O
.	O
</s>
<s>
April	O
:	O
AMD	O
releases	O
Opteron	B-General_Concept
,	O
the	O
first	O
processor	O
with	O
x86-64	B-Device
extensions	O
.	O
</s>
<s>
February	O
:	O
Intel	O
announces	O
it	O
has	O
been	O
working	O
on	O
its	O
own	O
x86-64	B-Device
implementation	O
(	O
which	O
it	O
will	O
eventually	O
market	O
under	O
the	O
name	O
"	O
Intel	O
64	O
"	O
)	O
.	O
</s>
<s>
June	O
:	O
Intel	O
releases	O
its	O
first	O
processor	O
with	O
x86-64	B-Device
extensions	O
,	O
a	O
Xeon	B-Device
processor	O
codenamed	O
"	O
Nocona	O
"	O
.	O
</s>
<s>
June	O
:	O
Thunder	O
,	O
a	O
system	O
at	O
LLNL	O
with	O
4096	O
Itanium2	O
processors	O
,	O
is	O
listed	O
on	O
the	O
TOP500	B-Operating_System
list	O
at	O
position	O
#2	O
.	O
</s>
<s>
November	O
:	O
Columbia	B-General_Concept
,	O
an	O
SGI	B-Architecture
Altix	I-Architecture
3700	O
with	O
10160	O
Itanium2	O
processors	O
at	O
NASA	O
Ames	O
Research	O
Center	O
,	O
is	O
listed	O
on	O
the	O
TOP500	B-Operating_System
list	O
at	O
position	O
#2	O
.	O
</s>
<s>
December	O
:	O
Itanium	B-General_Concept
system	O
sales	O
for	O
2004	O
reach	O
$1.4	O
bn	O
.	O
</s>
<s>
February	O
:	O
IBM	O
server	O
design	O
drops	O
Itanium	B-General_Concept
support	O
.	O
</s>
<s>
June	O
:	O
An	O
Itanium2	O
sets	O
a	O
record	O
SPECfp2000	O
result	O
of	O
2,801	O
in	O
a	O
Hitachi	O
,	O
Ltd	O
.	O
Computing	B-Architecture
blade	I-Architecture
.	O
</s>
<s>
September	O
:	O
Itanium	B-General_Concept
Solutions	O
Alliance	O
is	O
formed	O
.	O
</s>
<s>
September	O
:	O
Dell	O
exits	O
the	O
Itanium	B-General_Concept
business	O
.	O
</s>
<s>
October	O
:	O
Itanium	B-General_Concept
server	O
sales	O
reach	O
$	O
619M/quarter	O
in	O
the	O
third	O
quarter	O
.	O
</s>
<s>
October	O
:	O
Intel	O
announces	O
one-year	O
delays	O
for	O
Montecito	B-Device
,	O
Montvale	B-General_Concept
,	O
and	O
Tukwila	B-General_Concept
.	O
</s>
<s>
January	O
:	O
Itanium	B-General_Concept
Solutions	O
Alliance	O
announces	O
a	O
$10bn	O
collective	O
investment	O
in	O
Itanium	B-General_Concept
by	O
2010	O
.	O
</s>
<s>
February	O
:	O
IDC	O
predicts	O
Itanium	B-General_Concept
systems	O
sales	O
will	O
reach	O
$6.6	O
bn/yr	O
by	O
2009	O
.	O
</s>
<s>
July	O
:	O
Intel	O
releases	O
the	O
dual-core	B-Architecture
"	O
Montecito	B-Device
"	O
Itanium2	O
9000	O
series	O
.	O
</s>
<s>
April	O
:	O
CentOS	O
(	O
RHEL-clone	O
)	O
places	O
Itanium	B-General_Concept
support	O
on	O
hold	O
for	O
the	O
5.0	O
release	O
.	O
</s>
<s>
October	O
:	O
Intel	O
releases	O
the	O
"	O
Montvale	B-General_Concept
"	O
Itanium2	O
9100	O
series	O
.	O
</s>
<s>
November	O
:	O
Intel	O
renames	O
the	O
family	O
from	O
Itanium	B-General_Concept
2	O
back	O
to	O
Itanium	B-General_Concept
.	O
</s>
<s>
December	O
:	O
Red	O
Hat	O
announces	O
that	O
it	O
is	O
dropping	O
support	O
for	O
Itanium	B-General_Concept
in	O
the	O
next	O
release	O
of	O
its	O
enterprise	O
OS	O
,	O
Red	O
Hat	O
Enterprise	O
Linux	B-Application
6	O
.	O
</s>
<s>
February	O
:	O
Intel	O
announces	O
the	O
"	O
Tukwila	B-General_Concept
"	O
Itanium	B-General_Concept
9300	I-General_Concept
series	O
.	O
</s>
<s>
April	O
:	O
Microsoft	O
announces	O
that	O
Windows	B-Device
Server	I-Device
2008	I-Device
R2	I-Device
will	O
be	O
the	O
final	O
version	O
of	O
Windows	B-Device
Server	I-Device
to	O
support	O
Itanium	B-General_Concept
.	O
</s>
<s>
October	O
:	O
Intel	O
announces	O
new	O
releases	O
of	O
Intel	B-Language
C++	I-Language
Compiler	I-Language
and	O
Intel	B-Language
Fortran	I-Language
Compiler	I-Language
for	O
x86/x64	O
,	O
while	O
Itanium	B-General_Concept
support	O
is	O
only	O
available	O
in	O
older	O
versions	O
.	O
</s>
<s>
March	O
:	O
Oracle	B-Application
Corporation	I-Application
announces	O
that	O
it	O
will	O
stop	O
developing	O
application	O
software	O
,	O
middleware	O
,	O
and	O
Oracle	B-Application
Linux	B-Application
for	O
the	O
Itanium	B-General_Concept
.	O
</s>
<s>
March	O
:	O
Intel	O
and	O
HP	O
reiterate	O
their	O
support	O
of	O
Itanium	B-General_Concept
.	O
</s>
<s>
April	O
:	O
Huawei	O
and	O
Inspur	O
announce	O
that	O
they	O
will	O
develop	O
Itanium	B-General_Concept
servers	O
.	O
</s>
<s>
February	O
:	O
Court	O
papers	O
were	O
released	O
from	O
a	O
case	O
between	O
HP	O
and	O
Oracle	B-Application
Corporation	I-Application
that	O
gave	O
insight	O
to	O
the	O
fact	O
that	O
HP	O
was	O
paying	O
Intel	O
$690	O
million	O
to	O
keep	O
Itanium	B-General_Concept
on	O
life	O
support	O
.	O
</s>
<s>
SAP	B-Application
discontinues	O
support	O
for	O
Business	O
Objects	O
on	O
Itanium	B-General_Concept
.	O
</s>
<s>
September	O
:	O
In	O
response	O
to	O
a	O
court	O
ruling	O
,	O
Oracle	B-Application
reinstitutes	O
support	O
for	O
Oracle	B-Application
software	O
on	O
Itanium	B-General_Concept
hardware	O
.	O
</s>
<s>
January	O
:	O
Intel	O
cancels	O
Kittson	O
as	O
a	O
22	O
nm	O
shrink	O
of	O
Poulson	O
,	O
moving	O
it	O
instead	O
to	O
its	O
32nm	B-Algorithm
process	O
.	O
</s>
<s>
November	O
:	O
HP	O
announces	O
that	O
its	O
NonStop	B-Architecture
servers	O
will	O
start	O
using	O
Intel	O
64	O
(	O
x86-64	B-Device
)	O
chips	O
.	O
</s>
<s>
July	O
:	O
VMS	B-Operating_System
Software	I-Operating_System
Inc	I-Operating_System
(	O
VSI	O
)	O
announces	O
that	O
OpenVMS	B-Operating_System
will	O
be	O
ported	O
to	O
x86-64	B-Device
.	O
</s>
<s>
December	O
:	O
HP	O
announces	O
that	O
their	O
next	O
generation	O
of	O
Superdome	B-Device
X	O
and	O
Nonstop	B-Architecture
X	O
servers	O
would	O
be	O
equipped	O
with	O
Intel	B-Device
Xeon	I-Device
processors	O
,	O
and	O
not	O
Itanium	B-General_Concept
.	O
</s>
<s>
While	O
HP	O
continues	O
to	O
sell	O
and	O
offer	O
support	O
for	O
the	O
Itanium-based	O
Integrity	B-General_Concept
portfolio	O
,	O
the	O
introduction	O
of	O
a	O
model	O
based	O
entirely	O
on	O
Xeon	B-Device
chips	O
marks	O
the	O
end	O
of	O
an	O
era	O
.	O
</s>
<s>
February	O
:	O
Intel	O
ships	O
test	O
versions	O
of	O
Kittson	O
,	O
the	O
first	O
new	O
Itanium	B-General_Concept
chip	O
since	O
2012	O
.	O
</s>
<s>
May	O
:	O
Kittson	O
formally	O
ships	O
in	O
volume	O
as	O
the	O
Itanium	B-General_Concept
9700	O
series	O
.	O
</s>
<s>
Intel	O
states	O
that	O
Kittson	O
is	O
the	O
final	O
Itanium	B-General_Concept
generation	O
.	O
</s>
<s>
January	O
:	O
Intel	O
announces	O
Itanium	B-General_Concept
's	O
end	O
of	O
life	O
with	O
additional	O
orders	O
accepted	O
until	O
January	O
2020	O
and	O
last	O
shipments	O
no	O
later	O
than	O
July	O
2021	O
.	O
</s>
<s>
Hewlett	O
Packard	O
Enterprise	O
(	O
HPE	O
)	O
is	O
accepting	O
the	O
last	O
orders	O
for	O
the	O
latest	O
Itanium	B-General_Concept
i6	O
servers	O
on	O
December	O
31	O
,	O
2020	O
.	O
</s>
<s>
February	O
:	O
Linus	O
Torvalds	O
marks	O
the	O
Itanium	B-General_Concept
port	O
of	O
Linux	B-Application
as	O
orphaned	O
.	O
</s>
<s>
"	O
HPE	O
no	O
longer	O
accepts	O
orders	O
for	O
new	O
Itanium	B-General_Concept
hardware	O
,	O
and	O
Intel	O
stopped	O
accepting	O
orders	O
a	O
year	O
ago	O
.	O
</s>
