<s>
ARM	O
(	O
stylised	O
in	O
lowercase	O
as	O
arm	O
,	O
formerly	O
an	O
acronym	O
for	O
Advanced	B-Architecture
RISC	I-Architecture
Machines	I-Architecture
and	O
originally	O
Acorn	B-Architecture
RISC	I-Architecture
Machine	I-Architecture
)	O
is	O
a	O
family	O
of	O
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
instruction	B-General_Concept
set	I-General_Concept
architectures	I-General_Concept
for	O
computer	B-General_Concept
processors	I-General_Concept
,	O
configured	O
for	O
various	O
environments	O
.	O
</s>
<s>
Arm	O
Ltd	O
.	O
develops	O
the	O
architectures	O
and	O
licenses	O
them	O
to	O
other	O
companies	O
,	O
who	O
design	O
their	O
own	O
products	O
that	O
implement	O
one	O
or	O
more	O
of	O
those	O
architectures	O
,	O
including	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
(	O
SoC	B-Architecture
)	O
and	O
system	B-Architecture
on	I-Architecture
module	I-Architecture
(	O
SOM	O
)	O
designs	O
,	O
that	O
incorporate	O
different	O
components	O
such	O
as	O
memory	O
,	O
interfaces	O
,	O
and	O
radios	O
.	O
</s>
<s>
It	O
also	O
designs	O
cores	B-Architecture
that	O
implement	O
these	O
instruction	B-General_Concept
set	I-General_Concept
architectures	I-General_Concept
and	O
licenses	O
these	O
designs	O
to	O
many	O
companies	O
that	O
incorporate	O
those	O
core	B-Architecture
designs	O
into	O
their	O
own	O
products	O
.	O
</s>
<s>
Due	O
to	O
their	O
low	O
costs	O
,	O
minimal	O
power	O
consumption	O
,	O
and	O
lower	O
heat	O
generation	O
than	O
their	O
competitors	O
,	O
ARM	B-Architecture
processors	I-Architecture
are	O
desirable	O
for	O
light	O
,	O
portable	O
,	O
battery-powered	O
devices	O
,	O
including	O
smartphones	B-Application
,	O
laptops	B-Device
and	O
tablet	B-Device
computers	I-Device
,	O
and	O
other	O
embedded	B-Architecture
systems	I-Architecture
.	O
</s>
<s>
However	O
,	O
ARM	B-Architecture
processors	I-Architecture
are	O
also	O
used	O
for	O
desktops	B-Device
and	O
servers	O
,	O
including	O
the	O
world	O
's	O
fastest	O
supercomputer	B-Architecture
(	O
Fugaku	B-Device
)	O
from	O
2020	O
to	O
2022	O
.	O
</s>
<s>
With	O
over	O
230	O
billion	O
ARM	B-Architecture
chips	I-Architecture
produced	O
,	O
,	O
ARM	O
is	O
the	O
most	O
widely	O
used	O
family	O
of	O
instruction	B-General_Concept
set	I-General_Concept
architectures	I-General_Concept
(	O
ISA	O
)	O
and	O
the	O
ISAs	O
produced	O
in	O
the	O
largest	O
quantity	O
.	O
</s>
<s>
Currently	O
,	O
the	O
widely	O
used	O
Cortex	O
cores	B-Architecture
,	O
older	O
"	O
classic	O
"	O
cores	B-Architecture
,	O
and	O
specialised	O
SecurCore	O
cores	B-Architecture
variants	O
are	O
available	O
for	O
each	O
of	O
these	O
to	O
include	O
or	O
exclude	O
optional	O
capabilities	O
.	O
</s>
<s>
The	O
original	O
ARM1	O
used	O
a	O
32-bit	O
internal	O
structure	O
but	O
had	O
a	O
26-bit	B-Architecture
address	B-General_Concept
space	I-General_Concept
that	O
limited	O
it	O
to	O
64MB	O
of	O
main	O
memory	O
.	O
</s>
<s>
This	O
limitation	O
was	O
removed	O
in	O
the	O
ARMv3	O
series	O
,	O
which	O
has	O
a	O
32-bit	O
address	B-General_Concept
space	I-General_Concept
,	O
and	O
several	O
additional	O
generations	O
up	O
to	O
ARMv7	O
remained	O
32-bit	O
.	O
</s>
<s>
Released	O
in	O
2011	O
,	O
the	O
ARMv8-A	O
architecture	O
added	O
support	O
for	O
a	O
64-bit	B-Device
address	B-General_Concept
space	I-General_Concept
and	O
64-bit	B-Device
arithmetic	O
with	O
its	O
new	O
32-bit	O
fixed-length	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
Arm	O
Ltd	O
.	O
has	O
also	O
released	O
a	O
series	O
of	O
additional	O
instruction	B-General_Concept
sets	I-General_Concept
for	O
different	O
rules	O
;	O
the	O
"	O
Thumb	O
"	O
extension	O
adds	O
both	O
32	O
-	O
and	O
16-bit	B-Device
instructions	B-General_Concept
for	O
improved	O
code	O
density	O
,	O
while	O
Jazelle	B-Language
added	O
instructions	B-General_Concept
for	O
directly	O
handling	O
Java	B-Language
bytecode	I-Language
.	O
</s>
<s>
More	O
recent	O
changes	O
include	O
the	O
addition	O
of	O
simultaneous	B-Operating_System
multithreading	I-Operating_System
(	O
SMT	O
)	O
for	O
improved	O
performance	O
or	O
fault	B-General_Concept
tolerance	I-General_Concept
.	O
</s>
<s>
Acorn	O
Computers	O
 '	O
first	O
widely	O
successful	O
design	O
was	O
the	O
BBC	B-Device
Micro	I-Device
,	O
introduced	O
in	O
December	O
1981	O
.	O
</s>
<s>
This	O
was	O
a	O
relatively	O
conventional	O
machine	O
based	O
on	O
the	O
MOS	B-General_Concept
Technology	I-General_Concept
6502	I-General_Concept
CPU	B-Device
but	O
ran	O
at	O
roughly	O
double	O
the	O
performance	O
of	O
competing	O
designs	O
like	O
the	O
Apple	B-Device
II	I-Device
due	O
to	O
its	O
use	O
of	O
faster	O
dynamic	O
random-access	O
memory	O
(	O
DRAM	O
)	O
.	O
</s>
<s>
Machines	O
of	O
the	O
era	O
generally	O
shared	O
memory	O
between	O
the	O
processor	O
and	O
the	O
framebuffer	B-Algorithm
,	O
which	O
allowed	O
the	O
processor	O
to	O
quickly	O
update	O
the	O
contents	O
of	O
the	O
screen	O
without	O
having	O
to	O
perform	O
separate	O
input/output	B-General_Concept
(	O
I/O	B-General_Concept
)	O
.	O
</s>
<s>
Due	O
to	O
a	O
quirk	O
of	O
the	O
6502	B-General_Concept
's	O
design	O
,	O
the	O
CPU	B-Device
left	O
the	O
memory	O
untouched	O
for	O
half	O
of	O
the	O
time	O
.	O
</s>
<s>
Thus	O
by	O
running	O
the	O
CPU	B-Device
at	O
1MHz	O
,	O
the	O
video	O
system	O
could	O
read	O
data	O
during	O
those	O
down	O
times	O
,	O
taking	O
up	O
the	O
total	O
2MHz	O
bandwidth	O
of	O
the	O
RAM	O
.	O
</s>
<s>
In	O
the	O
BBC	B-Device
Micro	I-Device
,	O
the	O
use	O
of	O
4MHz	O
RAM	O
allowed	O
the	O
same	O
technique	O
to	O
be	O
used	O
,	O
but	O
running	O
at	O
twice	O
the	O
speed	O
.	O
</s>
<s>
1981	O
was	O
also	O
the	O
year	O
that	O
the	O
IBM	B-Device
Personal	I-Device
Computer	I-Device
was	O
introduced	O
.	O
</s>
<s>
Using	O
the	O
recently	O
introduced	O
Intel	B-Device
8088	I-Device
,	O
a	O
16-bit	B-Device
CPU	B-Device
compared	O
to	O
the	O
6502	B-General_Concept
's	O
8-bit	O
design	O
,	O
it	O
offered	O
higher	O
overall	O
performance	O
.	O
</s>
<s>
Its	O
introduction	O
changed	O
the	O
desktop	B-Device
computer	I-Device
market	O
radically	O
:	O
what	O
had	O
been	O
largely	O
a	O
hobby	O
and	O
gaming	O
market	O
emerging	O
over	O
the	O
prior	O
five	O
years	O
began	O
to	O
change	O
to	O
a	O
must-have	O
business	O
tool	O
where	O
the	O
earlier	O
8-bit	O
designs	O
simply	O
could	O
not	O
compete	O
.	O
</s>
<s>
Even	O
newer	O
32-bit	O
designs	O
were	O
also	O
coming	O
to	O
market	O
,	O
such	O
as	O
the	O
Motorola	B-Device
68000	I-Device
and	O
National	O
Semiconductor	O
NS32016	O
.	O
</s>
<s>
Acorn	O
began	O
considering	O
how	O
to	O
compete	O
in	O
this	O
market	O
and	O
produced	O
a	O
new	O
paper	O
design	O
named	O
the	O
Acorn	B-Device
Business	I-Device
Computer	I-Device
.	O
</s>
<s>
They	O
set	O
themselves	O
the	O
goal	O
of	O
producing	O
a	O
machine	O
with	O
ten	O
times	O
the	O
performance	O
of	O
the	O
BBC	B-Device
Micro	I-Device
,	O
but	O
at	O
the	O
same	O
price	O
.	O
</s>
<s>
This	O
would	O
outperform	O
and	O
underprice	O
the	O
PC	B-General_Concept
.	O
</s>
<s>
At	O
the	O
same	O
time	O
,	O
the	O
recent	O
introduction	O
of	O
the	O
Apple	B-Device
Lisa	I-Device
brought	O
the	O
graphical	B-Application
user	I-Application
interface	I-Application
(	O
GUI	B-Application
)	O
concept	O
to	O
a	O
wider	O
audience	O
and	O
suggested	O
the	O
future	O
belonged	O
to	O
machines	O
with	O
a	O
GUI	B-Application
.	O
</s>
<s>
The	O
Lisa	B-Device
,	O
however	O
,	O
cost	O
$9	O
,	O
995	O
,	O
as	O
it	O
was	O
packed	O
with	O
support	O
chips	O
,	O
large	O
amounts	O
of	O
memory	O
,	O
and	O
a	O
hard	B-Device
disk	I-Device
drive	I-Device
,	O
all	O
very	O
expensive	O
then	O
.	O
</s>
<s>
The	O
engineers	O
then	O
began	O
studying	O
all	O
of	O
the	O
CPU	B-Device
designs	O
available	O
.	O
</s>
<s>
Their	O
conclusion	O
about	O
the	O
existing	O
16-bit	B-Device
designs	O
was	O
that	O
they	O
were	O
a	O
lot	O
more	O
expensive	O
and	O
were	O
still	O
"	O
a	O
bit	O
crap	O
"	O
,	O
offering	O
only	O
slightly	O
higher	O
performance	O
than	O
their	O
BBC	B-Device
Micro	I-Device
design	O
.	O
</s>
<s>
The	O
second	O
was	O
a	O
visit	O
by	O
Steve	O
Furber	O
and	O
Sophie	O
Wilson	O
to	O
the	O
Western	O
Design	O
Center	O
,	O
a	O
company	O
run	O
by	O
Bill	O
Mensch	O
and	O
his	O
sister	O
,	O
which	O
had	O
become	O
the	O
logical	O
successor	O
to	O
the	O
MOS	O
team	O
and	O
was	O
offering	O
new	O
versions	O
like	O
the	O
WDC	B-General_Concept
65C02	I-General_Concept
.	O
</s>
<s>
The	O
Acorn	O
team	O
saw	O
high	O
school	O
students	O
producing	O
chip	O
layouts	O
on	O
Apple	B-Device
II	I-Device
machines	O
,	O
which	O
suggested	O
that	O
anyone	O
could	O
do	O
it	O
.	O
</s>
<s>
In	O
contrast	O
,	O
a	O
visit	O
to	O
another	O
design	O
firm	O
working	O
on	O
modern	O
32-bit	O
CPU	B-Device
revealed	O
a	O
team	O
with	O
over	O
a	O
dozen	O
members	O
which	O
were	O
already	O
on	O
revision	O
H	O
of	O
their	O
design	O
and	O
yet	O
it	O
still	O
contained	O
bugs	O
.	O
</s>
<s>
This	O
cemented	O
their	O
late	O
1983	O
decision	O
to	O
begin	O
their	O
own	O
CPU	B-Device
design	O
,	O
the	O
Acorn	B-Architecture
RISC	I-Architecture
Machine	I-Architecture
.	O
</s>
<s>
The	O
original	O
Berkeley	B-General_Concept
RISC	I-General_Concept
designs	O
were	O
in	O
some	O
sense	O
teaching	O
systems	O
,	O
not	O
designed	O
specifically	O
for	O
outright	O
performance	O
.	O
</s>
<s>
To	O
the	O
RISC	B-Architecture
's	O
basic	O
register-heavy	O
and	O
load/store	O
concepts	O
,	O
ARM	O
added	O
a	O
number	O
of	O
the	O
well-received	O
design	O
notes	O
of	O
the	O
6502	B-General_Concept
.	O
</s>
<s>
Primary	O
among	O
them	O
was	O
the	O
ability	O
to	O
quickly	O
serve	O
interrupts	B-Application
,	O
which	O
allowed	O
the	O
machines	O
to	O
offer	O
reasonable	O
input/output	B-General_Concept
performance	O
with	O
no	O
added	O
external	O
hardware	O
.	O
</s>
<s>
To	O
offer	O
interrupts	B-Application
with	O
similar	O
performance	O
as	O
the	O
6502	B-General_Concept
,	O
the	O
ARM	O
design	O
limited	O
its	O
physical	O
address	B-General_Concept
space	I-General_Concept
to	O
64MB	O
of	O
total	O
addressable	O
space	O
,	O
requiring	O
26	B-Architecture
bits	I-Architecture
of	O
address	O
.	O
</s>
<s>
As	O
instructions	B-General_Concept
were	O
4	O
bytes	O
(	O
32	O
bits	O
)	O
long	O
,	O
and	O
required	O
to	O
be	O
aligned	O
on	O
4-byte	O
boundaries	O
,	O
the	O
lower	O
2	O
bits	O
of	O
an	O
instruction	O
address	O
were	O
always	O
zero	O
.	O
</s>
<s>
This	O
meant	O
the	O
program	B-General_Concept
counter	I-General_Concept
(	O
PC	B-General_Concept
)	O
only	O
needed	O
to	O
be	O
24	O
bits	O
,	O
allowing	O
it	O
to	O
be	O
stored	O
along	O
with	O
the	O
eight	O
bit	O
processor	B-General_Concept
flags	I-General_Concept
in	O
a	O
single	O
32-bit	O
register	B-General_Concept
.	O
</s>
<s>
That	O
meant	O
that	O
upon	O
receiving	O
an	O
interrupt	B-Application
,	O
the	O
entire	O
machine	O
state	O
could	O
be	O
saved	O
in	O
a	O
single	O
operation	O
,	O
whereas	O
had	O
the	O
PC	B-General_Concept
been	O
a	O
full	O
32-bit	O
value	O
,	O
it	O
would	O
require	O
separate	O
operations	O
to	O
store	O
the	O
PC	B-General_Concept
and	O
the	O
status	O
flags	O
.	O
</s>
<s>
This	O
decision	O
halved	O
the	O
interrupt	B-Application
overhead	O
.	O
</s>
<s>
Another	O
change	O
,	O
and	O
among	O
the	O
most	O
important	O
in	O
terms	O
of	O
practical	O
real-world	O
performance	O
,	O
was	O
the	O
modification	O
of	O
the	O
instruction	B-General_Concept
set	I-General_Concept
to	O
take	O
advantage	O
of	O
page	O
mode	O
DRAM	O
.	O
</s>
<s>
The	O
ARM	O
design	O
added	O
special	O
vector-like	O
memory	O
access	O
instructions	B-General_Concept
,	O
the	O
"	O
S-cycles	O
"	O
,	O
that	O
could	O
be	O
used	O
to	O
fill	O
or	O
save	O
multiple	O
registers	B-General_Concept
in	O
a	O
single	O
page	O
using	O
page	O
mode	O
.	O
</s>
<s>
The	O
Berkeley	B-General_Concept
RISC	I-General_Concept
designs	O
used	O
register	B-General_Concept
windows	I-General_Concept
to	O
reduce	O
the	O
number	O
of	O
register	B-General_Concept
saves	O
and	O
restores	O
performed	O
in	O
procedure	O
calls	O
;	O
the	O
ARM	O
design	O
did	O
not	O
adopt	O
this	O
.	O
</s>
<s>
Wilson	O
developed	O
the	O
instruction	B-General_Concept
set	I-General_Concept
,	O
writing	O
a	O
simulation	O
of	O
the	O
processor	O
in	O
BBC	O
BASIC	O
that	O
ran	O
on	O
a	O
BBC	B-Device
Micro	I-Device
with	O
a	O
second	O
6502	B-General_Concept
processor	I-General_Concept
.	O
</s>
<s>
The	O
official	O
Acorn	B-Architecture
RISC	I-Architecture
Machine	I-Architecture
project	O
started	O
in	O
October	O
1983	O
.	O
</s>
<s>
The	O
first	O
ARM	O
application	B-Application
was	O
as	O
a	O
second	O
processor	O
for	O
the	O
BBC	B-Device
Micro	I-Device
,	O
where	O
it	O
helped	O
in	O
developing	O
simulation	O
software	O
to	O
finish	O
development	O
of	O
the	O
support	O
chips	O
(	O
VIDC	O
,	O
IOC	O
,	O
MEMC	O
)	O
,	O
and	O
sped	O
up	O
the	O
CAD	B-Application
software	I-Application
used	O
in	O
ARM2	O
development	O
.	O
</s>
<s>
Wilson	O
subsequently	O
rewrote	O
BBC	B-Language
BASIC	I-Language
in	O
ARM	O
assembly	B-Language
language	I-Language
.	O
</s>
<s>
The	O
in-depth	O
knowledge	O
gained	O
from	O
designing	O
the	O
instruction	B-General_Concept
set	I-General_Concept
enabled	O
the	O
code	O
to	O
be	O
very	O
dense	O
,	O
making	O
ARM	O
BBC	B-Language
BASIC	I-Language
an	O
extremely	O
good	O
test	O
for	O
any	O
ARM	O
emulator	O
.	O
</s>
<s>
Further	O
,	O
a	O
new	O
Fast	B-General_Concept
Interrupt	I-General_Concept
reQuest	I-General_Concept
mode	O
,	O
FIQ	B-General_Concept
for	O
short	O
,	O
allowed	O
registers	B-General_Concept
8	O
through	O
14	O
to	O
be	O
replaced	O
as	O
part	O
of	O
the	O
interrupt	B-Application
itself	O
.	O
</s>
<s>
This	O
meant	O
FIQ	B-General_Concept
requests	O
did	O
not	O
have	O
to	O
save	O
out	O
their	O
registers	B-General_Concept
,	O
further	O
speeding	O
interrupts	B-Application
.	O
</s>
<s>
The	O
ARM2	O
was	O
roughly	O
seven	O
times	O
the	O
performance	O
of	O
a	O
typical	O
7MHz	O
68000-based	O
system	O
like	O
the	O
Amiga	B-Device
or	O
Macintosh	B-Device
SE	I-Device
.	O
</s>
<s>
It	O
was	O
twice	O
as	O
fast	O
as	O
an	O
Intel	B-General_Concept
80386	I-General_Concept
running	O
at	O
16MHz	O
,	O
and	O
about	O
the	O
same	O
speed	O
as	O
a	O
multi-processor	O
VAX-11/784	O
superminicomputer	B-Device
.	O
</s>
<s>
The	O
only	O
systems	O
that	O
beat	O
it	O
were	O
the	O
Sun	B-Architecture
SPARC	I-Architecture
and	O
MIPS	B-Device
R2000	I-Device
RISC-based	B-Architecture
workstations	B-Device
.	O
</s>
<s>
Further	O
,	O
as	O
the	O
CPU	B-Device
was	O
designed	O
for	O
high-speed	O
I/O	B-General_Concept
,	O
it	O
dispensed	O
with	O
many	O
of	O
the	O
support	O
chips	O
seen	O
in	O
these	O
machines	O
;	O
notably	O
,	O
it	O
lacked	O
any	O
dedicated	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
controller	O
which	O
was	O
often	O
found	O
on	O
workstations	B-Device
.	O
</s>
<s>
The	O
result	O
was	O
a	O
dramatically	O
simplified	O
design	O
,	O
offering	O
performance	O
on	O
par	O
with	O
expensive	O
workstations	B-Device
but	O
at	O
a	O
price	O
point	O
similar	O
to	O
contemporary	O
desktops	B-Device
.	O
</s>
<s>
The	O
ARM2	O
featured	O
a	O
32-bit	O
data	B-General_Concept
bus	I-General_Concept
,	O
26-bit	B-Architecture
address	B-General_Concept
space	I-General_Concept
and	O
2732-bit	O
registers	B-General_Concept
,	O
of	O
which	O
16	O
are	O
accessible	O
at	O
any	O
one	O
time	O
(	O
including	O
the	O
PC	B-General_Concept
)	O
.	O
</s>
<s>
The	O
ARM2	O
had	O
a	O
transistor	O
count	O
of	O
just	O
30	O
,	O
000	O
,	O
compared	O
to	O
Motorola	O
's	O
six-year-older	O
68000	B-Device
model	O
with	O
around	O
68,000	O
.	O
</s>
<s>
Much	O
of	O
this	O
simplicity	O
came	O
from	O
the	O
lack	O
of	O
microcode	B-Device
,	O
which	O
represents	O
about	O
one-quarter	O
to	O
one-third	O
of	O
the	O
68000	B-Device
's	O
transistors	O
,	O
and	O
the	O
lack	O
of	O
(	O
like	O
most	O
CPUs	B-Device
of	O
the	O
day	O
)	O
a	O
cache	B-General_Concept
.	O
</s>
<s>
This	O
simplicity	O
enabled	O
the	O
ARM2	O
to	O
have	O
low	O
power	O
consumption	O
,	O
yet	O
offer	O
better	O
performance	O
than	O
the	O
Intel	B-General_Concept
80286	I-General_Concept
.	O
</s>
<s>
A	O
successor	O
,	O
ARM3	O
,	O
was	O
produced	O
with	O
a	O
4	O
KB	O
cache	B-General_Concept
,	O
which	O
further	O
improved	O
performance	O
.	O
</s>
<s>
The	O
address	O
bus	O
was	O
extended	O
to	O
32bits	O
in	O
the	O
ARM6	O
,	O
but	O
program	O
code	O
still	O
had	O
to	O
lie	O
within	O
the	O
first	O
64	B-Device
MB	O
of	O
memory	O
in	O
26-bit	B-Architecture
compatibility	O
mode	O
,	O
due	O
to	O
the	O
reserved	O
bits	O
for	O
the	O
status	O
flags	O
.	O
</s>
<s>
In	O
the	O
late	O
1980s	O
,	O
Apple	O
Computer	O
and	O
VLSI	O
Technology	O
started	O
working	O
with	O
Acorn	O
on	O
newer	O
versions	O
of	O
the	O
ARM	O
core	B-Architecture
.	O
</s>
<s>
In	O
1990	O
,	O
Acorn	O
spun	O
off	O
the	O
design	O
team	O
into	O
a	O
new	O
company	O
named	O
Advanced	B-Architecture
RISC	I-Architecture
Machines	I-Architecture
Ltd.	O
,	O
which	O
became	O
ARM	O
Ltd	O
.	O
when	O
its	O
parent	O
company	O
,	O
Arm	O
Holdings	O
plc	O
,	O
floated	O
on	O
the	O
London	O
Stock	O
Exchange	O
and	O
Nasdaq	O
in	O
1998	O
.	O
</s>
<s>
Apple	O
used	O
the	O
ARM6-based	O
ARM610	O
as	O
the	O
basis	O
for	O
their	O
Apple	B-Device
Newton	I-Device
PDA	B-Application
.	O
</s>
<s>
In	O
1994	O
,	O
Acorn	O
used	O
the	O
ARM610	O
as	O
the	O
main	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	B-Device
)	O
in	O
their	O
RiscPC	B-Device
computers	O
.	O
</s>
<s>
DEC	O
licensed	O
the	O
ARMv4	O
architecture	O
and	O
produced	O
the	O
StrongARM	B-Device
.	O
</s>
<s>
At	O
233MHz	O
,	O
this	O
CPU	B-Device
drew	O
only	O
one	O
watt	O
(	O
newer	O
versions	O
draw	O
far	O
less	O
)	O
.	O
</s>
<s>
This	O
work	O
was	O
later	O
passed	O
to	O
Intel	O
as	O
part	O
of	O
a	O
lawsuit	O
settlement	O
,	O
and	O
Intel	O
took	O
the	O
opportunity	O
to	O
supplement	O
their	O
i960	B-General_Concept
line	O
with	O
the	O
StrongARM	B-Device
.	O
</s>
<s>
Intel	O
later	O
developed	O
its	O
own	O
high	O
performance	O
implementation	O
named	O
XScale	B-Application
,	O
which	O
it	O
has	O
since	O
sold	O
to	O
Marvell	O
.	O
</s>
<s>
Transistor	O
count	O
of	O
the	O
ARM	O
core	B-Architecture
remained	O
essentially	O
the	O
same	O
throughout	O
these	O
changes	O
;	O
ARM2	O
had	O
30,000	O
transistors	O
,	O
while	O
ARM6	O
grew	O
only	O
to	O
35,000	O
.	O
</s>
<s>
In	O
2005	O
,	O
about	O
98%	O
of	O
all	O
mobile	O
phones	O
sold	O
used	O
at	O
least	O
one	O
ARM	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
In	O
2010	O
,	O
producers	O
of	O
chips	O
based	O
on	O
ARM	B-Architecture
architectures	I-Architecture
reported	O
shipments	O
of	O
6.1billion	O
ARM-based	O
processors	O
,	O
representing	O
95%	O
of	O
smartphones	B-Application
,	O
35%	O
of	O
digital	O
televisions	O
and	O
set-top	O
boxes	O
,	O
and	O
10%	O
of	O
mobile	O
computers	O
.	O
</s>
<s>
In	O
2011	O
,	O
the	O
32-bit	O
ARM	B-Architecture
architecture	I-Architecture
was	O
the	O
most	O
widely	O
used	O
architecture	O
in	O
mobile	B-Application
devices	I-Application
and	O
the	O
most	O
popular	O
32-bit	O
one	O
in	O
embedded	B-Architecture
systems	I-Architecture
.	O
</s>
<s>
In	O
2013	O
,	O
10	O
billion	O
were	O
produced	O
and	O
"	O
ARM-based	O
chips	O
are	O
found	O
in	O
nearly	O
60	O
percent	O
of	O
the	O
world	O
's	O
mobile	B-Application
devices	I-Application
"	O
.	O
</s>
<s>
Arm	O
Ltd.	O
'	O
s	O
primary	O
business	O
is	O
selling	O
IP	B-Architecture
cores	I-Architecture
,	O
which	O
licensees	O
use	O
to	O
create	O
microcontrollers	B-Architecture
(	O
MCUs	O
)	O
,	O
CPUs	B-Device
,	O
and	O
systems-on-chips	B-Architecture
based	O
on	O
those	O
cores	B-Architecture
.	O
</s>
<s>
The	O
original	O
design	O
manufacturer	O
combines	O
the	O
ARM	O
core	B-Architecture
with	O
other	O
parts	O
to	O
produce	O
a	O
complete	O
device	O
,	O
typically	O
one	O
that	O
can	O
be	O
built	O
in	O
existing	O
semiconductor	B-Algorithm
fabrication	I-Algorithm
plants	I-Algorithm
(	O
fabs	B-Algorithm
)	O
at	O
low	O
cost	O
and	O
still	O
deliver	O
substantial	O
performance	O
.	O
</s>
<s>
Atmel	O
has	O
been	O
a	O
precursor	O
design	O
center	O
in	O
the	O
ARM7TDMI-based	O
embedded	B-Architecture
system	I-Architecture
.	O
</s>
<s>
The	O
ARM	B-Architecture
architectures	I-Architecture
used	O
in	O
smartphones	B-Application
,	O
PDAs	B-Application
and	O
other	O
mobile	B-Application
devices	I-Application
range	O
from	O
ARMv5	O
to	O
.	O
</s>
<s>
In	O
2009	O
,	O
some	O
manufacturers	O
introduced	O
netbooks	O
based	O
on	O
ARM	B-Architecture
architecture	I-Architecture
CPUs	B-Device
,	O
in	O
direct	O
competition	O
with	O
netbooks	O
based	O
on	O
Intel	B-Device
Atom	I-Device
.	O
</s>
<s>
Arm	O
Ltd	O
.	O
provides	O
to	O
all	O
licensees	O
an	O
integratable	O
hardware	O
description	O
of	O
the	O
ARM	O
core	B-Architecture
as	O
well	O
as	O
complete	O
software	O
development	O
toolset	O
(	O
compiler	B-Language
,	O
debugger	B-Application
,	O
software	B-Application
development	I-Application
kit	I-Application
)	O
,	O
and	O
the	O
right	O
to	O
sell	O
manufactured	O
silicon	O
containing	O
the	O
ARM	O
CPU	B-Device
.	O
</s>
<s>
SoC	B-Architecture
packages	O
integrating	O
ARM	O
's	O
core	B-Architecture
designs	O
include	O
Nvidia	B-Operating_System
Tegra	I-Operating_System
's	O
first	O
three	O
generations	O
,	O
CSR	O
plc	O
's	O
Quatro	O
family	O
,	O
ST-Ericsson	O
'	O
s	O
Nova	O
and	O
NovaThor	O
,	O
Silicon	O
Labs	O
's	O
Precision32	O
MCU	O
,	O
Texas	O
Instruments	O
's	O
OMAP	B-Device
products	O
,	O
Samsung	O
's	O
Hummingbird	O
and	O
Exynos	O
products	O
,	O
Apple	O
's	O
A4	O
,	O
A5	O
,	O
and	O
A5X	B-Device
,	O
and	O
NXP	O
's	O
i.MX	B-Architecture
.	O
</s>
<s>
Fabless	B-Algorithm
licensees	O
,	O
who	O
wish	O
to	O
integrate	O
an	O
ARM	O
core	B-Architecture
into	O
their	O
own	O
chip	O
design	O
,	O
are	O
usually	O
only	O
interested	O
in	O
acquiring	O
a	O
ready-to-manufacture	O
verified	O
semiconductor	B-Architecture
intellectual	I-Architecture
property	I-Architecture
core	I-Architecture
.	O
</s>
<s>
For	O
these	O
customers	O
,	O
Arm	O
Ltd	O
.	O
delivers	O
a	O
gate	O
netlist	O
description	O
of	O
the	O
chosen	O
ARM	O
core	B-Architecture
,	O
along	O
with	O
an	O
abstracted	O
simulation	O
model	O
and	O
test	O
programs	O
to	O
aid	O
design	O
integration	O
and	O
verification	O
.	O
</s>
<s>
More	O
ambitious	O
customers	O
,	O
including	O
integrated	O
device	O
manufacturers	O
(	O
IDM	O
)	O
and	O
foundry	B-Algorithm
operators	O
,	O
choose	O
to	O
acquire	O
the	O
processor	O
IP	O
in	O
synthesizable	O
RTL	O
(	O
Verilog	B-Language
)	O
form	O
.	O
</s>
<s>
This	O
allows	O
the	O
designer	O
to	O
achieve	O
exotic	O
design	O
goals	O
not	O
otherwise	O
possible	O
with	O
an	O
unmodified	O
netlist	O
(	O
high	O
clock	O
speed	O
,	O
very	O
low	O
power	O
consumption	O
,	O
instruction	B-General_Concept
set	I-General_Concept
extensions	O
,	O
etc	O
.	O
)	O
.	O
</s>
<s>
While	O
Arm	O
Ltd	O
.	O
does	O
not	O
grant	O
the	O
licensee	O
the	O
right	O
to	O
resell	O
the	O
ARM	B-Architecture
architecture	I-Architecture
itself	O
,	O
licensees	O
may	O
freely	O
sell	O
manufactured	O
products	O
such	O
as	O
chip	O
devices	O
,	O
evaluation	O
boards	O
and	O
complete	O
systems	O
.	O
</s>
<s>
Merchant	O
foundries	B-Algorithm
can	O
be	O
a	O
special	O
case	O
;	O
not	O
only	O
are	O
they	O
allowed	O
to	O
sell	O
finished	O
silicon	O
containing	O
ARM	O
cores	B-Architecture
,	O
they	O
generally	O
hold	O
the	O
right	O
to	O
re-manufacture	O
ARM	O
cores	B-Architecture
for	O
other	O
customers	O
.	O
</s>
<s>
Lower	O
performing	O
ARM	O
cores	B-Architecture
typically	O
have	O
lower	O
licence	O
costs	O
than	O
higher	O
performing	O
cores	B-Architecture
.	O
</s>
<s>
In	O
implementation	O
terms	O
,	O
a	O
synthesisable	O
core	B-Architecture
costs	O
more	O
than	O
a	O
hard	O
macro	O
(	O
blackbox	O
)	O
core	B-Architecture
.	O
</s>
<s>
Complicating	O
price	O
matters	O
,	O
a	O
merchant	O
foundry	B-Algorithm
that	O
holds	O
an	O
ARM	O
licence	O
,	O
such	O
as	O
Samsung	O
or	O
Fujitsu	O
,	O
can	O
offer	O
fab	B-Algorithm
customers	O
reduced	O
licensing	O
costs	O
.	O
</s>
<s>
In	O
exchange	O
for	O
acquiring	O
the	O
ARM	O
core	B-Architecture
through	O
the	O
foundry	B-Algorithm
's	O
in-house	O
design	O
services	O
,	O
the	O
customer	O
can	O
reduce	O
or	O
eliminate	O
payment	O
of	O
ARM	O
's	O
upfront	O
licence	O
fee	O
.	O
</s>
<s>
Compared	O
to	O
dedicated	O
semiconductor	B-Algorithm
foundries	I-Algorithm
(	O
such	O
as	O
TSMC	O
and	O
UMC	O
)	O
without	O
in-house	O
design	O
services	O
,	O
Fujitsu/Samsung	O
charge	O
two	O
-	O
to	O
three-times	O
more	O
per	O
manufactured	O
wafer	B-Architecture
.	O
</s>
<s>
For	O
low	O
to	O
mid	O
volume	O
applications	O
,	O
a	O
design	O
service	O
foundry	B-Algorithm
offers	O
lower	O
overall	O
pricing	O
(	O
through	O
subsidisation	O
of	O
the	O
licence	O
fee	O
)	O
.	O
</s>
<s>
For	O
high	O
volume	O
mass-produced	O
parts	O
,	O
the	O
long	O
term	O
cost	O
reduction	O
achievable	O
through	O
lower	O
wafer	B-Architecture
pricing	O
reduces	O
the	O
impact	O
of	O
ARM	O
's	O
NRE	O
(	O
non-recurring	O
engineering	O
)	O
costs	O
,	O
making	O
the	O
dedicated	O
foundry	B-Algorithm
a	O
better	O
choice	O
.	O
</s>
<s>
Companies	O
that	O
have	O
developed	O
chips	O
with	O
cores	B-Architecture
designed	O
by	O
Arm	O
include	O
com	O
's	O
Annapurna	O
Labs	O
subsidiary	O
,	O
Analog	O
Devices	O
,	O
Apple	O
,	O
AppliedMicro	O
(	O
now	O
:	O
MACOM	O
Technology	O
Solutions	O
)	O
,	O
Atmel	O
,	O
Broadcom	O
,	O
Cavium	O
,	O
Cypress	O
Semiconductor	O
,	O
Freescale	O
Semiconductor	O
(	O
now	O
NXP	O
Semiconductors	O
)	O
,	O
Huawei	O
,	O
Intel	O
,	O
Maxim	O
Integrated	O
,	O
Nvidia	O
,	O
NXP	O
,	O
Qualcomm	B-Architecture
,	O
Renesas	O
,	O
Samsung	O
Electronics	O
,	O
ST	O
Microelectronics	O
,	O
Texas	O
Instruments	O
,	O
and	O
Xilinx	O
.	O
</s>
<s>
These	O
semi-custom	O
core	B-Architecture
designs	O
also	O
have	O
brand	O
freedom	O
,	O
for	O
example	O
Kryo	B-Application
280	O
.	O
</s>
<s>
Companies	O
that	O
are	O
current	O
licensees	O
of	O
Built	O
on	O
ARM	O
Cortex	O
Technology	O
include	O
Qualcomm	B-Architecture
.	O
</s>
<s>
Companies	O
can	O
also	O
obtain	O
an	O
ARM	O
architectural	O
licence	O
for	O
designing	O
their	O
own	O
CPU	B-Device
cores	B-Architecture
using	O
the	O
ARM	B-Architecture
instruction	I-Architecture
sets	I-Architecture
.	O
</s>
<s>
These	O
cores	B-Architecture
must	O
comply	O
fully	O
with	O
the	O
ARM	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
Companies	O
that	O
have	O
designed	O
cores	B-Architecture
that	O
implement	O
an	O
ARM	B-Architecture
architecture	I-Architecture
include	O
Apple	O
,	O
AppliedMicro	O
(	O
now	O
:	O
Ampere	O
Computing	O
)	O
,	O
Broadcom	O
,	O
Cavium	O
(	O
now	O
:	O
Marvell	O
)	O
,	O
Digital	O
Equipment	O
Corporation	O
,	O
Intel	O
,	O
Nvidia	O
,	O
Qualcomm	B-Architecture
,	O
Samsung	O
Electronics	O
,	O
Fujitsu	O
,	O
and	O
NUVIA	O
Inc	O
.	O
(	O
acquired	O
by	O
Qualcomm	B-Architecture
in	O
2021	O
)	O
.	O
</s>
<s>
Per	O
product	O
licence	O
fees	O
are	O
required	O
once	O
a	O
customer	O
reaches	O
foundry	B-Algorithm
tapeout	O
or	O
prototyping	O
.	O
</s>
<s>
GPUs	O
:	O
Mali-G52	B-General_Concept
,	O
Mali-G31	B-General_Concept
.	O
</s>
<s>
Includes	O
Mali	B-General_Concept
Driver	B-Application
Development	I-Application
Kits	I-Application
(	O
DDK	O
)	O
.	O
</s>
<s>
Architecture	O
Corebit-width	O
Cores	B-Architecture
Profile	O
Refe-rences	O
Arm	O
Ltd	O
.	O
</s>
<s>
Third-party	O
ARM1	O
ARM2	O
,	O
ARM250	O
,	O
ARM3	O
Amber	B-Device
,	O
STORM	O
Open	O
Soft	O
Core	B-Architecture
ARM6	O
,	O
ARM7	O
ARM8	O
StrongARM	B-Device
,	O
FA526	O
,	O
ZAP	O
Open	O
Source	O
Processor	O
Core	B-Architecture
ARM7TDMI	O
,	O
ARM9TDMI	O
,	O
SecurCore	O
SC100	O
ARM7EJ	O
,	O
ARM9E	O
,	O
ARM10E	O
XScale	B-Application
,	O
FA626TE	O
,	O
Feroceon	O
,	O
PJ1/Mohawk	O
ARM11	O
ARM	O
Cortex-M0	O
,	O
,	O
,	O
SecurCore	O
SC000	O
ARM	O
Cortex-M3	O
,	O
SecurCore	O
SC300	O
Apple	B-Device
M7	I-Device
ARM	O
Cortex-M4	O
,	O
ARM	O
Cortex-M23	O
,	O
ARM	O
Cortex-M33	O
ARM	O
Cortex-R4	O
,	O
,	O
,	O
ARM	O
Cortex-R52	O
ARM	O
Cortex-R82	O
ARM	B-Application
Cortex-A5	I-Application
,	O
,	O
,	O
,	O
,	O
,	O
Qualcomm	B-Architecture
Scorpion/Krait	O
,	O
PJ4/Sheeva	O
,	O
Apple	O
Swift	O
(	O
A6	O
,	O
A6X	O
)	O
,	O
X-Gene	O
,	O
Nvidia	O
Denver	O
1/2	O
,	O
Cavium	O
ThunderX	O
,	O
AMD	B-Architecture
K12	I-Architecture
,	O
Apple	O
Cyclone	O
(	O
A7	O
)	O
/Typhoon	O
(	O
A8	O
,	O
A8X	O
)	O
/Twister	O
(	O
A9	O
,	O
A9X	B-Device
)	O
/Hurricane	O
+Zephyr	O
(	O
A10	O
,	O
A10X	B-Device
)	O
,	O
Qualcomm	B-Architecture
Kryo	B-Application
,	O
Samsung	O
M1/M2	O
(	O
"	O
Mongoose	O
"	O
)	O
/M3	O
(	O
"	O
Meerkat	O
"	O
)	O
Cavium	O
ThunderX2	O
,	O
,	O
,	O
,	O
Nvidia	O
Carmel	O
,	O
Samsung	O
M4	O
(	O
"	O
Cheetah	O
"	O
)	O
,	O
Fujitsu	B-Device
A64FX	I-Device
(	O
ARMv8	O
SVE	O
512-bit	O
)	O
,	O
with	O
simultaneous	B-Operating_System
multithreading	I-Operating_System
(	O
SMT	O
)	O
,	O
(	O
also	O
having	O
e.g.	O
</s>
<s>
Arm	O
provides	O
a	O
list	O
of	O
vendors	O
who	O
implement	O
ARM	O
cores	B-Architecture
in	O
their	O
design	O
(	O
application	B-Application
specific	O
standard	O
products	O
(	O
ASSP	O
)	O
,	O
microprocessor	O
and	O
microcontrollers	B-Architecture
)	O
.	O
</s>
<s>
ARM	O
cores	B-Architecture
are	O
used	O
in	O
a	O
number	O
of	O
products	O
,	O
particularly	O
PDAs	B-Application
and	O
smartphones	B-Application
.	O
</s>
<s>
Some	O
computing	O
examples	O
are	O
Microsoft	O
's	O
first	B-Device
generation	I-Device
Surface	I-Device
,	O
Surface	B-Device
2	I-Device
and	O
Pocket	B-Device
PC	I-Device
devices	O
(	O
following	O
2002	B-Operating_System
)	O
,	O
Apple	O
's	O
iPads	B-Device
,	O
and	O
Asus	O
's	O
Eee	B-Application
Pad	I-Application
Transformer	I-Application
tablet	B-Device
computers	I-Device
,	O
and	O
several	O
Chromebook	B-Operating_System
laptops	B-Device
.	O
</s>
<s>
Others	O
include	O
Apple	O
's	O
iPhone	B-Device
smartphones	B-Application
and	O
iPod	B-Device
portable	O
media	O
players	O
,	O
Canon	B-Algorithm
PowerShot	I-Algorithm
digital	B-Device
cameras	I-Device
,	O
Nintendo	B-Application
Switch	I-Application
hybrid	O
,	O
the	B-Operating_System
Wii	I-Operating_System
security	O
processor	O
and	O
3DS	B-Operating_System
handheld	B-Application
game	I-Application
consoles	I-Application
,	O
and	O
TomTom	O
turn-by-turn	O
navigation	O
systems	O
.	O
</s>
<s>
In	O
2005	O
,	O
Arm	O
took	O
part	O
in	O
the	O
development	O
of	O
Manchester	O
University	O
's	O
computer	O
SpiNNaker	B-General_Concept
,	O
which	O
used	O
ARM	O
cores	B-Architecture
to	O
simulate	O
the	O
human	O
brain	O
.	O
</s>
<s>
ARM	B-Architecture
chips	I-Architecture
are	O
also	O
used	O
in	O
Raspberry	B-Operating_System
Pi	I-Operating_System
,	O
BeagleBoard	B-Application
,	O
BeagleBone	O
,	O
PandaBoard	B-Architecture
,	O
and	O
other	O
single-board	B-Device
computers	I-Device
,	O
because	O
they	O
are	O
very	O
small	O
,	O
inexpensive	O
,	O
and	O
consume	O
very	O
little	O
power	O
.	O
</s>
<s>
The	O
32-bit	O
ARM	B-Architecture
architecture	I-Architecture
(	O
ARM32	O
)	O
,	O
such	O
as	O
Armv7-A	O
(	O
implementing	O
AArch32	O
;	O
see	O
section	O
on	O
Armv8-A	O
for	O
more	O
on	O
it	O
)	O
,	O
was	O
the	O
most	O
widely	O
used	O
architecture	O
in	O
mobile	B-Application
devices	I-Application
.	O
</s>
<s>
Since	O
1995	O
,	O
various	O
versions	O
of	O
the	O
ARM	B-Architecture
Architecture	I-Architecture
Reference	O
Manual	O
(	O
see	O
)	O
have	O
been	O
the	O
primary	O
source	O
of	O
documentation	O
on	O
the	O
ARM	B-Architecture
processor	I-Architecture
architecture	O
and	O
instruction	B-General_Concept
set	I-General_Concept
,	O
distinguishing	O
interfaces	O
that	O
all	O
ARM	B-Architecture
processors	I-Architecture
are	O
required	O
to	O
support	O
(	O
such	O
as	O
instruction	O
semantics	O
)	O
from	O
implementation	O
details	O
that	O
may	O
vary	O
.	O
</s>
<s>
Although	O
the	O
architecture	O
profiles	O
were	O
first	O
defined	O
for	O
ARMv7	O
,	O
ARM	O
subsequently	O
defined	O
the	O
ARMv6-M	O
architecture	O
(	O
used	O
by	O
the	O
Cortex	O
M0/M0	O
+	O
/M1	O
)	O
as	O
a	O
subset	O
of	O
the	O
ARMv7-M	O
profile	O
with	O
fewer	O
instructions	B-General_Concept
.	O
</s>
<s>
Except	O
in	O
the	O
M-profile	O
,	O
the	O
32-bit	O
ARM	B-Architecture
architecture	I-Architecture
specifies	O
several	O
CPU	B-Device
modes	O
,	O
depending	O
on	O
the	O
implemented	O
architecture	O
features	O
.	O
</s>
<s>
At	O
any	O
moment	O
in	O
time	O
,	O
the	O
CPU	B-Device
can	O
be	O
in	O
only	O
one	O
mode	O
,	O
but	O
it	O
can	O
switch	O
modes	O
due	O
to	O
external	O
events	O
(	O
interrupts	B-Application
)	O
or	O
programmatically	O
.	O
</s>
<s>
User	B-Operating_System
mode	I-Operating_System
:	O
The	O
only	O
non-privileged	O
mode	O
.	O
</s>
<s>
FIQ	B-General_Concept
mode	O
:	O
A	O
privileged	O
mode	O
that	O
is	O
entered	O
whenever	O
the	O
processor	O
accepts	O
a	O
fast	B-General_Concept
interrupt	I-General_Concept
request	I-General_Concept
.	O
</s>
<s>
IRQ	B-General_Concept
mode	O
:	O
A	O
privileged	O
mode	O
that	O
is	O
entered	O
whenever	O
the	O
processor	O
accepts	O
an	O
interrupt	B-Application
.	O
</s>
<s>
Supervisor	O
(	O
svc	O
)	O
mode	O
:	O
A	O
privileged	O
mode	O
entered	O
whenever	O
the	O
CPU	B-Device
is	O
reset	O
or	O
when	O
an	O
SVC	O
instruction	O
is	O
executed	O
.	O
</s>
<s>
It	O
can	O
only	O
be	O
entered	O
by	O
executing	O
an	O
instruction	O
that	O
explicitly	O
writes	O
to	O
the	O
mode	O
bits	O
of	O
the	O
Current	O
Program	O
Status	B-General_Concept
Register	I-General_Concept
(	O
CPSR	O
)	O
from	O
another	O
privileged	O
mode	O
(	O
not	O
from	O
user	B-Operating_System
mode	I-Operating_System
)	O
.	O
</s>
<s>
Monitor	O
mode	O
(	O
ARMv6	O
and	O
ARMv7	O
Security	O
Extensions	O
,	O
ARMv8	O
EL3	O
)	O
:	O
A	O
monitor	O
mode	O
is	O
introduced	O
to	O
support	O
TrustZone	O
extension	O
in	O
ARM	O
cores	B-Architecture
.	O
</s>
<s>
Hyp	O
mode	O
(	O
ARMv7	O
Virtualization	O
Extensions	O
,	O
ARMv8	O
EL2	O
)	O
:	O
A	O
hypervisor	B-Operating_System
mode	O
that	O
supports	O
Popek	B-Architecture
and	I-Architecture
Goldberg	I-Architecture
virtualization	I-Architecture
requirements	I-Architecture
for	O
the	O
non-secure	O
operation	O
of	O
the	O
CPU	B-Device
.	O
</s>
<s>
Whether	O
the	O
Main	O
Stack	O
Pointer	O
(	O
MSP	O
)	O
or	O
Process	O
Stack	O
Pointer	O
(	O
PSP	B-Device
)	O
is	O
used	O
can	O
also	O
be	O
specified	O
in	O
CONTROL	O
register	B-General_Concept
with	O
privileged	O
access	O
.	O
</s>
<s>
This	O
mode	O
is	O
designed	O
for	O
user	O
tasks	O
in	O
RTOS	B-Operating_System
environment	O
but	O
it	O
's	O
typically	O
used	O
in	O
bare-metal	O
for	O
super-loop	O
.	O
</s>
<s>
The	O
original	O
(	O
and	O
subsequent	O
)	O
ARM	O
implementation	O
was	O
hardwired	O
without	O
microcode	B-Device
,	O
like	O
the	O
much	O
simpler	O
8-bit	O
6502	B-General_Concept
processor	I-General_Concept
used	O
in	O
prior	O
Acorn	O
microcomputers	O
.	O
</s>
<s>
The	O
32-bit	O
ARM	B-Architecture
architecture	I-Architecture
(	O
and	O
the	O
64-bit	B-Device
architecture	I-Device
for	O
the	O
most	O
part	O
)	O
includes	O
the	O
following	O
RISC	B-Architecture
features	O
:	O
</s>
<s>
Load	B-Architecture
–	I-Architecture
store	I-Architecture
architecture	I-Architecture
.	O
</s>
<s>
No	O
support	O
for	O
unaligned	B-Application
memory	I-Application
accesses	I-Application
in	O
the	O
original	O
version	O
of	O
the	O
architecture	O
.	O
</s>
<s>
ARMv6	O
and	O
later	O
,	O
except	O
some	O
microcontroller	B-Architecture
versions	O
,	O
support	O
unaligned	O
accesses	O
for	O
half-word	O
and	O
single-word	O
load/store	B-General_Concept
instructions	I-General_Concept
with	O
some	O
limitations	O
,	O
such	O
as	O
no	O
guaranteed	O
atomicity	B-General_Concept
.	O
</s>
<s>
Uniform	O
16	O
×	O
32-bit	O
register	B-General_Concept
file	I-General_Concept
(	O
including	O
the	O
program	B-General_Concept
counter	I-General_Concept
,	O
stack	O
pointer	O
and	O
the	O
link	B-General_Concept
register	I-General_Concept
)	O
.	O
</s>
<s>
Fixed	O
instruction	B-General_Concept
width	I-General_Concept
of	O
32bits	O
to	O
ease	O
decoding	O
and	O
pipelining	B-General_Concept
,	O
at	O
the	O
cost	O
of	O
decreased	O
code	O
density	O
.	O
</s>
<s>
Later	O
,	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
added	O
16-bit	B-Device
instructions	B-General_Concept
and	O
increased	O
code	O
density	O
.	O
</s>
<s>
To	O
compensate	O
for	O
the	O
simpler	O
design	O
,	O
compared	O
with	O
processors	O
like	O
the	O
Intel	B-General_Concept
80286	I-General_Concept
and	O
Motorola	B-Device
68020	I-Device
,	O
some	O
additional	O
design	O
features	O
were	O
used	O
:	O
</s>
<s>
Conditional	B-Language
execution	O
of	O
most	O
instructions	B-General_Concept
reduces	O
branch	O
overhead	O
and	O
compensates	O
for	O
the	O
lack	O
of	O
a	O
branch	B-General_Concept
predictor	I-General_Concept
in	O
early	O
chips	O
.	O
</s>
<s>
Arithmetic	O
instructions	B-General_Concept
alter	O
condition	O
codes	O
only	O
when	O
desired	O
.	O
</s>
<s>
32-bit	O
barrel	O
shifter	O
can	O
be	O
used	O
without	O
performance	O
penalty	O
with	O
most	O
arithmetic	O
instructions	B-General_Concept
and	O
address	O
calculations	O
.	O
</s>
<s>
Has	O
powerful	O
indexed	B-Language
addressing	I-Language
modes	O
.	O
</s>
<s>
A	O
link	B-General_Concept
register	I-General_Concept
supports	O
fast	O
leaf	O
function	O
calls	O
.	O
</s>
<s>
A	O
simple	O
,	O
but	O
fast	O
,	O
2-priority-level	O
interrupt	B-Application
subsystem	O
has	O
switched	O
register	B-General_Concept
banks	I-General_Concept
.	O
</s>
<s>
ARM	O
supports	O
32-bit	O
×	O
32-bit	O
multiplies	O
with	O
either	O
a	O
32-bit	O
result	O
or	O
64-bit	B-Device
result	O
,	O
though	O
Cortex-M0	O
/	O
M0+	O
/	O
M1	B-Device
cores	B-Architecture
do	O
n't	O
support	O
64-bit	B-Device
results	O
.	O
</s>
<s>
Some	O
ARM	O
cores	B-Architecture
also	O
support	O
16-bit	B-Device
×	O
16-bit	B-Device
and	O
32-bit	O
×	O
16-bit	B-Device
multiplies	O
.	O
</s>
<s>
The	O
divide	O
instructions	B-General_Concept
are	O
only	O
included	O
in	O
the	O
following	O
ARM	B-Architecture
architectures	I-Architecture
:	O
</s>
<s>
Armv7-M	O
and	O
Armv7E-M	O
architectures	O
always	O
include	O
divide	O
instructions	B-General_Concept
.	O
</s>
<s>
Armv7-R	O
architecture	O
always	O
includes	O
divide	O
instructions	B-General_Concept
in	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
,	O
but	O
optionally	O
in	O
its	O
32-bit	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
Armv7-A	O
architecture	O
optionally	O
includes	O
the	O
divide	O
instructions	B-General_Concept
.	O
</s>
<s>
The	O
instructions	B-General_Concept
might	O
not	O
be	O
implemented	O
,	O
or	O
implemented	O
only	O
in	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
,	O
or	O
implemented	O
in	O
both	O
the	O
Thumb	O
and	O
ARM	B-Architecture
instruction	I-Architecture
sets	I-Architecture
,	O
or	O
implemented	O
if	O
the	O
Virtualization	O
Extensions	O
are	O
included	O
.	O
</s>
<s>
Registers	B-General_Concept
R0	O
through	O
R7	O
are	O
the	O
same	O
across	O
all	O
CPU	B-Device
modes	O
;	O
they	O
are	O
never	O
banked	O
.	O
</s>
<s>
Registers	B-General_Concept
R8	O
through	O
R12	O
are	O
the	O
same	O
across	O
all	O
CPU	B-Device
modes	O
except	O
FIQ	B-General_Concept
mode	O
.	O
</s>
<s>
FIQ	B-General_Concept
mode	O
has	O
its	O
own	O
distinct	O
R8	O
through	O
R12	O
registers	B-General_Concept
.	O
</s>
<s>
R13	O
and	O
R14	O
are	O
banked	O
across	O
all	O
privileged	O
CPU	B-Device
modes	O
except	O
system	O
mode	O
.	O
</s>
<s>
These	O
registers	B-General_Concept
generally	O
contain	O
the	O
stack	O
pointer	O
and	O
the	O
return	O
address	O
from	O
function	O
calls	O
,	O
respectively	O
.	O
</s>
<s>
R14	O
is	O
also	O
referred	O
to	O
as	O
LR	O
,	O
the	O
link	B-General_Concept
register	I-General_Concept
.	O
</s>
<s>
R15	O
is	O
also	O
referred	O
to	O
as	O
PC	B-General_Concept
,	O
the	O
program	B-General_Concept
counter	I-General_Concept
.	O
</s>
<s>
The	O
Current	O
Program	O
Status	B-General_Concept
Register	I-General_Concept
(	O
CPSR	O
)	O
has	O
the	O
following	O
32bits	O
.	O
</s>
<s>
F	O
(	O
bit	O
6	O
)	O
is	O
the	O
FIQ	B-General_Concept
disable	O
bit	O
.	O
</s>
<s>
I	O
(	O
bit	O
7	O
)	O
is	O
the	O
IRQ	B-General_Concept
disable	O
bit	O
.	O
</s>
<s>
IT	O
(	O
bits	O
10	O
–	O
15	O
and	O
25	O
–	O
26	O
)	O
is	O
the	O
if-then	B-Language
state	O
bits	O
.	O
</s>
<s>
J	O
(	O
bit	O
24	O
)	O
is	O
the	O
Java	B-Language
state	O
bit	O
.	O
</s>
<s>
C	B-Language
(	O
bit	O
29	O
)	O
is	O
the	O
carry/borrow/extend	O
bit	O
.	O
</s>
<s>
Almost	O
every	O
ARM	O
instruction	O
has	O
a	O
conditional	B-Language
execution	O
feature	O
called	O
predication	B-General_Concept
,	O
which	O
is	O
implemented	O
with	O
a	O
4-bit	O
condition	B-General_Concept
code	I-General_Concept
selector	O
(	O
the	O
predicate	O
)	O
.	O
</s>
<s>
Most	O
other	O
CPU	B-Device
architectures	O
only	O
have	O
condition	O
codes	O
on	O
branch	O
instructions	B-General_Concept
.	O
</s>
<s>
Though	O
the	O
predicate	O
takes	O
up	O
four	O
of	O
the	O
32bits	O
in	O
an	O
instruction	B-Language
code	I-Language
,	O
and	O
thus	O
cuts	O
down	O
significantly	O
on	O
the	O
encoding	O
bits	O
available	O
for	O
displacements	O
in	O
memory	O
access	O
instructions	B-General_Concept
,	O
it	O
avoids	O
branch	O
instructions	B-General_Concept
when	O
generating	O
code	O
for	O
small	O
if	O
statements	O
.	O
</s>
<s>
Apart	O
from	O
eliminating	O
the	O
branch	O
instructions	B-General_Concept
themselves	O
,	O
this	O
preserves	O
the	O
fetch/decode/execute	O
pipeline	B-General_Concept
at	O
the	O
cost	O
of	O
only	O
one	O
cycle	O
per	O
skipped	O
instruction	O
.	O
</s>
<s>
An	O
algorithm	O
that	O
provides	O
a	O
good	O
example	O
of	O
conditional	B-Language
execution	O
is	O
the	O
subtraction-based	O
Euclidean	O
algorithm	O
for	O
computing	O
the	O
greatest	O
common	O
divisor	O
.	O
</s>
<s>
In	O
the	O
C	B-Language
programming	I-Language
language	I-Language
,	O
the	O
algorithm	O
can	O
be	O
written	O
as	O
:	O
</s>
<s>
The	O
same	O
algorithm	O
can	O
be	O
rewritten	O
in	O
a	O
way	O
closer	O
to	O
target	O
ARM	O
instructions	B-General_Concept
as	O
:	O
</s>
<s>
and	O
coded	O
in	O
assembly	B-Language
language	I-Language
as	O
:	O
</s>
<s>
If	O
r0	O
and	O
r1	O
are	O
equal	O
then	O
neither	O
of	O
the	O
SUB	O
instructions	B-General_Concept
will	O
be	O
executed	O
,	O
eliminating	O
the	O
need	O
for	O
a	O
conditional	B-Language
branch	O
to	O
implement	O
the	O
while	O
check	O
at	O
the	O
top	O
of	O
the	O
loop	O
,	O
for	O
example	O
had	O
SUBLE	O
(	O
less	O
than	O
or	O
equal	O
)	O
been	O
used	O
.	O
</s>
<s>
One	O
of	O
the	O
ways	O
that	O
Thumb	O
code	O
provides	O
a	O
more	O
dense	O
encoding	O
is	O
to	O
remove	O
the	O
four-bit	O
selector	O
from	O
non-branch	O
instructions	B-General_Concept
.	O
</s>
<s>
Another	O
feature	O
of	O
the	O
instruction	B-General_Concept
set	I-General_Concept
is	O
the	O
ability	O
to	O
fold	O
shifts	O
and	O
rotates	O
into	O
the	O
data	O
processing	O
(	O
arithmetic	O
,	O
logical	O
,	O
and	O
register-register	O
move	O
)	O
instructions	B-General_Concept
,	O
so	O
that	O
,	O
for	O
example	O
,	O
the	O
statement	O
in	O
C	B-Language
language	I-Language
:	O
</s>
<s>
This	O
results	O
in	O
the	O
typical	O
ARM	O
program	O
being	O
denser	O
than	O
expected	O
with	O
fewer	O
memory	O
accesses	O
;	O
thus	O
the	O
pipeline	B-General_Concept
is	O
used	O
more	O
efficiently	O
.	O
</s>
<s>
The	O
ARM	B-Architecture
processor	I-Architecture
also	O
has	O
features	O
rarely	O
seen	O
in	O
other	O
RISC	B-Architecture
architectures	I-Architecture
,	O
such	O
as	O
PC-relative	O
addressing	O
(	O
indeed	O
,	O
on	O
the	O
32-bit	O
ARM	O
the	O
PC	B-General_Concept
is	O
one	O
of	O
its	O
16registers	O
)	O
and	O
pre	O
-	O
and	O
post-increment	O
addressing	B-Language
modes	I-Language
.	O
</s>
<s>
The	O
ARM	B-Architecture
instruction	I-Architecture
set	I-Architecture
has	O
increased	O
over	O
time	O
.	O
</s>
<s>
Some	O
early	O
ARM	B-Architecture
processors	I-Architecture
(	O
before	O
ARM7TDMI	O
)	O
,	O
for	O
example	O
,	O
have	O
no	O
instruction	O
to	O
store	O
a	O
two-byte	O
quantity	O
.	O
</s>
<s>
The	O
ARM7	O
and	O
earlier	O
implementations	O
have	O
a	O
three-stage	O
pipeline	B-General_Concept
;	O
the	O
stages	O
being	O
fetch	O
,	O
decode	O
,	O
and	O
execute	O
.	O
</s>
<s>
Higher-performance	O
designs	O
,	O
such	O
as	O
the	O
ARM9	O
,	O
have	O
deeper	O
pipelines	O
:	O
Cortex-A8	B-Application
has	O
thirteen	O
stages	O
.	O
</s>
<s>
Additional	O
implementation	O
changes	O
for	O
higher	O
performance	O
include	O
a	O
faster	O
adder	O
and	O
more	O
extensive	O
branch	B-General_Concept
prediction	I-General_Concept
logic	O
.	O
</s>
<s>
The	O
difference	O
between	O
the	O
ARM7DI	O
and	O
ARM7DMI	O
cores	B-Architecture
,	O
for	O
example	O
,	O
was	O
an	O
improved	O
multiplier	O
;	O
hence	O
the	O
added	O
"	O
M	O
"	O
.	O
</s>
<s>
The	O
ARM	B-Architecture
architecture	I-Architecture
(	O
pre-Armv8	O
)	O
provides	O
a	O
non-intrusive	O
way	O
of	O
extending	O
the	O
instruction	B-General_Concept
set	I-General_Concept
using	O
"	O
coprocessors	O
"	O
that	O
can	O
be	O
addressed	O
using	O
MCR	O
,	O
MRC	O
,	O
MRRC	O
,	O
MCRR	O
,	O
and	O
similar	O
instructions	B-General_Concept
.	O
</s>
<s>
The	O
coprocessor	O
space	O
is	O
divided	O
logically	O
into	O
16coprocessors	O
with	O
numbers	O
from	O
0	O
to	O
15	O
,	O
coprocessor15	O
(	O
cp15	O
)	O
being	O
reserved	O
for	O
some	O
typical	O
control	O
functions	O
like	O
managing	O
the	O
caches	O
and	O
MMU	B-General_Concept
operation	O
on	O
processors	O
that	O
have	O
one	O
.	O
</s>
<s>
In	O
ARM-based	O
machines	O
,	O
peripheral	O
devices	O
are	O
usually	O
attached	O
to	O
the	O
processor	O
by	O
mapping	O
their	O
physical	O
registers	B-General_Concept
into	O
ARM	O
memory	O
space	O
,	O
into	O
the	O
coprocessor	O
space	O
,	O
or	O
by	O
connecting	O
to	O
another	O
device	O
(	O
a	O
bus	O
)	O
that	O
in	O
turn	O
attaches	O
to	O
the	O
processor	O
.	O
</s>
<s>
Coprocessor	O
accesses	O
have	O
lower	O
latency	O
,	O
so	O
some	O
peripherals	O
—	O
for	O
example	O
,	O
an	O
XScale	B-Application
interrupt	B-Application
controller	O
—	O
are	O
accessible	O
in	O
both	O
ways	O
:	O
through	O
memory	O
and	O
through	O
coprocessors	O
.	O
</s>
<s>
For	O
example	O
,	O
an	O
image	O
processing	O
engine	O
might	O
be	O
a	O
small	O
ARM7TDMI	O
core	B-Architecture
combined	O
with	O
a	O
coprocessor	O
that	O
has	O
specialised	O
operations	O
to	O
support	O
a	O
specific	O
set	O
of	O
HDTV	O
transcoding	O
primitives	O
.	O
</s>
<s>
All	O
modern	O
ARM	B-Architecture
processors	I-Architecture
include	O
hardware	O
debugging	O
facilities	O
,	O
allowing	O
software	O
debuggers	B-Application
to	O
perform	O
operations	O
such	O
as	O
halting	O
,	O
stepping	O
,	O
and	O
breakpointing	O
of	O
code	O
starting	O
from	O
reset	O
.	O
</s>
<s>
These	O
facilities	O
are	O
built	O
using	O
JTAG	O
support	O
,	O
though	O
some	O
newer	O
cores	B-Architecture
optionally	O
support	O
ARM	O
's	O
own	O
two-wire	O
"	O
SWD	O
"	O
protocol	O
.	O
</s>
<s>
In	O
ARM7TDMI	O
cores	B-Architecture
,	O
the	O
"	O
D	O
"	O
represented	O
JTAG	O
debug	O
support	O
,	O
and	O
the	O
"	O
I	O
"	O
represented	O
presence	O
of	O
an	O
"	O
EmbeddedICE	O
"	O
debug	O
module	O
.	O
</s>
<s>
For	O
ARM7	O
and	O
ARM9	O
core	B-Architecture
generations	O
,	O
EmbeddedICE	O
over	O
JTAG	O
was	O
a	O
de	O
facto	O
debug	O
standard	O
,	O
though	O
not	O
architecturally	O
guaranteed	O
.	O
</s>
<s>
CMSIS-DAP	O
is	O
a	O
standard	O
interface	O
that	O
describes	O
how	O
various	O
debugging	O
software	O
on	O
a	O
host	O
PC	B-General_Concept
can	O
communicate	O
over	O
USB	O
to	O
firmware	O
running	O
on	O
a	O
hardware	O
debugger	B-Application
,	O
which	O
in	O
turn	O
talks	O
over	O
SWD	O
or	O
JTAG	O
to	O
a	O
CoreSight-enabled	O
ARM	O
Cortex	O
CPU	B-Device
.	O
</s>
<s>
To	O
improve	O
the	O
ARM	B-Architecture
architecture	I-Architecture
for	O
digital	B-General_Concept
signal	I-General_Concept
processing	I-General_Concept
and	O
multimedia	O
applications	O
,	O
DSP	O
instructions	B-General_Concept
were	O
added	O
to	O
the	O
set	O
.	O
</s>
<s>
The	O
new	O
instructions	B-General_Concept
are	O
common	O
in	O
digital	B-Architecture
signal	I-Architecture
processor	I-Architecture
(	O
DSP	O
)	O
architectures	O
.	O
</s>
<s>
They	O
include	O
variations	O
on	O
signed	O
multiply	B-Algorithm
–	I-Algorithm
accumulate	I-Algorithm
,	O
saturated	B-Algorithm
add	I-Algorithm
and	I-Algorithm
subtract	I-Algorithm
,	O
and	O
count	O
leading	O
zeros	O
.	O
</s>
<s>
Introduced	O
in	O
the	O
ARMv6	O
architecture	O
,	O
this	O
was	O
a	O
precursor	O
to	O
Advanced	O
SIMD	B-Device
,	O
also	O
named	O
Neon	O
.	O
</s>
<s>
Jazelle	B-Language
DBX	O
(	O
Direct	O
Bytecode	O
eXecution	O
)	O
is	O
a	O
technique	O
that	O
allows	O
Java	B-Language
bytecode	I-Language
to	O
be	O
executed	O
directly	O
in	O
the	O
ARM	B-Architecture
architecture	I-Architecture
as	O
a	O
third	O
execution	O
state	O
(	O
and	O
instruction	B-General_Concept
set	I-General_Concept
)	O
alongside	O
the	O
existing	O
ARM	O
and	O
Thumb-mode	O
.	O
</s>
<s>
Support	O
for	O
this	O
state	O
is	O
signified	O
by	O
the	O
"	O
J	O
"	O
in	O
the	O
ARMv5TEJ	O
architecture	O
,	O
and	O
in	O
ARM9EJ-S	O
and	O
ARM7EJ-S	O
core	B-Architecture
names	O
.	O
</s>
<s>
Support	O
for	O
this	O
state	O
is	O
required	O
starting	O
in	O
ARMv6	O
(	O
except	O
for	O
the	O
ARMv7-M	O
profile	O
)	O
,	O
though	O
newer	O
cores	B-Architecture
only	O
include	O
a	O
trivial	O
implementation	O
that	O
provides	O
no	O
hardware	O
acceleration	O
.	O
</s>
<s>
To	O
improve	O
compiled	B-Language
code	O
density	O
,	O
processors	O
since	O
the	O
ARM7TDMI	O
(	O
released	O
in	O
1994	O
)	O
have	O
featured	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
,	O
which	O
have	O
their	O
own	O
state	O
.	O
</s>
<s>
When	O
in	O
this	O
state	O
,	O
the	O
processor	O
executes	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
,	O
a	O
compact	O
16-bit	B-Device
encoding	O
for	O
a	O
subset	O
of	O
the	O
ARM	B-Architecture
instruction	I-Architecture
set	I-Architecture
.	O
</s>
<s>
Most	O
of	O
the	O
Thumb	O
instructions	B-General_Concept
are	O
directly	O
mapped	O
to	O
normal	O
ARM	O
instructions	B-General_Concept
.	O
</s>
<s>
The	O
space	O
saving	O
comes	O
from	O
making	O
some	O
of	O
the	O
instruction	O
operands	O
implicit	O
and	O
limiting	O
the	O
number	O
of	O
possibilities	O
compared	O
to	O
the	O
ARM	O
instructions	B-General_Concept
executed	O
in	O
the	O
ARM	B-Architecture
instruction	I-Architecture
set	I-Architecture
state	O
.	O
</s>
<s>
In	O
Thumb	O
,	O
the	O
16-bit	B-Device
opcodes	B-Language
have	O
less	O
functionality	O
.	O
</s>
<s>
For	O
example	O
,	O
only	O
branches	O
can	O
be	O
conditional	B-Language
,	O
and	O
many	O
opcodes	B-Language
are	O
restricted	O
to	O
accessing	O
only	O
half	O
of	O
all	O
of	O
the	O
CPU	B-Device
's	O
general-purpose	O
registers	B-General_Concept
.	O
</s>
<s>
The	O
shorter	O
opcodes	B-Language
give	O
improved	O
code	O
density	O
overall	O
,	O
even	O
though	O
some	O
operations	O
require	O
extra	O
instructions	B-General_Concept
.	O
</s>
<s>
In	O
situations	O
where	O
the	O
memory	O
port	O
or	O
bus	O
width	O
is	O
constrained	O
to	O
less	O
than	O
32bits	O
,	O
the	O
shorter	O
Thumb	O
opcodes	B-Language
allow	O
increased	O
performance	O
compared	O
with	O
32-bit	O
ARM	O
code	O
,	O
as	O
less	O
program	O
code	O
may	O
need	O
to	O
be	O
loaded	O
into	O
the	O
processor	O
over	O
the	O
constrained	O
memory	O
bandwidth	O
.	O
</s>
<s>
Unlike	O
processor	O
architectures	O
with	O
variable	O
length	O
(	O
16	O
-	O
or	O
32-bit	O
)	O
instructions	B-General_Concept
,	O
such	O
as	O
the	O
Cray-1	O
and	O
Hitachi	O
SuperH	O
,	O
the	O
ARM	O
and	O
Thumb	O
instruction	B-General_Concept
sets	I-General_Concept
exist	O
independently	O
of	O
each	O
other	O
.	O
</s>
<s>
Embedded	B-Architecture
hardware	I-Architecture
,	O
such	O
as	O
the	O
Game	B-Device
Boy	I-Device
Advance	I-Device
,	O
typically	O
have	O
a	O
small	O
amount	O
of	O
RAM	O
accessible	O
with	O
a	O
full	O
32-bit	O
datapath	B-General_Concept
;	O
the	O
majority	O
is	O
accessed	O
via	O
a	O
16-bit	B-Device
or	O
narrower	O
secondary	O
datapath	B-General_Concept
.	O
</s>
<s>
In	O
this	O
situation	O
,	O
it	O
usually	O
makes	O
sense	O
to	O
compile	B-Language
Thumb	O
code	O
and	O
hand-optimise	O
a	O
few	O
of	O
the	O
most	O
CPU-intensive	O
sections	O
using	O
full	O
32-bit	O
ARM	O
instructions	B-General_Concept
,	O
placing	O
these	O
wider	O
instructions	B-General_Concept
into	O
the	O
32-bit	O
bus	O
accessible	O
memory	O
.	O
</s>
<s>
All	O
ARM9	O
and	O
later	O
families	O
,	O
including	O
XScale	B-Application
,	O
have	O
included	O
a	O
Thumb	O
instruction	O
decoder	O
.	O
</s>
<s>
It	O
includes	O
instructions	B-General_Concept
adopted	O
from	O
the	O
Hitachi	O
SuperH	O
(	O
1992	O
)	O
,	O
which	O
was	O
licensed	O
by	O
ARM	O
.	O
</s>
<s>
ARM	O
's	O
smallest	O
processor	O
families	O
(	O
Cortex	O
M0	O
and	O
M1	B-Device
)	O
implement	O
only	O
the	O
16-bit	B-Device
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
for	O
maximum	O
performance	O
in	O
lowest	O
cost	O
applications	O
.	O
</s>
<s>
Thumb-2	O
technology	O
was	O
introduced	O
in	O
the	O
ARM1156	O
core	B-Architecture
,	O
announced	O
in	O
2003	O
.	O
</s>
<s>
Thumb-2	O
extends	O
the	O
limited	O
16-bit	B-Device
instruction	B-General_Concept
set	I-General_Concept
of	O
Thumb	O
with	O
additional	O
32-bit	O
instructions	B-General_Concept
to	O
give	O
the	O
instruction	B-General_Concept
set	I-General_Concept
more	O
breadth	O
,	O
thus	O
producing	O
a	O
variable-length	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
A	O
stated	O
aim	O
for	O
Thumb-2	O
was	O
to	O
achieve	O
code	O
density	O
similar	O
to	O
Thumb	O
with	O
performance	O
similar	O
to	O
the	O
ARM	B-Architecture
instruction	I-Architecture
set	I-Architecture
on	O
32-bit	O
memory	O
.	O
</s>
<s>
Thumb-2	O
extends	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
with	O
bit-field	O
manipulation	O
,	O
table	O
branches	O
and	O
conditional	B-Language
execution	O
.	O
</s>
<s>
At	O
the	O
same	O
time	O
,	O
the	O
ARM	B-Architecture
instruction	I-Architecture
set	I-Architecture
was	O
extended	O
to	O
maintain	O
equivalent	O
functionality	O
in	O
both	O
instruction	B-General_Concept
sets	I-General_Concept
.	O
</s>
<s>
A	O
new	O
"	O
Unified	O
Assembly	B-Language
Language	I-Language
"	O
(	O
UAL	O
)	O
supports	O
generation	O
of	O
either	O
Thumb	O
or	O
ARM	O
instructions	B-General_Concept
from	O
the	O
same	O
source	O
code	O
;	O
versions	O
of	O
Thumb	O
seen	O
on	O
ARMv7	O
processors	O
are	O
essentially	O
as	O
capable	O
as	O
ARM	O
code	O
(	O
including	O
the	O
ability	O
to	O
write	O
interrupt	B-Application
handlers	O
)	O
.	O
</s>
<s>
This	O
requires	O
a	O
bit	O
of	O
care	O
,	O
and	O
use	O
of	O
a	O
new	O
"	O
IT	O
"	O
(	O
if-then	B-Language
)	O
instruction	O
,	O
which	O
permits	O
up	O
to	O
four	O
successive	O
instructions	B-General_Concept
to	O
execute	O
based	O
on	O
a	O
tested	O
condition	O
,	O
or	O
on	O
its	O
inverse	O
.	O
</s>
<s>
When	O
compiling	B-Language
into	O
ARM	O
code	O
,	O
this	O
is	O
ignored	O
,	O
but	O
when	O
compiling	B-Language
into	O
Thumb	O
it	O
generates	O
an	O
actual	O
instruction	O
.	O
</s>
<s>
All	O
ARMv7	O
chips	O
support	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
All	O
chips	O
in	O
the	O
Cortex-A	O
series	O
,	O
Cortex-R	O
series	O
,	O
and	O
ARM11	O
series	O
support	O
both	O
"	O
ARM	B-Architecture
instruction	I-Architecture
set	I-Architecture
state	O
"	O
and	O
"	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
state	O
"	O
,	O
while	O
chips	O
in	O
the	O
Cortex-M	O
series	O
support	O
only	O
the	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
ThumbEE	O
(	O
erroneously	O
called	O
Thumb-2EE	O
in	O
some	O
ARM	O
documentation	O
)	O
,	O
which	O
was	O
marketed	O
as	O
Jazelle	B-Language
RCT	O
(	O
Runtime	O
Compilation	B-Language
Target	O
)	O
,	O
was	O
announced	O
in	O
2005	O
and	O
deprecated	O
in	O
2011	O
.	O
</s>
<s>
It	O
first	O
appeared	O
in	O
the	O
Cortex-A8	B-Application
processor	O
.	O
</s>
<s>
ThumbEE	O
is	O
a	O
fourth	O
instruction	B-General_Concept
set	I-General_Concept
state	O
,	O
making	O
small	O
changes	O
to	O
the	O
Thumb-2	O
extended	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
These	O
changes	O
make	O
the	O
instruction	B-General_Concept
set	I-General_Concept
particularly	O
suited	O
to	O
code	O
generated	O
at	O
runtime	O
(	O
e.g.	O
</s>
<s>
by	O
JIT	O
compilation	B-Language
)	O
in	O
managed	O
Execution	O
Environments	O
.	O
</s>
<s>
ThumbEE	O
is	O
a	O
target	O
for	O
languages	O
such	O
as	O
Java	B-Language
,	O
C#	B-Application
,	O
Perl	B-Language
,	O
and	O
Python	B-Language
,	O
and	O
allows	O
JIT	O
compilers	B-Language
to	O
output	O
smaller	O
compiled	B-Language
code	O
without	O
reducing	O
performance	O
.	O
</s>
<s>
New	O
features	O
provided	O
by	O
ThumbEE	O
include	O
automatic	O
null	O
pointer	O
checks	O
on	O
every	O
load	O
and	O
store	O
instruction	O
,	O
an	O
instruction	O
to	O
perform	O
an	O
array	O
bounds	O
check	O
,	O
and	O
special	O
instructions	B-General_Concept
that	O
call	O
a	O
handler	O
.	O
</s>
<s>
In	O
addition	O
,	O
because	O
it	O
utilises	O
Thumb-2	O
technology	O
,	O
ThumbEE	O
provides	O
access	O
to	O
registers	B-General_Concept
r8	O
–	O
r15	O
(	O
where	O
the	O
Jazelle/DBX	O
Java	B-Language
VM	O
state	O
is	O
held	O
)	O
.	O
</s>
<s>
These	O
changes	O
come	O
from	O
repurposing	O
a	O
handful	O
of	O
opcodes	B-Language
,	O
and	O
knowing	O
the	O
core	B-Architecture
is	O
in	O
the	O
new	O
ThumbEE	O
state	O
.	O
</s>
<s>
On	O
23	O
November	O
2011	O
,	O
Arm	O
deprecated	O
any	O
use	O
of	O
the	O
ThumbEE	O
instruction	B-General_Concept
set	I-General_Concept
,	O
and	O
Armv8	O
removes	O
support	O
for	O
ThumbEE	O
.	O
</s>
<s>
VFP	O
(	O
Vector	O
Floating	O
Point	O
)	O
technology	O
is	O
a	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
coprocessor	O
extension	O
to	O
the	O
ARM	B-Architecture
architecture	I-Architecture
(	O
implemented	O
differently	O
in	O
Armv8	O
–	O
coprocessors	O
not	O
defined	O
there	O
)	O
.	O
</s>
<s>
VFP	O
provides	O
floating-point	O
computation	O
suitable	O
for	O
a	O
wide	O
spectrum	O
of	O
applications	O
such	O
as	O
PDAs	B-Application
,	O
smartphones	B-Application
,	O
voice	O
compression	O
and	O
decompression	O
,	O
three-dimensional	O
graphics	O
and	O
digital	O
audio	O
,	O
printers	O
,	O
set-top	O
boxes	O
,	O
and	O
automotive	O
applications	O
.	O
</s>
<s>
The	O
VFP	O
architecture	O
was	O
intended	O
to	O
support	O
execution	O
of	O
short	O
"	O
vector	O
mode	O
"	O
instructions	B-General_Concept
but	O
these	O
operated	O
on	O
each	O
vector	O
element	O
sequentially	O
and	O
thus	O
did	O
not	O
offer	O
the	O
performance	O
of	O
true	O
single	B-Device
instruction	I-Device
,	I-Device
multiple	I-Device
data	I-Device
(	O
SIMD	B-Device
)	O
vector	O
parallelism	O
.	O
</s>
<s>
This	O
vector	O
mode	O
was	O
therefore	O
removed	O
shortly	O
after	O
its	O
introduction	O
,	O
to	O
be	O
replaced	O
with	O
the	O
much	O
more	O
powerful	O
Advanced	O
SIMD	B-Device
,	O
also	O
named	O
Neon	O
.	O
</s>
<s>
Some	O
devices	O
such	O
as	O
the	O
ARM	B-Application
Cortex-A8	I-Application
have	O
a	O
cut-down	O
VFPLite	O
module	O
instead	O
of	O
a	O
full	O
VFP	O
module	O
,	O
and	O
require	O
roughly	O
ten	O
times	O
more	O
clock	O
cycles	O
per	O
float	O
operation	O
.	O
</s>
<s>
Pre-Armv8	O
architecture	O
implemented	O
floating-point/SIMD	O
with	O
the	O
coprocessor	O
interface	O
.	O
</s>
<s>
Other	O
floating-point	O
and/or	O
SIMD	B-Device
units	O
found	O
in	O
ARM-based	O
processors	O
using	O
the	O
coprocessor	O
interface	O
include	O
FPA	O
,	O
FPE	O
,	O
iwMMXt	B-Architecture
,	O
some	O
of	O
which	O
were	O
implemented	O
in	O
software	O
by	O
trapping	O
but	O
could	O
have	O
been	O
implemented	O
in	O
hardware	O
.	O
</s>
<s>
They	O
provide	O
some	O
of	O
the	O
same	O
functionality	O
as	O
VFP	O
but	O
are	O
not	O
opcode-compatible	O
with	O
it	O
.	O
</s>
<s>
FPA10	O
also	O
provides	O
extended	B-Algorithm
precision	I-Algorithm
,	O
but	O
implements	O
correct	O
rounding	O
(	O
required	O
by	O
IEEE754	O
)	O
only	O
in	O
single	O
precision	O
.	O
</s>
<s>
VFPv2	O
An	O
optional	O
extension	O
to	O
the	O
ARM	B-Architecture
instruction	I-Architecture
set	I-Architecture
in	O
the	O
ARMv5TE	O
,	O
ARMv5TEJ	O
and	O
ARMv6	O
architectures	O
.	O
</s>
<s>
VFPv2	O
has	O
16	O
64-bit	B-Device
FPU	O
registers	B-General_Concept
.	O
</s>
<s>
VFPv3	O
or	O
VFPv3-D32	O
Implemented	O
on	O
most	O
Cortex-A8	B-Application
and	O
A9	O
ARMv7	O
processors	O
.	O
</s>
<s>
It	O
is	O
backward-compatible	O
with	O
VFPv2	O
,	O
except	O
that	O
it	O
cannot	O
trap	B-Application
floating-point	O
exceptions	O
.	O
</s>
<s>
VFPv3	O
has	O
32	O
64-bit	B-Device
FPU	O
registers	B-General_Concept
as	O
standard	O
,	O
adds	O
VCVT	O
instructions	B-General_Concept
to	O
convert	O
between	O
scalar	O
,	O
float	O
and	O
double	O
,	O
adds	O
immediate	O
mode	O
to	O
VMOV	O
such	O
that	O
constants	O
can	O
be	O
loaded	O
into	O
FPU	O
registers	B-General_Concept
.	O
</s>
<s>
VFPv3-D16	O
As	O
above	O
,	O
but	O
with	O
only	O
16	O
64-bit	B-Device
FPU	O
registers	B-General_Concept
.	O
</s>
<s>
Implemented	O
on	O
Cortex-R4	O
and	O
R5	O
processors	O
and	O
the	O
Tegra	B-Operating_System
2	I-Operating_System
(	O
Cortex-A9	B-Application
)	O
.	O
</s>
<s>
VFPv3-F16	O
Uncommon	O
;	O
it	O
supports	O
IEEE754-2008	O
half-precision	O
(	O
16-bit	B-Device
)	O
floating	O
point	O
as	O
a	O
storage	O
format	O
.	O
</s>
<s>
VFPv4	O
or	O
VFPv4-D32Implemented	O
on	O
Cortex-A12	O
and	O
A15	B-Device
ARMv7	O
processors	O
,	O
Cortex-A7	B-Application
optionally	O
has	O
VFPv4-D32	O
in	O
the	O
case	O
of	O
an	O
FPU	O
with	O
Neon	O
.	O
</s>
<s>
VFPv4	O
has	O
32	O
64-bit	B-Device
FPU	O
registers	B-General_Concept
as	O
standard	O
,	O
adds	O
both	O
half-precision	O
support	O
as	O
a	O
storage	O
format	O
and	O
fused	O
multiply-accumulate	B-Algorithm
instructions	B-General_Concept
to	O
the	O
features	O
of	O
VFPv3	O
.	O
</s>
<s>
VFPv4-D16	O
As	O
above	O
,	O
but	O
it	O
has	O
only	O
16	O
64-bit	B-Device
FPU	O
registers	B-General_Concept
.	O
</s>
<s>
Implemented	O
on	O
Cortex-A5	B-Application
and	O
A7	O
processors	O
in	O
the	O
case	O
of	O
an	O
FPU	O
without	O
Neon	O
.	O
</s>
<s>
VFPv5-D16-M	O
Implemented	O
on	O
Cortex-M7	O
when	O
single	O
and	O
double-precision	O
floating-point	O
core	B-Architecture
option	O
exists	O
.	O
</s>
<s>
In	O
Debian	O
Linux	B-Operating_System
and	O
derivatives	O
such	O
as	O
Ubuntu	B-Operating_System
and	O
Linux	B-Application
Mint	I-Application
,	O
armhf	O
(	O
ARM	O
hard	O
float	O
)	O
refers	O
to	O
the	O
ARMv7	O
architecture	O
including	O
the	O
additional	O
VFP3-D16	O
floating-point	O
hardware	O
extension	O
(	O
and	O
Thumb-2	O
)	O
above	O
.	O
</s>
<s>
Software	O
packages	O
and	O
cross-compiler	O
tools	O
use	O
the	O
armhf	O
vs.	O
arm/armel	O
suffixes	O
to	O
differentiate	O
.	O
</s>
<s>
The	O
Advanced	O
SIMD	B-Device
extension	O
(	O
also	O
known	O
as	O
Neon	O
or	O
"	O
MPE	O
"	O
Media	O
Processing	O
Engine	O
)	O
is	O
a	O
combined	O
64	B-Device
-	O
and	O
128-bit	O
SIMD	B-Device
instruction	B-General_Concept
set	I-General_Concept
that	O
provides	O
standardised	O
acceleration	O
for	O
media	O
and	O
signal	O
processing	O
applications	O
.	O
</s>
<s>
Neon	O
is	O
included	O
in	O
all	O
Cortex-A8	B-Application
devices	O
,	O
but	O
is	O
optional	O
in	O
Cortex-A9	B-Application
devices	O
.	O
</s>
<s>
Neon	O
can	O
execute	O
MP3	O
audio	O
decoding	O
on	O
CPUs	B-Device
running	O
at	O
10MHz	O
,	O
and	O
can	O
run	O
the	O
GSM	O
adaptive	B-Algorithm
multi-rate	I-Algorithm
(	O
AMR	O
)	O
speech	O
codec	O
at	O
13MHz	O
.	O
</s>
<s>
It	O
features	O
a	O
comprehensive	O
instruction	B-General_Concept
set	I-General_Concept
,	O
separate	O
register	B-General_Concept
files	I-General_Concept
,	O
and	O
independent	O
execution	O
hardware	O
.	O
</s>
<s>
Neon	O
supports	O
8-	O
,	O
16-	O
,	O
32-	O
,	O
and	O
64-bit	B-Device
integer	O
and	O
single-precision	O
(	O
32-bit	O
)	O
floating-point	O
data	O
and	O
SIMD	B-Device
operations	O
for	O
handling	O
audio	O
and	O
video	O
processing	O
as	O
well	O
as	O
graphics	O
and	O
gaming	O
processing	O
.	O
</s>
<s>
In	O
Neon	O
,	O
the	O
SIMD	B-Device
supports	O
up	O
to	O
16operations	O
at	O
the	O
same	O
time	O
.	O
</s>
<s>
The	O
Neon	O
hardware	O
shares	O
the	O
same	O
floating-point	O
registers	B-General_Concept
as	O
used	O
in	O
VFP	O
.	O
</s>
<s>
Devices	O
such	O
as	O
the	O
ARM	B-Application
Cortex-A8	I-Application
and	O
Cortex-A9	B-Application
support	O
128-bit	O
vectors	O
,	O
but	O
will	O
execute	O
with	O
64bits	B-Device
at	O
a	O
time	O
,	O
whereas	O
newer	O
Cortex-A15	O
devices	O
can	O
execute	O
128bits	O
at	O
a	O
time	O
.	O
</s>
<s>
A	O
quirk	O
of	O
Neon	O
in	O
Armv7	O
devices	O
is	O
that	O
it	O
flushes	O
all	O
subnormal	B-Algorithm
numbers	I-Algorithm
to	O
zero	O
,	O
and	O
as	O
a	O
result	O
the	O
GCC	B-Application
compiler	I-Application
will	O
not	O
use	O
it	O
unless	O
,	O
which	O
allows	O
losing	O
denormals	B-Algorithm
,	O
is	O
turned	O
on	O
.	O
</s>
<s>
"	O
Enhanced	O
"	O
Neon	O
defined	O
since	O
Armv8	O
does	O
not	O
have	O
this	O
quirk	O
,	O
but	O
as	O
of	O
the	O
same	O
flag	O
is	O
still	O
required	O
to	O
enable	O
Neon	O
instructions	B-General_Concept
.	O
</s>
<s>
On	O
the	O
other	O
hand	O
,	O
GCC	B-Application
does	O
consider	O
Neon	O
safe	O
on	O
AArch64	B-Architecture
for	O
Armv8	O
.	O
</s>
<s>
ProjectNe10	O
is	O
ARM	O
's	O
first	O
open-source	O
project	O
(	O
from	O
its	O
inception	O
;	O
while	O
they	O
acquired	O
an	O
older	O
project	O
,	O
now	O
named	O
Mbed	B-Language
TLS	I-Language
)	O
.	O
</s>
<s>
The	O
Ne10	O
library	O
is	O
a	O
set	O
of	O
common	O
,	O
useful	O
functions	O
written	O
in	O
both	O
Neon	O
and	O
C	B-Language
(	O
for	O
compatibility	O
)	O
.	O
</s>
<s>
The	O
library	O
was	O
created	O
to	O
allow	O
developers	O
to	O
use	O
Neon	O
optimisations	O
without	O
learning	O
Neon	O
,	O
but	O
it	O
also	O
serves	O
as	O
a	O
set	O
of	O
highly	O
optimised	O
Neon	O
intrinsic	O
and	O
assembly	B-Language
code	I-Language
examples	O
for	O
common	O
DSP	O
,	O
arithmetic	O
,	O
and	O
image	O
processing	O
routines	O
.	O
</s>
<s>
It	O
adds	O
more	O
than	O
150	O
scalar	O
and	O
vector	O
instructions	B-General_Concept
.	O
</s>
<s>
The	O
Security	O
Extensions	O
,	O
marketed	O
as	O
TrustZone	O
Technology	O
,	O
is	O
in	O
ARMv6KZ	O
and	O
later	O
application	B-Application
profile	O
architectures	O
.	O
</s>
<s>
It	O
provides	O
a	O
low-cost	O
alternative	O
to	O
adding	O
another	O
dedicated	O
security	O
core	B-Architecture
to	O
an	O
SoC	B-Architecture
,	O
by	O
providing	O
two	O
virtual	O
processors	O
backed	O
by	O
hardware	O
based	O
access	O
control	O
.	O
</s>
<s>
This	O
lets	O
the	O
application	B-Application
core	B-Architecture
switch	O
between	O
two	O
states	O
,	O
referred	O
to	O
as	O
worlds	O
(	O
to	O
reduce	O
confusion	O
with	O
other	O
names	O
for	O
capability	O
domains	O
)	O
,	O
to	O
prevent	O
information	O
leaking	O
from	O
the	O
more	O
trusted	O
world	O
to	O
the	O
less	O
trusted	O
world	O
.	O
</s>
<s>
This	O
world	O
switch	O
is	O
generally	O
orthogonal	O
to	O
all	O
other	O
capabilities	O
of	O
the	O
processor	O
,	O
thus	O
each	O
world	O
can	O
operate	O
independently	O
of	O
the	O
other	O
while	O
using	O
the	O
same	O
core	B-Architecture
.	O
</s>
<s>
Memory	O
and	O
peripherals	O
are	O
then	O
made	O
aware	O
of	O
the	O
operating	O
world	O
of	O
the	O
core	B-Architecture
and	O
may	O
use	O
this	O
to	O
provide	O
access	O
control	O
to	O
secrets	O
and	O
code	O
on	O
the	O
device	O
.	O
</s>
<s>
AMD	O
has	O
licensed	O
and	O
incorporated	O
TrustZone	O
technology	O
into	O
its	O
Secure	B-Device
Processor	I-Device
Technology	I-Device
.	O
</s>
<s>
Enabled	O
in	O
some	O
but	O
not	O
all	O
products	O
,	O
AMD	O
's	O
APUs	O
include	O
a	O
Cortex-A5	B-Application
processor	O
for	O
handling	O
secure	O
processing	O
.	O
</s>
<s>
In	O
fact	O
,	O
the	O
Cortex-A5	B-Application
TrustZone	O
core	B-Architecture
had	O
been	O
included	O
in	O
earlier	O
AMD	O
products	O
,	O
but	O
was	O
not	O
enabled	O
due	O
to	O
time	O
constraints	O
.	O
</s>
<s>
Samsung	B-Application
Knox	I-Application
uses	O
TrustZone	O
for	O
purposes	O
such	O
as	O
detecting	O
modifications	O
to	O
the	O
kernel	B-Operating_System
,	O
storing	O
certificates	O
and	O
attestating	O
keys	O
.	O
</s>
<s>
While	O
containing	O
similar	O
concepts	O
to	O
TrustZone	O
for	O
Armv8-A	O
,	O
it	O
has	O
a	O
different	O
architectural	O
design	O
,	O
as	O
world	O
switching	O
is	O
performed	O
using	O
branch	O
instructions	B-General_Concept
instead	O
of	O
using	O
exceptions	O
.	O
</s>
<s>
It	O
also	O
supports	O
safe	O
interleaved	O
interrupt	B-Application
handling	I-Application
from	O
either	O
world	O
regardless	O
of	O
the	O
current	O
security	O
state	O
.	O
</s>
<s>
Together	O
these	O
features	O
provide	O
low	O
latency	O
calls	O
to	O
the	O
secure	O
world	O
and	O
responsive	O
interrupt	B-Application
handling	I-Application
.	O
</s>
<s>
As	O
of	O
ARMv6	O
,	O
the	O
ARM	B-Architecture
architecture	I-Architecture
supports	O
no-execute	B-General_Concept
page	I-General_Concept
protection	I-General_Concept
,	O
which	O
is	O
referred	O
to	O
as	O
XN	O
,	O
for	O
eXecute	O
Never	O
.	O
</s>
<s>
The	O
physical	O
address	O
size	O
may	O
be	O
even	O
larger	O
in	O
processors	O
based	O
on	O
the	O
64-bit	B-Device
(	O
Armv8-A	O
)	O
architecture	O
.	O
</s>
<s>
However	O
,	O
Armv8-M	O
does	O
not	O
include	O
any	O
64-bit	B-Device
AArch64	B-Architecture
instructions	B-General_Concept
,	O
and	O
Armv8-R	O
originally	O
did	O
not	O
include	O
any	O
AArch64	B-Architecture
instructions	B-General_Concept
;	O
those	O
instructions	B-General_Concept
were	O
added	O
to	O
Armv8-R	O
later	O
.	O
</s>
<s>
A	O
new	O
vector	O
instruction	B-General_Concept
set	I-General_Concept
extension	O
.	O
</s>
<s>
Additional	O
instruction	B-General_Concept
set	I-General_Concept
enhancements	O
for	O
loops	O
and	O
branches	O
(	O
Low	O
Overhead	O
Branch	O
Extension	O
)	O
.	O
</s>
<s>
Instructions	B-General_Concept
for	O
half-precision	O
floating-point	O
support	O
.	O
</s>
<s>
Instruction	B-General_Concept
set	I-General_Concept
enhancement	O
for	O
TrustZone	O
management	O
for	O
Floating	B-General_Concept
Point	I-General_Concept
Unit	I-General_Concept
(	O
FPU	O
)	O
.	O
</s>
<s>
Enhancements	O
in	O
debug	O
including	O
Performance	O
Monitoring	O
Unit	O
(	O
PMU	O
)	O
,	O
Unprivileged	O
Debug	O
Extension	O
,	O
and	O
additional	O
debug	O
support	O
focus	O
on	O
signal	O
processing	O
application	B-Application
developments	O
.	O
</s>
<s>
Announced	O
in	O
October	O
2011	O
,	O
Armv8-A	O
(	O
often	O
called	O
ARMv8	O
while	O
the	O
Armv8-R	O
is	O
also	O
available	O
)	O
represents	O
a	O
fundamental	O
change	O
to	O
the	O
ARM	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
It	O
adds	O
an	O
optional	O
64-bit	B-Device
architecture	I-Device
named	O
"	O
AArch64	B-Architecture
"	O
and	O
the	O
associated	O
new	O
"	O
A64	O
"	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
AArch64	B-Architecture
provides	O
user-space	B-Operating_System
compatibility	O
with	O
Armv7-A	O
,	O
the	O
32-bit	O
architecture	O
,	O
therein	O
referred	O
to	O
as	O
"	O
AArch32	O
"	O
and	O
the	O
old	O
32-bit	O
instruction	B-General_Concept
set	I-General_Concept
,	O
now	O
named	O
"	O
A32	O
"	O
.	O
</s>
<s>
The	O
Thumb	O
instruction	B-General_Concept
set	I-General_Concept
is	O
referred	O
to	O
as	O
"	O
T32	O
"	O
and	O
has	O
no	O
64-bit	B-Device
counterpart	O
.	O
</s>
<s>
Armv8-A	O
allows	O
32-bit	O
applications	O
to	O
be	O
executed	O
in	O
a	O
64-bit	B-Device
OS	I-Device
,	O
and	O
a	O
32-bit	O
OS	O
to	O
be	O
under	O
the	O
control	O
of	O
a	O
64-bit	B-Device
hypervisor	B-Operating_System
.	O
</s>
<s>
ARM	O
announced	O
their	O
Cortex-A53	O
and	O
Cortex-A57	O
cores	B-Architecture
on	O
30	O
October	O
2012	O
.	O
</s>
<s>
Apple	O
was	O
the	O
first	O
to	O
release	O
an	O
Armv8-A	O
compatible	O
core	B-Architecture
in	O
a	O
consumer	O
product	O
(	O
Apple	O
A7	O
in	O
iPhone	B-Operating_System
5S	I-Operating_System
)	O
.	O
</s>
<s>
AppliedMicro	O
,	O
using	O
an	O
FPGA	B-Architecture
,	O
was	O
the	O
first	O
to	O
demo	O
Armv8-A	O
.	O
</s>
<s>
The	O
first	O
Armv8-A	O
SoC	B-Architecture
from	O
Samsung	O
is	O
the	O
Exynos	O
5433	O
used	O
in	O
the	O
Galaxy	B-Operating_System
Note	I-Operating_System
4	I-Operating_System
,	O
which	O
features	O
two	O
clusters	O
of	O
four	O
Cortex-A57	O
and	O
Cortex-A53	O
cores	B-Architecture
in	O
a	O
big.LITTLE	B-Architecture
configuration	O
;	O
but	O
it	O
will	O
run	O
only	O
in	O
AArch32	O
mode	O
.	O
</s>
<s>
To	O
both	O
AArch32	O
and	O
AArch64	B-Architecture
,	O
Armv8-A	O
makes	O
VFPv3/v4	O
and	O
advanced	O
SIMD	B-Device
(	O
Neon	O
)	O
standard	O
.	O
</s>
<s>
It	O
also	O
adds	O
cryptography	O
instructions	B-General_Concept
supporting	O
AES	B-Algorithm
,	O
SHA-1/SHA	O
-256	O
and	O
finite	O
field	O
arithmetic	O
.	O
</s>
<s>
AArch64	B-Architecture
was	O
introduced	O
in	O
Armv8-A	O
and	O
its	O
subsequent	O
revision	O
.	O
</s>
<s>
AArch64	B-Architecture
is	O
not	O
included	O
in	O
the	O
32-bit	O
Armv8-R	O
and	O
Armv8-M	O
architectures	O
.	O
</s>
<s>
Optional	O
AArch64	B-Architecture
support	O
was	O
added	O
to	O
the	O
Armv8-R	O
profile	O
,	O
with	O
the	O
first	O
ARM	O
core	B-Architecture
implementing	O
it	O
being	O
the	O
Cortex-R82	O
.	O
</s>
<s>
It	O
adds	O
the	O
A64	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
,	O
formerly	O
named	O
Arm	O
ServerReady	O
,	O
is	O
a	O
certification	O
program	O
that	O
helps	O
land	O
the	O
generic	O
off-the-shelf	O
operating	O
systems	O
and	O
hypervisors	B-Operating_System
on	O
to	O
the	O
Arm-based	O
systems	O
from	O
datacenter	O
servers	O
to	O
industrial	O
edge	O
and	O
IoT	B-Operating_System
devices	O
.	O
</s>
<s>
The	O
key	O
building	O
blocks	O
of	O
the	O
program	O
are	O
the	O
specifications	O
for	O
minimum	O
hardware	O
and	O
firmware	O
requirements	O
that	O
the	O
operating	O
systems	O
and	O
hypervisors	B-Operating_System
can	O
rely	O
upon	O
.	O
</s>
<s>
SystemReady	O
SR	O
:	O
this	O
band	O
is	O
for	O
servers	O
that	O
support	O
operating	O
systems	O
and	O
hypervisors	B-Operating_System
that	O
expect	O
UEFI	B-Architecture
,	O
ACPI	B-Device
and	O
SMBIOS	O
interfaces	O
.	O
</s>
<s>
SystemReady	O
LS	O
:	O
this	O
band	O
is	O
for	O
servers	O
that	O
hyperscalers	O
use	O
to	O
support	O
Linux	B-Application
operating	I-Application
systems	I-Application
that	O
expect	O
LinuxBoot	B-Device
firmware	O
along	O
with	O
the	O
ACPI	B-Device
and	O
SMBIOS	O
interfaces	O
.	O
</s>
<s>
SystemReady	O
ES	O
:	O
this	O
band	O
is	O
for	O
the	O
industrial	O
edge	O
and	O
IoT	B-Operating_System
devices	O
that	O
support	O
operating	O
systems	O
and	O
hypervisors	B-Operating_System
that	O
expect	O
UEFI	B-Architecture
,	O
ACPI	B-Device
and	O
SMBIOS	O
interfaces	O
.	O
</s>
<s>
SystemReady	O
IR	O
:	O
this	O
band	O
is	O
for	O
the	O
industrial	O
edge	O
and	O
IoT	B-Operating_System
devices	O
that	O
support	O
operating	O
systems	O
that	O
expect	O
UEFI	B-Architecture
and	O
devicetree	B-Operating_System
interfaces	O
.	O
</s>
<s>
It	O
is	O
intended	O
to	O
help	O
secure	O
Internet	B-Operating_System
of	I-Operating_System
Things	I-Operating_System
(	O
IoT	B-Operating_System
)	O
devices	O
built	O
on	O
system-on-a-chip	B-Architecture
(	O
SoC	B-Architecture
)	O
processors	O
.	O
</s>
<s>
Although	O
the	O
scheme	O
is	O
architecture	O
agnostic	O
,	O
it	O
was	O
first	O
implemented	O
on	O
Arm	O
Cortex-M	O
processor	O
cores	B-Architecture
intended	O
for	O
microcontroller	B-Architecture
use	O
.	O
</s>
<s>
PSA	O
Certified	O
includes	O
freely	O
available	O
threat	O
models	O
and	O
security	O
analyses	O
that	O
demonstrate	O
the	O
process	O
for	O
deciding	O
on	O
security	O
features	O
in	O
common	O
IoT	B-Operating_System
products	O
.	O
</s>
<s>
It	O
also	O
provides	O
freely	O
downloadable	O
application	B-Application
programming	O
interface	O
(	O
API	O
)	O
packages	O
,	O
architectural	O
specifications	O
,	O
open-source	O
firmware	O
implementations	O
,	O
and	O
related	O
test	O
suites	O
.	O
</s>
<s>
Following	O
the	O
development	O
of	O
the	O
architecture	O
security	O
framework	O
in	O
2017	O
,	O
the	O
PSA	O
Certified	O
assurance	O
scheme	O
launched	O
two	O
years	O
later	O
at	O
Embedded	B-Operating_System
World	O
in	O
2019	O
.	O
</s>
<s>
PSA	O
Certified	O
offers	O
a	O
multi-level	O
security	O
evaluation	O
scheme	O
for	O
chip	O
vendors	O
,	O
OS	O
providers	O
and	O
IoT	B-Operating_System
device	O
makers	O
.	O
</s>
<s>
The	O
Embedded	B-Operating_System
World	O
presentation	O
introduced	O
chip	O
vendors	O
to	O
Level	O
1	O
Certification	O
.	O
</s>
<s>
The	O
certification	O
was	O
created	O
by	O
PSA	O
Joint	O
Stakeholders	O
to	O
enable	O
a	O
security-by-design	O
approach	O
for	O
a	O
diverse	O
set	O
of	O
IoT	B-Operating_System
products	O
.	O
</s>
<s>
The	O
certification	O
also	O
removes	O
industry	O
fragmentation	O
for	O
IoT	B-Operating_System
product	I-Operating_System
manufacturers	O
and	O
developers	O
.	O
</s>
<s>
The	O
first	O
32-bit	O
ARM-based	O
personal	O
computer	O
,	O
the	O
Acorn	B-Device
Archimedes	I-Device
,	O
was	O
originally	O
intended	O
to	O
run	O
an	O
ambitious	O
operating	O
system	O
called	O
ARX	B-Operating_System
.	O
</s>
<s>
The	O
machines	O
shipped	O
with	O
RISC	B-Operating_System
OS	I-Operating_System
which	O
was	O
also	O
used	O
on	O
later	O
ARM-based	O
systems	O
from	O
Acorn	O
and	O
other	O
vendors	O
.	O
</s>
<s>
Some	O
early	O
Acorn	O
machines	O
were	O
also	O
able	O
to	O
run	O
a	O
Unix	B-Application
port	O
called	O
RISC	B-Operating_System
iX	I-Operating_System
.	O
</s>
<s>
(	O
Neither	O
is	O
to	O
be	O
confused	O
with	O
RISC/os	B-Operating_System
,	O
a	O
contemporary	O
Unix	B-Application
variant	O
for	O
the	O
MIPS	O
architecture	O
.	O
)	O
</s>
<s>
The	O
32-bit	O
ARM	B-Architecture
architecture	I-Architecture
is	O
supported	O
by	O
a	O
large	O
number	O
of	O
embedded	B-Operating_System
and	O
real-time	B-Operating_System
operating	I-Operating_System
systems	I-Operating_System
,	O
including	O
:	O
</s>
<s>
The	O
32-bit	O
ARM	B-Architecture
architecture	I-Architecture
is	O
the	O
primary	O
hardware	O
environment	O
for	O
most	O
mobile	B-Application
device	I-Application
operating	O
systems	O
such	O
as	O
:	O
</s>
<s>
The	O
32-bit	O
ARM	B-Architecture
architecture	I-Architecture
is	O
supported	O
by	O
RISC	B-Operating_System
OS	I-Operating_System
and	O
by	O
multiple	O
Unix-like	B-Operating_System
operating	I-Operating_System
systems	I-Operating_System
including	O
:	O
</s>
<s>
several	O
Linux	B-Application
distributions	I-Application
,	O
such	O
as	O
:	O
</s>
<s>
Android	B-Application
supports	O
Armv8-A	O
in	O
Android	B-Application
Lollipop	I-Application
(	O
5.0	O
)	O
and	O
later	O
.	O
</s>
<s>
iOS	B-Application
supports	O
Armv8-A	O
in	O
iOS	B-Operating_System
7	I-Operating_System
and	O
later	O
on	O
64-bit	B-Device
Apple	O
SoCs	O
.	O
</s>
<s>
iOS	B-Operating_System
11	I-Operating_System
and	O
later	O
only	O
supports	O
64-bit	B-Device
ARM	B-Architecture
processors	I-Architecture
and	O
applications	O
.	O
</s>
<s>
Support	O
for	O
Armv8-A	O
was	O
merged	O
into	O
the	O
Linux	B-Operating_System
kernel	I-Operating_System
version	O
3.7	O
in	O
late	O
2012	O
.	O
</s>
<s>
Armv8-A	O
is	O
supported	O
by	O
a	O
number	O
of	O
Linux	B-Application
distributions	I-Application
,	O
such	O
as	O
:	O
</s>
<s>
Raspberry	B-Application
Pi	I-Application
OS	I-Application
(	O
formerly	O
Raspbian	B-Application
.	O
</s>
<s>
Support	O
for	O
Armv8-A	O
was	O
merged	O
into	O
FreeBSD	B-Operating_System
in	O
late	O
2014	O
.	O
</s>
<s>
OpenBSD	B-Operating_System
has	O
Armv8	O
support	O
as	O
of	O
2017	O
.	O
</s>
<s>
NetBSD	B-Device
has	O
Armv8	O
support	O
as	O
of	O
early	O
2018	O
.	O
</s>
<s>
Windows	O
-	O
Windows	B-Operating_System
10	I-Operating_System
runs	O
32-bit	O
"	O
x86	B-Operating_System
and	O
32-bit	O
ARM	O
applications	O
"	O
,	O
as	O
well	O
as	O
native	O
ARM64	B-Architecture
desktop	B-Application
apps	I-Application
;	O
Windows	B-Application
11	I-Application
does	O
so	O
as	O
well	O
.	O
</s>
<s>
Support	O
for	O
64-bit	B-Device
ARM	O
apps	O
in	O
the	B-Application
Microsoft	I-Application
Store	I-Application
has	O
been	O
available	O
since	O
November	O
2018	O
.	O
</s>
<s>
macOS	B-Application
has	O
ARM	O
support	O
starting	O
with	O
macOS	B-Operating_System
Big	I-Operating_System
Sur	I-Operating_System
as	O
of	O
late	O
2020	O
.	O
</s>
<s>
Rosetta	O
2	O
adds	O
support	O
for	O
x86-64	B-Device
applications	O
but	O
not	O
virtualization	O
of	O
x86-64	B-Device
computer	O
platforms	O
.	O
</s>
<s>
Windows	O
applications	O
recompiled	B-Language
for	O
ARM	O
and	O
linked	O
with	O
Winelib	B-Application
,	O
from	O
the	O
Wine	B-Application
project	I-Application
,	O
can	O
run	O
on	O
32-bit	O
or	O
64-bit	B-Device
ARM	O
in	O
Linux	B-Operating_System
,	O
FreeBSD	B-Operating_System
,	O
or	O
other	O
compatible	O
operating	O
systems	O
.	O
</s>
<s>
x86	B-Operating_System
binaries	O
,	O
e.g.	O
</s>
<s>
when	O
not	O
specially	O
compiled	B-Language
for	O
ARM	O
,	O
have	O
been	O
demonstrated	O
on	O
ARM	O
using	O
QEMU	B-Application
with	O
Wine	B-Application
(	O
on	O
Linux	B-Operating_System
and	O
more	O
)	O
,	O
but	O
do	O
not	O
work	O
at	O
full	O
speed	O
or	O
same	O
capability	O
as	O
with	O
Winelib	B-Application
.	O
</s>
