<s>
The	O
K6-III	B-Architecture
(	O
code	O
name	O
:	O
"	O
Sharptooth	O
"	O
)	O
was	O
an	O
x86	B-Operating_System
microprocessor	I-Operating_System
line	O
manufactured	O
by	O
AMD	O
that	O
launched	O
on	O
February	O
22	O
,	O
1999	O
.	O
</s>
<s>
The	O
launch	O
consisted	O
of	O
both	O
400	O
and	O
450MHz	O
models	O
and	O
was	O
based	O
on	O
the	O
preceding	O
K6-2	O
architecture	O
.	O
</s>
<s>
Its	O
improved	O
256	O
KB	O
on-chip	O
L2	O
cache	B-General_Concept
gave	O
it	O
significant	O
improvements	O
in	O
system	O
performance	O
over	O
its	O
predecessor	O
the	O
K6-2	O
.	O
</s>
<s>
The	O
K6-III	B-Architecture
was	O
the	O
last	O
processor	O
officially	O
released	O
for	O
desktop	O
Socket	B-General_Concept
7	I-General_Concept
systems	O
,	O
however	O
later	O
mobile	O
K6-III	B-Architecture
+	I-Architecture
and	O
K6-2	B-Architecture
+	I-Architecture
processors	O
could	O
be	O
run	O
unofficially	O
in	O
certain	O
socket	B-General_Concept
7	I-General_Concept
motherboards	O
if	O
an	O
updated	O
BIOS	B-Operating_System
was	O
made	O
available	O
for	O
a	O
given	O
board	O
.	O
</s>
<s>
The	O
Pentium	B-General_Concept
III	I-General_Concept
processor	O
from	O
Intel	O
launched	O
6	O
days	O
later	O
.	O
</s>
<s>
At	O
its	O
release	O
,	O
the	O
fastest	O
available	O
desktop	O
processor	O
from	O
Intel	O
was	O
the	O
Pentium	B-General_Concept
II	I-General_Concept
450MHz	O
,	O
and	O
in	O
integer	O
application	O
benchmarks	O
a	O
400MHz	O
K6-III	B-Architecture
was	O
able	O
to	O
beat	O
it	O
as	O
the	O
fastest	O
processor	O
available	O
for	O
business	O
applications	O
.	O
</s>
<s>
Just	O
days	O
later	O
on	O
February	O
26	O
Intel	O
released	O
the	O
Pentium	B-General_Concept
III	I-General_Concept
"	O
Katmai	O
"	O
line	O
at	O
speeds	O
of	O
500MHz	O
,	O
slightly	O
faster	O
than	O
the	O
K6-III	B-Architecture
450MHz	O
.	O
</s>
<s>
Since	O
the	O
K6-III	B-Architecture
inherits	O
the	O
same	O
floating	O
point	O
unit	O
as	O
the	O
K6-2	O
(	O
low	O
latency	O
but	O
not	O
pipelined	O
)	O
,	O
unless	O
the	O
game	O
was	O
updated	O
to	O
use	O
AMD	O
's	O
3D-Now	O
!	O
</s>
<s>
SIMD	B-Device
instructions	O
-	O
performance	O
could	O
still	O
remain	O
significantly	O
lower	O
than	O
when	O
run	O
on	O
Intel	O
.	O
</s>
<s>
In	O
conception	O
,	O
the	O
design	O
is	O
simple	O
:	O
it	O
was	O
a	O
K6-2	O
with	O
on-die	O
256KiB	O
L2	O
cache	B-General_Concept
.	O
</s>
<s>
The	O
pipeline	O
was	O
short	O
compared	O
to	O
that	O
of	O
the	O
Pentium	B-General_Concept
III	I-General_Concept
and	O
thus	O
the	O
design	O
did	O
not	O
scale	O
well	O
past	O
500MHz	O
.	O
</s>
<s>
Nevertheless	O
,	O
the	O
K6-III	B-Architecture
400	O
sold	O
well	O
,	O
and	O
the	O
AMD	B-Architecture
K6-III	I-Architecture
450	O
was	O
clearly	O
the	O
fastest	O
x86	B-Operating_System
chip	O
on	O
the	O
market	O
on	O
introduction	O
,	O
comfortably	O
outperforming	O
AMD	O
K6-2s	O
and	O
Intel	B-General_Concept
Pentium	I-General_Concept
IIs	I-General_Concept
.	O
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
is	O
an	O
extension	O
to	O
the	O
x86	B-Operating_System
instruction	B-General_Concept
set	I-General_Concept
developed	O
by	O
Advanced	O
Micro	O
Devices	O
(	O
AMD	O
)	O
.	O
</s>
<s>
It	O
added	O
single	B-Device
instruction	I-Device
multiple	I-Device
data	I-Device
(	O
SIMD	B-Device
)	O
instructions	O
to	O
the	O
base	O
x86	B-Operating_System
instruction	B-General_Concept
set	I-General_Concept
,	O
enabling	O
it	O
to	O
perform	O
vector	B-Operating_System
processing	I-Operating_System
,	O
which	O
improves	O
the	O
performance	O
of	O
many	O
graphic-intensive	O
applications	O
.	O
</s>
<s>
The	O
first	O
microprocessor	B-Architecture
to	O
implement	O
3DNow	B-General_Concept
was	O
the	O
AMD	O
K6-2	O
,	O
which	O
was	O
introduced	O
in	O
1998	O
.	O
</s>
<s>
The	O
K6-III	B-Architecture
+	I-Architecture
had	O
the	O
"	O
Enhanced	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
"	O
(	O
Extended	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
or	O
3DNow+	O
)	O
which	O
added	O
5	O
new	O
DSP	B-General_Concept
instructions	O
,	O
but	O
not	O
the	O
19	O
new	O
extended	O
MMX	B-Architecture
instructions	O
.	O
</s>
<s>
The	O
original	O
K6-2	O
had	O
a	O
64	O
KB	O
primary	O
cache	B-General_Concept
and	O
a	O
much	O
larger	O
amount	O
of	O
motherboard-mounted	O
cache	B-General_Concept
(	O
usually	O
512	O
KB	O
or	O
1024	O
KB	O
but	O
varying	O
depending	O
on	O
the	O
choice	O
of	O
motherboard	O
)	O
.	O
</s>
<s>
The	O
K6-III	B-Architecture
,	O
with	O
its	O
256	O
KB	O
on-die	O
secondary	B-General_Concept
cache	I-General_Concept
,	O
re-purposed	O
the	O
variable-size	O
external	O
cache	B-General_Concept
on	O
the	O
motherboard	O
as	O
the	O
L3	O
cache	B-General_Concept
.	O
</s>
<s>
This	O
scheme	O
was	O
termed	O
"	O
TriLevel	O
Cache	B-General_Concept
"	O
by	O
AMD	O
.	O
</s>
<s>
The	O
L3	O
cache	B-General_Concept
has	O
a	O
capacity	O
of	O
up	O
to	O
2	O
MB	O
.	O
</s>
<s>
Intel	O
's	O
Pentium	B-General_Concept
II	I-General_Concept
replacement	O
was	O
not	O
yet	O
available	O
but	O
,	O
as	O
a	O
stop-gap	O
,	O
Intel	O
introduced	O
a	O
modestly	O
revised	O
version	O
of	O
the	O
Pentium	B-General_Concept
II	I-General_Concept
and	O
re-badged	O
it	O
as	O
the	O
"	O
Pentium	B-General_Concept
III	I-General_Concept
"	O
.	O
</s>
<s>
The	O
base	O
design	O
was	O
unchanged	O
(	O
the	O
addition	O
of	O
SSE	B-General_Concept
instructions	I-General_Concept
was	O
at	O
that	O
time	O
of	O
no	O
performance	O
significance	O
)	O
but	O
Intel	O
's	O
new	O
production	O
process	O
allowed	O
clockspeed	O
improvements	O
,	O
and	O
it	O
became	O
difficult	O
to	O
determine	O
which	O
company	O
's	O
part	O
was	O
the	O
faster	O
.	O
</s>
<s>
AMD	O
chose	O
not	O
to	O
sell	O
a	O
500MHz	O
or	O
faster	O
K6-III	B-Architecture
after	O
the	O
rare	O
500MHz	O
K6-III	B-Architecture
had	O
been	O
immediately	O
recalled	O
;	O
it	O
was	O
found	O
to	O
be	O
drawing	O
enough	O
current	O
to	O
damage	O
some	O
motherboards	O
.	O
</s>
<s>
AMD	O
preferred	O
to	O
concentrate	O
on	O
their	O
soon-to-be-released	O
Athlon	B-Architecture
instead	O
.	O
</s>
<s>
Intel	O
produced	O
a	O
550MHz	O
Pentium	B-General_Concept
III	I-General_Concept
with	O
some	O
success	O
but	O
their	O
600MHz	O
version	O
had	O
reliability	O
issues	O
and	O
was	O
soon	O
recalled	O
.	O
</s>
<s>
With	O
the	O
release	O
of	O
the	O
Athlon	B-Architecture
,	O
the	O
K6-III	B-Architecture
became	O
something	O
of	O
an	O
orphan	O
.	O
</s>
<s>
No	O
longer	O
a	O
competitive	O
CPU	O
in	O
its	O
intended	O
market	O
segment	O
,	O
it	O
nevertheless	O
required	O
substantial	O
manufacturing	O
resources	O
to	O
produce	O
:	O
in	O
spite	O
of	O
its	O
21.4	O
million	O
transistors	O
,	O
its	O
118mm²	O
die	O
was	O
considerably	O
smaller	O
than	O
the	O
184mm²	O
of	O
the	O
22-million-transistor	O
Athlon	B-Architecture
(	O
cache	B-General_Concept
RAM	O
taking	O
much	O
less	O
area	O
per-transistor	O
than	O
logic	O
)	O
,	O
but	O
the	O
K6-III	B-Architecture
was	O
still	O
significantly	O
more	O
costly	O
to	O
produce	O
than	O
the	O
81mm²	O
9.3	O
million-transistor	O
K6-2	O
CPUs	O
.	O
</s>
<s>
(	O
roughly	O
2/3	O
the	O
size	O
of	O
the	O
K6-III	B-Architecture
)	O
For	O
a	O
time	O
,	O
the	O
K6-III	B-Architecture
was	O
a	O
low	O
priority	O
part	O
for	O
AMDsomething	O
to	O
be	O
made	O
only	O
when	O
all	O
orders	O
for	O
high-priced	O
Athlons	B-Architecture
and	O
cheap-to-produce	O
K6-2s	O
had	O
been	O
filledand	O
it	O
became	O
difficult	O
to	O
obtain	O
in	O
significant	O
quantities	O
.	O
</s>
<s>
The	O
original	O
K6-III	B-Architecture
went	O
out	O
of	O
production	O
when	O
Intel	O
released	O
their	O
"	O
Coppermine	O
"	O
Pentium	B-General_Concept
III	I-General_Concept
(	O
a	O
much	O
improved	O
part	O
that	O
used	O
an	O
on-die	O
cache	B-General_Concept
)	O
and	O
,	O
at	O
the	O
same	O
time	O
,	O
switched	O
to	O
a	O
new	O
production	O
process	O
.	O
</s>
<s>
This	O
,	O
coupled	O
with	O
the	O
better	O
performance	O
of	O
the	O
Athlon	B-Architecture
,	O
resulted	O
in	O
even	O
many	O
former	O
Intel-only	O
manufacturers	O
ordering	O
Athlon	B-Architecture
parts	O
,	O
and	O
stretched	O
AMD	O
's	O
manufacturing	O
facilities	O
to	O
the	O
limit	O
.	O
</s>
<s>
In	O
consequence	O
,	O
AMD	O
stopped	O
making	O
the	O
K6-III	B-Architecture
in	O
order	O
to	O
leave	O
more	O
room	O
to	O
manufacture	O
Athlons	B-Architecture
(	O
and	O
K6-2s	O
)	O
.	O
</s>
<s>
By	O
the	O
time	O
the	O
x86	B-Operating_System
CPU	O
shortage	O
was	O
over	O
,	O
AMD	O
had	O
developed	O
and	O
released	O
revised	O
members	O
of	O
the	O
K6	B-Architecture
family	O
.	O
</s>
<s>
These	O
K6-2	B-Architecture
+	I-Architecture
and	O
K6-III	B-Architecture
+	I-Architecture
variants	O
were	O
specifically	O
designed	O
as	O
low-power	O
mobile	O
(	O
laptop	O
)	O
CPUs	O
,	O
and	O
significantly	O
marked	O
the	O
transition	O
of	O
the	O
K6	B-Architecture
architecture	O
(	O
and	O
foretold	O
of	O
AMD	O
's	O
future	O
K7	B-Architecture
project	O
)	O
to	O
the	O
new	O
180nm	O
production	O
process	O
.	O
</s>
<s>
Functionally	O
,	O
both	O
parts	O
were	O
die	O
shrunk	O
K6-IIIs	B-Architecture
(	O
the	O
2+	O
disabled	O
128KiB	O
of	O
cache	B-General_Concept
,	O
the	O
III+	O
had	O
the	O
full	O
256	O
KiB	O
)	O
and	O
introduced	O
AMD	O
's	O
new	O
PowerNow	B-Device
!	I-Device
</s>
<s>
PowerNow	B-Device
!	I-Device
</s>
<s>
Although	O
intended	O
for	O
notebook	O
computers	O
,	O
both	O
parts	O
found	O
an	O
enthusiast	O
following	O
also	O
in	O
desktop	O
systems	O
as	O
some	O
motherboard	O
companies	O
(	O
such	O
as	O
Gigabyte	O
and	O
FIC	O
)	O
provided	O
BIOS	B-Operating_System
updates	O
for	O
their	O
desktop	O
motherboards	O
to	O
allow	O
usage	O
of	O
these	O
processors	O
.	O
</s>
<s>
For	O
other	O
officially	O
not	O
supported	O
mainboards	O
,	O
the	O
enthusiast	O
community	O
created	O
unofficial	O
BIOS	B-Operating_System
updates	O
on	O
their	O
own	O
.	O
</s>
<s>
These	O
boards	O
became	O
firm	O
favorites	O
within	O
the	O
overclocking	B-Application
community	O
.	O
</s>
<s>
Both	O
the	O
K6-III	B-Architecture
+	I-Architecture
and	O
K6-2	B-Architecture
+	I-Architecture
450MHz	O
CPUs	O
were	O
routinely	O
overclocked	O
to	O
over	O
600MHz	O
(	O
112*	O
5.5	O
=	O
616	O
)	O
.	O
</s>
<s>
Unfortunately	O
,	O
even	O
with	O
the	O
180nm	O
process	O
shrink	O
,	O
the	O
K6	B-Architecture
architecture	O
's	O
short	O
6-stage	O
pipeline	O
while	O
efficient	O
,	O
was	O
difficult	O
to	O
scale	O
with	O
regards	O
to	O
clock	O
speed	O
.	O
</s>
<s>
K6	B-Architecture
III+	O
and	O
2+	O
were	O
never	O
offered	O
higher	O
than	O
570MHz	O
officially	O
,	O
and	O
overclocking	B-Application
efforts	O
using	O
air	O
cooling	O
achieved	O
a	O
maximum	O
around	O
800MHz	O
(	O
133x6	O
)	O
at	O
best	O
-	O
however	O
this	O
constraint	O
was	O
also	O
exacerbated	O
by	O
a	O
lack	O
of	O
Socket	B-General_Concept
7	I-General_Concept
motherboards	O
supporting	O
stable	O
speeds	O
over	O
112MHz	O
FSB	B-Architecture
.	O
</s>
<s>
As	O
AMD	O
's	O
marketing	O
resources	O
at	O
the	O
time	O
were	O
focused	O
on	O
the	O
launch	O
of	O
the	O
upcoming	O
Athlon	B-Architecture
K7	B-Architecture
processor	O
line	O
,	O
the	O
180nm	O
K6	B-Architecture
series	O
were	O
relatively	O
unknown	O
outside	O
of	O
the	O
industry	O
.	O
</s>
<s>
MMX	B-Architecture
,	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
MMX	B-Architecture
,	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
MMX	B-Architecture
,	O
Extended	O
3DNow	O
!,	O
PowerNow	B-Device
!	I-Device
</s>
<s>
MMX	B-Architecture
,	O
Extended	O
3DNow	O
!,	O
PowerNow	B-Device
!	I-Device
</s>
