<s>
The	O
Horus	O
system	O
,	O
designed	O
by	O
Newisys	O
for	O
AMD	O
,	O
was	O
created	O
to	O
enable	O
AMD	B-General_Concept
Opteron	I-General_Concept
machines	O
to	O
extend	O
beyond	O
the	O
current	O
limit	O
of	O
8-way	O
(	O
CPU	B-General_Concept
sockets	O
)	O
architectures	O
.	O
</s>
<s>
The	O
Opteron	B-General_Concept
CPUs	O
feature	O
a	O
cache-coherent	O
HyperTransport	B-Device
(	O
ccHT	O
)	O
bus	O
to	O
permit	O
glueless	O
,	O
multiprocessor	O
interconnect	O
between	O
physical	O
CPU	B-General_Concept
packages	O
but	O
as	O
there	O
is	O
a	O
maximum	O
of	O
three	O
ccHT	O
interfaces	O
per	O
chip	O
,	O
the	O
systems	O
are	O
limited	O
to	O
a	O
maximum	O
of	O
8	O
sockets	O
.	O
</s>
<s>
The	O
HyperTransport	B-Device
bus	O
is	O
also	O
distance	O
restricted	O
and	O
does	O
not	O
permit	O
off-system	O
interconnect	O
.	O
</s>
<s>
The	O
Horus	O
system	O
overcomes	O
these	O
limitations	O
by	O
creating	O
a	O
pseudo-Opteron	O
,	O
the	O
Horus	O
chip	O
,	O
which	O
connects	O
to	O
four	O
real	O
Opterons	B-General_Concept
via	O
the	O
HyperTransport	B-Device
bus	O
.	O
</s>
<s>
As	O
far	O
as	O
the	O
Opterons	B-General_Concept
are	O
concerned	O
they	O
are	O
in	O
a	O
five-way	O
system	O
and	O
this	O
is	O
the	O
basic	O
Horus	O
node	O
(	O
as	O
called	O
'	O
quad	O
 '	O
)	O
.	O
</s>
<s>
The	O
Horus	O
chip	O
then	O
provides	O
an	O
additional	O
off-board	O
interface	O
(	O
based	O
on	O
the	O
InfiniBand	B-Architecture
standards	O
)	O
which	O
can	O
link	O
to	O
additional	O
Horus	O
nodes	O
(	O
up	O
to	O
8	O
)	O
.	O
</s>
<s>
By	O
building	O
the	O
CPUs	O
around	O
the	O
Horus	O
chip	O
with	O
12-bit	O
lanes	O
running	O
at	O
3125MHz	O
with	O
InfiniBand	B-Architecture
technology	O
(	O
8b/10b	B-Protocol
encoding	I-Protocol
)	O
,	O
this	O
system	O
has	O
an	O
effective	O
internal	O
speed	O
of	O
30	O
Gbit/s	O
.	O
</s>
<s>
With	O
8	O
'	O
quads	O
 '	O
connected	O
together	O
,	O
each	O
with	O
the	O
maximum	O
of	O
four	O
Opteron	B-General_Concept
sockets	O
per	O
node	O
,	O
the	O
Horus	O
system	O
allows	O
a	O
total	O
of	O
32	O
CPU	B-General_Concept
sockets	O
in	O
a	O
single	O
machine	O
.	O
</s>
