<s>
AMD	B-Architecture
Accelerated	I-Architecture
Processing	I-Architecture
Unit	I-Architecture
(	O
APU	O
)	O
,	O
formerly	O
known	O
as	O
Fusion	O
,	O
is	O
a	O
series	O
of	O
64-bit	O
microprocessors	B-Architecture
from	O
Advanced	O
Micro	O
Devices	O
(	O
AMD	O
)	O
,	O
combining	O
a	O
general-purpose	O
AMD64	B-Device
central	O
processing	O
unit	O
(	O
CPU	B-Device
)	O
and	O
3D	O
integrated	O
graphics	B-Architecture
processing	I-Architecture
unit	I-Architecture
(	O
IGPU	O
)	O
on	O
a	O
single	O
die	O
.	O
</s>
<s>
Since	O
the	O
launch	O
of	O
the	O
Zen	O
microarchitecture	O
,	O
Ryzen	O
and	O
Athlon	B-Architecture
APUs	O
have	O
released	O
to	O
the	O
global	O
market	O
as	O
Raven	O
Ridge	O
on	O
the	O
DDR4	O
platform	O
,	O
after	O
Bristol	O
Ridge	O
a	O
year	O
prior	O
.	O
</s>
<s>
AMD	O
has	O
also	O
supplied	O
semi-custom	O
APUs	O
for	O
consoles	O
starting	O
with	O
the	O
release	O
of	O
Sony	B-Operating_System
PlayStation	I-Operating_System
4	I-Operating_System
and	O
Microsoft	B-Device
Xbox	I-Device
One	I-Device
eighth	B-Application
generation	I-Application
video	I-Application
game	I-Application
consoles	I-Application
.	O
</s>
<s>
The	O
AMD	B-Architecture
Fusion	I-Architecture
project	O
started	O
in	O
2006	O
with	O
the	O
aim	O
of	O
developing	O
a	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
that	O
combined	O
a	O
CPU	B-Device
with	O
a	O
GPU	B-Architecture
on	O
a	O
single	O
die	O
.	O
</s>
<s>
Reasons	O
contributing	O
to	O
the	O
delay	O
of	O
the	O
project	O
include	O
the	O
technical	O
difficulties	O
of	O
combining	O
a	O
CPU	B-Device
and	O
GPU	B-Architecture
on	O
the	O
same	O
die	O
at	O
a	O
45nm	O
process	O
,	O
and	O
conflicting	O
views	O
on	O
what	O
the	O
role	O
of	O
the	O
CPU	B-Device
and	O
GPU	B-Architecture
should	O
be	O
within	O
the	O
project	O
.	O
</s>
<s>
It	O
featured	O
K10	O
CPU	B-Device
cores	O
and	O
a	O
Radeon	B-Device
HD	I-Device
6000	O
series	O
GPU	B-Architecture
on	O
the	O
same	O
die	O
on	O
the	O
FM1	O
socket	O
.	O
</s>
<s>
An	O
APU	O
for	O
low-power	O
devices	O
was	O
announced	O
as	O
the	O
Brazos	O
platform	O
,	O
based	O
on	O
the	O
Bobcat	O
microarchitecture	O
and	O
a	O
Radeon	B-Device
HD	I-Device
6000	O
series	O
GPU	B-Architecture
on	O
the	O
same	O
die	O
.	O
</s>
<s>
At	O
a	O
conference	O
in	O
January	O
2012	O
,	O
corporate	O
fellow	O
Phil	O
Rogers	O
announced	O
that	O
AMD	O
would	O
re-brand	O
the	O
Fusion	O
platform	O
as	O
the	O
Heterogeneous	B-Architecture
System	I-Architecture
Architecture	I-Architecture
(	O
HSA	B-Architecture
)	O
,	O
stating	O
that	O
"	O
it	O
's	O
only	O
fitting	O
that	O
the	O
name	O
of	O
this	O
evolving	O
architecture	O
and	O
platform	O
be	O
representative	O
of	O
the	O
entire	O
,	O
technical	O
community	O
that	O
is	O
leading	O
the	O
way	O
in	O
this	O
very	O
important	O
area	O
of	O
technology	O
and	O
programming	O
development.	O
"	O
</s>
<s>
It	O
featured	O
Piledriver	O
CPU	B-Device
cores	O
and	O
Radeon	B-Device
HD	I-Device
7000	O
series	O
GPU	B-Architecture
cores	O
on	O
the	O
FM2	O
socket	O
.	O
</s>
<s>
The	O
second	O
generation	O
APU	O
for	O
low-power	O
devices	O
,	O
Brazos	O
2.0	O
,	O
used	O
exactly	O
the	O
same	O
APU	O
chip	O
,	O
but	O
ran	O
at	O
higher	O
clock	O
speed	O
and	O
rebranded	O
the	O
GPU	B-Architecture
as	O
Radeon	B-Device
HD	I-Device
7000	O
series	O
and	O
used	O
a	O
new	O
I/O	O
controller	O
chip	O
.	O
</s>
<s>
Semi-custom	O
chips	O
were	O
introduced	O
in	O
the	O
Microsoft	B-Device
Xbox	I-Device
One	I-Device
and	O
Sony	B-Operating_System
PlayStation	I-Operating_System
4	I-Operating_System
video	B-Application
game	I-Application
consoles	I-Application
,	O
and	O
subsequently	O
in	O
the	O
Microsoft	O
Xbox	O
Series	O
X|S	O
and	O
Sony	B-Device
PlayStation	I-Device
5	I-Device
consoles	O
.	O
</s>
<s>
A	O
third	O
generation	O
of	O
the	O
technology	O
was	O
released	O
on	O
14	O
January	O
2014	O
,	O
featuring	O
greater	O
integration	O
between	O
CPU	B-Device
and	O
GPU	B-Architecture
.	O
</s>
<s>
The	O
desktop	O
and	O
laptop	O
variant	O
is	O
codenamed	O
Kaveri	O
,	O
based	O
on	O
the	O
Steamroller	B-Application
architecture	I-Application
,	O
while	O
the	O
low-power	O
variants	O
,	O
codenamed	O
Kabini	O
and	O
Temash	O
,	O
are	O
based	O
on	O
the	O
Jaguar	O
architecture	O
.	O
</s>
<s>
Since	O
the	O
introduction	O
of	O
Zen-based	O
processors	O
,	O
AMD	O
renamed	O
their	O
APUs	O
as	O
the	O
Ryzen	O
with	O
Radeon	B-Device
Graphics	O
and	O
Athlon	B-Architecture
with	O
Radeon	B-Device
Graphics	O
,	O
with	O
desktop	O
units	O
assigned	O
with	O
G	O
suffix	O
on	O
their	O
model	O
numbers	O
(	O
e.g.	O
</s>
<s>
Ryzen	O
5	O
3400G	O
&	O
Athlon	B-Architecture
3000G	O
)	O
to	O
distinguish	O
them	O
from	O
regular	O
processors	O
or	O
with	O
basic	O
graphics	O
and	O
also	O
to	O
differentiate	O
away	O
from	O
their	O
former	O
Bulldozer	O
era	O
A-series	O
APUs	O
.	O
</s>
<s>
The	O
mobile	O
counterparts	O
were	O
always	O
paired	O
with	O
Radeon	B-Device
Graphics	O
regardless	O
of	O
suffixes	O
.	O
</s>
<s>
In	O
November	O
2017	O
,	O
HP	O
released	O
the	O
Envy	O
x360	O
,	O
featuring	O
the	O
Ryzen	O
5	O
2500U	O
APU	O
,	O
the	O
first	O
4th	O
generation	O
APU	O
,	O
based	O
on	O
the	O
Zen	O
CPU	B-Device
architecture	O
and	O
the	O
Vega	O
graphics	O
architecture	O
.	O
</s>
<s>
AMD	O
is	O
a	O
founding	O
member	O
of	O
the	O
Heterogeneous	B-Architecture
System	I-Architecture
Architecture	I-Architecture
(	O
HSA	B-Architecture
)	O
Foundation	O
and	O
is	O
consequently	O
actively	O
working	O
on	O
developing	O
HSA	B-Architecture
in	O
cooperation	O
with	O
other	O
members	O
.	O
</s>
<s>
Type	O
HSA	B-Architecture
feature	O
First	O
implemented	O
Notes	O
Optimized	O
Platform	O
GPU	B-Architecture
Compute	O
C++	B-Language
Support	O
2012Trinity	O
APUs	O
Support	O
OpenCL	B-Application
C++	B-Language
directions	O
and	O
Microsoft	O
's	O
C++	B-Language
AMP	I-Language
language	O
extension	O
.	O
</s>
<s>
This	O
eases	O
programming	O
of	O
both	O
CPU	B-Device
and	O
GPU	B-Architecture
working	O
together	O
to	O
process	O
support	O
parallel	O
workloads	O
.	O
</s>
<s>
HSA-aware	O
MMU	B-General_Concept
GPU	B-Architecture
can	O
access	O
the	O
entire	O
system	O
memory	O
through	O
the	O
translation	O
services	O
and	O
page	O
fault	O
management	O
of	O
the	O
HSA	B-Architecture
MMU	B-General_Concept
.	O
</s>
<s>
Shared	O
Power	O
Management	O
CPU	B-Device
and	O
GPU	B-Architecture
now	O
share	O
the	O
power	O
budget	O
.	O
</s>
<s>
Architectural	O
Integration	O
Heterogeneous	O
Memory	O
Management	O
:	O
the	O
CPU	B-Device
's	O
MMU	B-General_Concept
and	O
the	O
GPU	B-Architecture
's	O
IOMMU	B-General_Concept
share	O
the	O
same	O
address	O
space	O
.	O
</s>
<s>
2014PlayStation	O
4	O
,	O
Kaveri	O
APUs	O
CPU	B-Device
and	O
GPU	B-Architecture
now	O
access	O
the	O
memory	O
with	O
the	O
same	O
address	O
space	O
.	O
</s>
<s>
Pointers	O
can	O
now	O
be	O
freely	O
passed	O
between	O
CPU	B-Device
and	O
GPU	B-Architecture
,	O
hence	O
enabling	O
zero-copy	O
.	O
</s>
<s>
Fully	O
coherent	B-Operating_System
memory	I-Operating_System
between	O
CPU	B-Device
and	O
GPU	B-Architecture
GPU	B-Architecture
can	O
now	O
access	O
and	O
cache	O
data	O
from	O
coherent	B-Operating_System
memory	I-Operating_System
regions	O
in	O
the	O
system	O
memory	O
,	O
and	O
also	O
reference	O
the	O
data	O
from	O
CPU	B-Device
's	O
cache	O
.	O
</s>
<s>
GPU	B-Architecture
uses	O
pageable	B-Architecture
system	O
memory	O
via	O
CPU	B-Device
pointers	O
GPU	B-Architecture
can	O
take	O
advantage	O
of	O
the	O
shared	O
virtual	O
memory	O
between	O
CPU	B-Device
and	O
GPU	B-Architecture
,	O
and	O
pageable	B-Architecture
system	O
memory	O
can	O
now	O
be	O
referenced	O
directly	O
by	O
the	O
GPU	B-Architecture
,	O
instead	O
of	O
being	O
copied	O
or	O
pinned	O
before	O
accessing	O
.	O
</s>
<s>
System	O
Integration	O
GPU	B-Architecture
compute	O
context	B-Operating_System
switch	I-Operating_System
2015Carrizo	O
APU	O
Compute	O
tasks	O
on	O
GPU	B-Architecture
can	O
be	O
context	O
switched	O
,	O
allowing	O
a	O
multi-tasking	O
environment	O
and	O
also	O
faster	O
interpretation	O
between	O
applications	O
,	O
compute	O
and	O
graphics	O
.	O
</s>
<s>
GPU	B-Architecture
graphics	O
pre-emption	B-Operating_System
Long-running	O
graphics	O
tasks	O
can	O
be	O
pre-empted	O
so	O
processes	O
have	O
low	O
latency	O
access	O
to	O
the	O
GPU	B-Architecture
.	O
</s>
<s>
Quality	O
of	O
service	O
In	O
addition	O
to	O
context	B-Operating_System
switch	I-Operating_System
and	O
pre-emption	B-Operating_System
,	O
hardware	O
resources	O
can	O
be	O
either	O
equalized	O
or	O
prioritized	O
among	O
multiple	O
users	O
and	O
applications	O
.	O
</s>
<s>
AMD	B-Architecture
APUs	I-Architecture
have	O
a	O
unique	O
architecture	O
:	O
they	O
have	O
AMD	O
CPU	B-Device
modules	O
,	O
cache	O
,	O
and	O
a	O
discrete-class	O
graphics	B-Architecture
processor	I-Architecture
,	O
all	O
on	O
the	O
same	O
die	O
using	O
the	O
same	O
bus	O
.	O
</s>
<s>
This	O
architecture	O
allows	O
for	O
the	O
use	O
of	O
graphics	B-Architecture
accelerators	I-Architecture
,	O
such	O
as	O
OpenCL	B-Application
,	O
with	O
the	O
integrated	O
graphics	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
The	O
goal	O
is	O
to	O
create	O
a	O
"	O
fully	O
integrated	O
"	O
APU	O
,	O
which	O
,	O
according	O
to	O
AMD	O
,	O
will	O
eventually	O
feature	O
'	O
heterogeneous	O
cores	O
 '	O
capable	O
of	O
processing	O
both	O
CPU	B-Device
and	O
GPU	B-Architecture
work	O
automatically	O
,	O
depending	O
on	O
the	O
workload	O
requirement	O
.	O
</s>
<s>
DDR3	O
memory	B-General_Concept
controller	I-General_Concept
to	O
arbitrate	O
between	O
coherent	B-Operating_System
and	O
non-coherent	O
memory	O
requests	O
.	O
</s>
<s>
The	O
physical	O
memory	O
is	O
partitioned	O
between	O
the	O
GPU	B-Architecture
(	O
up	O
to	O
512MB	O
)	O
and	O
the	O
CPU	B-Device
(	O
the	O
remainder	O
)	O
.	O
</s>
<s>
It	O
was	O
based	O
on	O
the	O
K10	O
architecture	O
and	O
built	O
on	O
a	O
32nm	O
process	O
featuring	O
two	O
to	O
four	O
CPU	B-Device
cores	O
on	O
a	O
thermal	B-General_Concept
design	I-General_Concept
power	I-General_Concept
(	O
TDP	O
)	O
of	O
65-100W	O
,	O
and	O
integrated	O
graphics	O
based	O
on	O
the	O
Radeon	B-Device
HD6000	O
Series	O
with	O
support	O
for	O
DirectX	B-Application
11	I-Application
,	O
OpenGL	B-Application
4.2	O
and	O
OpenCL	B-Application
1.2	O
.	O
</s>
<s>
In	O
performance	O
comparisons	O
against	O
the	O
similarly	O
priced	O
Intel	B-Device
Core	I-Device
i3-2105	I-Device
,	O
the	O
Llano	O
APU	O
was	O
criticised	O
for	O
its	O
poor	O
CPU	B-Device
performance	O
and	O
praised	O
for	O
its	O
better	O
GPU	B-Architecture
performance	O
.	O
</s>
<s>
DDR3	O
SDRAM	O
memory	B-General_Concept
controller	I-General_Concept
to	O
arbitrate	O
between	O
coherent	B-Operating_System
and	O
non-coherent	O
memory	O
requests	O
.	O
</s>
<s>
The	O
physical	O
memory	O
is	O
partitioned	O
between	O
the	O
GPU	B-Architecture
(	O
up	O
to	O
512MB	O
)	O
and	O
the	O
CPU	B-Device
(	O
the	O
remainder	O
)	O
.	O
</s>
<s>
The	O
AMD	O
Brazos	O
platform	O
was	O
introduced	O
on	O
4	O
January	O
2011	O
,	O
targeting	O
the	O
subnotebook	B-Device
,	O
netbook	B-Device
and	O
low	O
power	O
small	B-Device
form	I-Device
factor	I-Device
markets	O
.	O
</s>
<s>
It	O
features	O
the	O
9-watt	O
AMD	O
C-Series	O
APU	O
(	O
codename	O
:	O
Ontario	B-Architecture
)	O
for	O
netbooks	B-Device
and	O
low	O
power	O
devices	O
as	O
well	O
as	O
the	O
18-watt	O
AMD	O
E-Series	O
APU	O
(	O
codename	O
:	O
Zacate	B-Architecture
)	O
for	O
mainstream	O
and	O
value	O
notebooks	O
,	O
all-in-ones	B-Device
and	O
small	B-Device
form	I-Device
factor	I-Device
desktops	O
.	O
</s>
<s>
Both	O
APUs	O
feature	O
one	O
or	O
two	O
Bobcat	O
x86	O
cores	O
and	O
a	O
Radeon	B-Device
Evergreen	O
Series	O
GPU	B-Architecture
with	O
full	O
DirectX11	O
,	O
DirectCompute	B-Library
and	O
OpenCL	B-Application
support	O
including	O
UVD3	O
video	O
acceleration	O
for	O
HD	O
video	O
including	O
1080p	O
.	O
</s>
<s>
AMD	O
expanded	O
the	O
Brazos	O
platform	O
on	O
5	O
June	O
2011	O
with	O
the	O
announcement	O
of	O
the	O
5.9-watt	O
AMD	O
Z-Series	O
APU	O
(	O
codename	O
:	O
Desna	O
)	O
designed	O
for	O
the	O
Tablet	B-Device
market	O
.	O
</s>
<s>
The	O
Desna	O
APU	O
is	O
based	O
on	O
the	O
9-watt	O
Ontario	B-Architecture
APU	O
.	O
</s>
<s>
Energy	O
savings	O
were	O
achieved	O
by	O
lowering	O
the	O
CPU	B-Device
,	O
GPU	B-Architecture
and	O
northbridge	B-Device
voltages	O
,	O
reducing	O
the	O
idle	O
clocks	O
of	O
the	O
CPU	B-Device
and	O
GPU	B-Architecture
as	O
well	O
as	O
introducing	O
a	O
hardware	O
thermal	O
control	O
mode	O
.	O
</s>
<s>
A	O
bidirectional	O
turbo	B-Device
core	I-Device
mode	O
was	O
also	O
introduced	O
.	O
</s>
<s>
It	O
comprised	O
the	O
4.5-watt	O
AMD	O
Z-Series	O
APU	O
(	O
codenamed	O
Hondo	O
)	O
and	O
the	O
A55T	O
Fusion	O
Controller	O
Hub	O
(	O
FCH	O
)	O
,	O
designed	O
for	O
the	O
tablet	B-Device
computer	I-Device
market	O
.	O
</s>
<s>
AMD	O
lowered	O
energy	O
use	O
by	O
optimizing	O
the	O
APU	O
and	O
FCH	O
for	O
tablet	B-Device
computers	I-Device
.	O
</s>
<s>
Unified	O
Northbridge	B-Device
–	O
includes	O
AMD	B-Device
Turbo	I-Device
Core	I-Device
3.0	O
,	O
which	O
enables	O
automatic	O
bidirectional	O
power	O
management	O
between	O
CPU	B-Device
modules	O
and	O
GPU	B-Architecture
.	O
</s>
<s>
Power	O
to	O
the	O
CPU	B-Device
and	O
GPU	B-Architecture
is	O
controlled	O
automatically	O
by	O
changing	O
the	O
clock	O
rate	O
depending	O
on	O
the	O
load	B-Operating_System
.	O
</s>
<s>
For	O
example	O
,	O
for	O
a	O
non-overclocked	O
A10-5800K	O
APU	O
the	O
CPU	B-Device
frequency	O
can	O
change	O
from	O
1.4GHz	O
to	O
4.2GHz	O
,	O
and	O
the	O
GPU	B-Architecture
frequency	O
can	O
change	O
from	O
304MHz	O
to	O
800MHz	O
.	O
</s>
<s>
In	O
addition	O
,	O
CC6	O
mode	O
is	O
capable	O
of	O
powering	O
down	O
individual	O
CPU	B-Device
cores	O
,	O
while	O
PC6	O
mode	O
is	O
able	O
to	O
lower	O
the	O
power	O
on	O
the	O
entire	O
rail	O
.	O
</s>
<s>
The	O
first	O
iteration	O
of	O
the	O
second	O
generation	O
platform	O
,	O
released	O
in	O
October	O
2012	O
,	O
brought	O
improvements	O
to	O
CPU	B-Device
and	O
GPU	B-Architecture
performance	O
to	O
both	O
desktops	O
and	O
laptops	O
.	O
</s>
<s>
The	O
platform	O
features	O
2	O
to	O
4	O
Piledriver	O
CPU	B-Device
cores	O
built	O
on	O
a	O
32nm	O
process	O
with	O
a	O
TDP	O
between	O
65W	O
and	O
100W	O
,	O
and	O
a	O
GPU	B-Architecture
based	O
on	O
the	O
Radeon	B-Device
HD7000	O
Series	O
with	O
support	O
for	O
DirectX	B-Application
11	I-Application
,	O
OpenGL	B-Application
4.2	O
,	O
and	O
OpenCL	B-Application
1.2	O
.	O
</s>
<s>
The	O
Trinity	O
APU	O
was	O
praised	O
for	O
the	O
improvements	O
to	O
CPU	B-Device
performance	O
compared	O
to	O
the	O
Llano	O
APU	O
.	O
</s>
<s>
Temperature	O
Smart	O
Turbo	B-Device
Core	I-Device
technology	O
.	O
</s>
<s>
An	O
advancement	O
of	O
the	O
existing	O
Turbo	B-Device
Core	I-Device
technology	O
,	O
which	O
allows	O
internal	O
software	O
to	O
adjust	O
the	O
CPU	B-Device
and	O
GPU	B-Architecture
clock	O
speed	O
to	O
maximise	O
performance	O
within	O
the	O
constraints	O
of	O
the	O
Thermal	B-General_Concept
design	I-General_Concept
power	I-General_Concept
of	O
the	O
APU	O
.	O
</s>
<s>
In	O
January	O
2013	O
the	O
Jaguar-based	O
Kabini	O
and	O
Temash	O
APUs	O
were	O
unveiled	O
as	O
the	O
successors	O
of	O
the	O
Bobcat-based	O
Ontario	B-Architecture
,	O
Zacate	B-Architecture
and	O
Hondo	O
APUs	O
.	O
</s>
<s>
The	O
Kabini	O
APU	O
is	O
aimed	O
at	O
the	O
low-power	O
,	O
subnotebook	B-Device
,	O
netbook	B-Device
,	O
ultra-thin	O
and	O
small	B-Device
form	I-Device
factor	I-Device
markets	O
,	O
while	O
the	O
Temash	O
APU	O
is	O
aimed	O
at	O
the	O
tablet	B-Device
,	O
ultra-low	O
power	O
and	O
small	B-Device
form	I-Device
factor	I-Device
markets	O
.	O
</s>
<s>
Kabini	O
and	O
Temash	O
are	O
AMD	O
's	O
first	O
,	O
and	O
also	O
the	O
first	O
ever	O
quad-core	O
x86	O
based	O
SoCs	B-Architecture
.	O
</s>
<s>
Both	O
chips	O
feature	O
DirectX11.1-compliant	O
GCN-based	O
graphics	O
as	O
well	O
as	O
numerous	O
HSA	B-Architecture
improvements	O
.	O
</s>
<s>
They	O
were	O
fabricated	O
at	O
a	O
28nm	O
process	O
in	O
an	O
FT3	O
ball	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
package	O
by	O
Taiwan	O
Semiconductor	O
Manufacturing	O
Company	O
(	O
TSMC	O
)	O
,	O
and	O
were	O
released	O
on	O
23	O
May	O
2013	O
.	O
</s>
<s>
The	B-Operating_System
PlayStation	I-Operating_System
4	I-Operating_System
and	O
Xbox	B-Device
One	I-Device
were	O
revealed	O
to	O
both	O
be	O
powered	O
by	O
8-core	O
semi-custom	O
Jaguar-derived	O
APUs	O
.	O
</s>
<s>
Kaveri	O
contains	O
up	O
to	O
four	O
Steamroller	B-Application
CPU	B-Device
cores	O
clocked	O
to	O
3.9GHz	O
with	O
a	O
turbo	O
mode	O
of	O
4.1GHz	O
,	O
up	O
to	O
a	O
512-core	O
Graphics	B-Architecture
Core	I-Architecture
Next	I-Architecture
GPU	B-Architecture
,	O
two	O
decode	O
units	O
per	O
module	O
instead	O
of	O
one	O
(	O
which	O
allows	O
each	O
core	O
to	O
decode	O
four	O
instructions	O
per	O
cycle	O
instead	O
of	O
two	O
)	O
,	O
AMD	O
TrueAudio	O
,	O
Mantle	B-Application
API	I-Application
,	O
an	O
on-chip	O
ARM	O
Cortex-A5	O
MPCore	O
,	O
and	O
will	O
release	O
with	O
a	O
new	O
socket	O
,	O
FM2+	O
.	O
</s>
<s>
Ian	O
Cutress	O
and	O
Rahul	O
Garg	O
of	O
Anandtech	O
asserted	O
that	O
Kaveri	O
represented	O
the	O
unified	O
system-on-a-chip	B-Architecture
realization	O
of	O
AMD	O
's	O
acquisition	O
of	O
ATI	O
.	O
</s>
<s>
The	O
performance	O
of	O
the	O
45W	O
A8-7600	O
Kaveri	O
APU	O
was	O
found	O
to	O
be	O
similar	O
to	O
that	O
of	O
the	O
100W	O
Richland	O
part	O
,	O
leading	O
to	O
the	O
claim	O
that	O
AMD	O
made	O
significant	O
improvements	O
in	O
on-die	O
graphics	O
performance	O
per	O
watt	O
;	O
however	O
,	O
CPU	B-Device
performance	O
was	O
found	O
to	O
lag	O
behind	O
similarly	O
specified	O
Intel	O
processors	O
,	O
a	O
lag	O
that	O
was	O
unlikely	O
to	O
be	O
resolved	O
in	O
the	O
Bulldozer	O
family	O
APUs	O
.	O
</s>
<s>
The	O
A8-7600	O
component	O
was	O
delayed	O
from	O
a	O
Q1	O
launch	O
to	O
an	O
H1	O
launch	O
because	O
the	O
Steamroller	B-Application
architecture	I-Application
components	O
allegedly	O
did	O
not	O
scale	O
well	O
at	O
higher	O
clock	O
speeds	O
.	O
</s>
<s>
In	O
early-access	O
performance	O
testing	O
of	O
a	O
Kaveri	O
prototype	O
laptop	O
,	O
AnandTech	O
found	O
that	O
the	O
35W	O
FX-7600P	O
was	O
competitive	O
with	O
the	O
similarly	O
priced	O
17W	O
Intel	O
i7-4500U	O
in	O
synthetic	O
CPU-focused	O
benchmarks	O
,	O
and	O
was	O
significantly	O
better	O
than	O
previous	O
integrated	O
GPU	B-Architecture
systems	O
on	O
GPU-focused	O
benchmarks	O
.	O
</s>
<s>
Tom	O
's	O
Hardware	O
reported	O
the	O
performance	O
of	O
the	O
Kaveri	O
FX-7600P	O
against	O
the	O
35W	O
Intel	B-Device
i7-4702MQ	I-Device
,	O
finding	O
that	O
the	O
i7-4702MQ	O
was	O
significantly	O
better	O
than	O
the	O
FX-7600P	O
in	O
synthetic	O
CPU-focused	O
benchmarks	O
,	O
whereas	O
the	O
FX-7600P	O
was	O
significantly	O
better	O
than	O
the	O
i7-4702MQ	O
'	O
s	O
Intel	B-Application
HD	I-Application
4600	I-Application
iGPU	O
in	O
the	O
four	O
games	O
that	O
could	O
be	O
tested	O
in	O
the	O
time	O
available	O
to	O
the	O
team	O
.	O
</s>
