<s>
AArch64	B-Architecture
or	O
ARM64	B-Architecture
is	O
the	O
64-bit	O
extension	O
of	O
the	O
ARM	B-Architecture
architecture	I-Architecture
family	I-Architecture
.	O
</s>
<s>
Announced	O
in	O
October	O
2011	O
,	O
ARMv8-A	O
represents	O
a	O
fundamental	O
change	O
to	O
the	O
ARM	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
It	O
adds	O
an	O
optional	O
64-bit	O
architecture	O
,	O
named	O
"	O
AArch64	B-Architecture
"	O
,	O
and	O
the	O
associated	O
new	O
"	O
A64	O
"	O
instruction	O
set	O
.	O
</s>
<s>
AArch64	B-Architecture
provides	O
user-space	B-Operating_System
compatibility	O
with	O
the	O
existing	O
32-bit	O
architecture	O
(	O
"	O
AArch32	O
"	O
/	O
ARMv7-A	O
)	O
,	O
and	O
instruction	O
set	O
(	O
"	O
A32	O
"	O
)	O
.	O
</s>
<s>
ARMv8-A	O
allows	O
32-bit	O
applications	O
to	O
be	O
executed	O
in	O
a	O
64-bit	O
OS	O
,	O
and	O
a	O
32-bit	O
OS	O
to	O
be	O
under	O
the	O
control	O
of	O
a	O
64-bit	O
hypervisor	B-Operating_System
.	O
</s>
<s>
Apple	O
was	O
the	O
first	O
to	O
release	O
an	O
ARMv8-A	O
compatible	O
core	O
(	O
Cyclone	O
)	O
in	O
a	O
consumer	O
product	O
(	O
iPhone	B-Operating_System
5S	I-Operating_System
)	O
.	O
</s>
<s>
AppliedMicro	O
,	O
using	O
an	O
FPGA	B-Architecture
,	O
was	O
the	O
first	O
to	O
demo	O
ARMv8-A	O
.	O
</s>
<s>
The	O
first	O
ARMv8-A	O
SoC	B-Architecture
from	O
Samsung	O
is	O
the	O
Exynos	O
5433	O
used	O
in	O
the	O
Galaxy	B-Operating_System
Note	I-Operating_System
4	I-Operating_System
,	O
which	O
features	O
two	O
clusters	O
of	O
four	O
Cortex-A57	O
and	O
Cortex-A53	O
cores	O
in	O
a	O
big.LITTLE	B-Architecture
configuration	O
;	O
but	O
it	O
will	O
run	O
only	O
in	O
AArch32	O
mode	O
.	O
</s>
<s>
To	O
both	O
AArch32	O
and	O
AArch64	B-Architecture
,	O
ARMv8-A	O
makes	O
VFPv3/v4	O
and	O
advanced	O
SIMD	B-Device
(	O
Neon	O
)	O
standard	O
.	O
</s>
<s>
It	O
also	O
adds	O
cryptography	O
instructions	O
supporting	O
AES	B-Algorithm
,	O
SHA-1/SHA	O
-256	O
and	O
finite	O
field	O
arithmetic	O
.	O
</s>
<s>
No	O
predication	B-General_Concept
for	O
most	O
instructions	O
(	O
except	O
branches	O
)	O
.	O
</s>
<s>
AES	B-Algorithm
encrypt/decrypt	O
and	O
SHA-1/SHA	O
-2	O
hashing	O
instructions	O
also	O
use	O
these	O
registers	O
.	O
</s>
<s>
AArch64	B-Architecture
was	O
introduced	O
in	O
ARMv8-A	O
and	O
is	O
included	O
in	O
subsequent	O
versions	O
of	O
ARMv8-A	O
.	O
</s>
<s>
A	O
set	O
of	O
AArch64	B-Architecture
atomic	O
read-write	O
instructions	O
.	O
</s>
<s>
Additions	O
to	O
the	O
Advanced	O
SIMD	B-Device
instruction	O
set	O
for	O
both	O
AArch32	O
and	O
AArch64	B-Architecture
to	O
enable	O
opportunities	O
for	O
some	O
library	O
optimizations	O
:	O
</s>
<s>
A	O
set	O
of	O
AArch64	B-Architecture
load	O
and	O
store	O
instructions	O
that	O
can	O
provide	O
memory	O
access	O
order	O
that	O
is	O
limited	O
to	O
configurable	O
address	O
regions	O
.	O
</s>
<s>
These	O
enhancements	O
improve	O
the	O
performance	O
of	O
Type	O
2	O
hypervisors	B-Operating_System
by	O
reducing	O
the	O
software	O
overhead	O
associated	O
when	O
transitioning	O
between	O
the	O
Host	O
and	O
Guest	O
operating	O
systems	O
.	O
</s>
<s>
The	O
Scalable	O
Vector	O
Extension	O
(	O
SVE	O
)	O
is	O
"	O
an	O
optional	O
extension	O
to	O
the	O
ARMv8.2-A	O
architecture	O
and	O
newer	O
"	O
developed	O
specifically	O
for	O
vectorization	O
of	O
high-performance	B-Architecture
computing	I-Architecture
scientific	O
workloads	O
.	O
</s>
<s>
A	O
512-bit	O
SVE	O
variant	O
has	O
already	O
been	O
implemented	O
on	O
the	O
Fugaku	B-Device
supercomputer	I-Device
using	O
the	O
Fujitsu	B-Device
A64FX	I-Device
ARM	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
It	O
aims	O
to	O
be	O
the	O
world	O
's	O
highest-performing	O
supercomputer	B-Architecture
with	O
"	O
the	O
goal	O
of	O
beginning	O
full	O
operations	O
around	O
2021.	O
"	O
</s>
<s>
A	O
more	O
flexible	O
version	O
,	O
2x256	O
SVE	O
,	O
was	O
implemented	O
by	O
the	O
AWS	O
Graviton3	O
ARM	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
SVE	O
is	O
supported	O
by	O
the	O
GCC	B-Application
compiler	I-Application
,	O
with	O
GCC	B-Application
8	O
supporting	O
automatic	O
vectorization	O
and	O
GCC	B-Application
10	O
supporting	O
C	O
intrinsics	O
.	O
</s>
<s>
As	O
of	O
July	O
2020	O
,	O
LLVM	B-Application
and	O
clang	B-Application
support	O
C	O
and	O
IR	O
intrinsics	O
.	O
</s>
<s>
ARM	O
's	O
own	O
fork	O
of	O
LLVM	B-Application
supports	O
auto-vectorization	O
.	O
</s>
<s>
Pointer	O
authentication	O
(	O
AArch64	B-Architecture
only	O
)	O
;	O
mandatory	O
extension	O
(	O
based	O
on	O
a	O
new	O
block	O
cipher	O
,	O
QARMA	B-Algorithm
)	O
to	O
the	O
architecture	O
(	O
compilers	O
need	O
to	O
exploit	O
the	O
security	O
feature	O
,	O
but	O
as	O
the	O
instructions	O
are	O
in	O
NOP	O
space	O
,	O
they	O
are	O
backwards	O
compatible	O
albeit	O
providing	O
no	O
extra	O
security	O
on	O
older	O
chips	O
)	O
.	O
</s>
<s>
Advanced	O
SIMD	B-Device
complex	O
number	O
support	O
(	O
AArch64	B-Architecture
and	O
AArch32	O
)	O
;	O
e.g.	O
</s>
<s>
New	O
FJCVTZS	O
(	O
Floating-point	O
JavaScript	B-Language
Convert	O
to	O
Signed	O
fixed-point	O
,	O
rounding	O
toward	O
Zero	O
)	O
instruction	O
.	O
</s>
<s>
A	O
change	O
to	O
the	O
memory	O
consistency	O
model	O
(	O
AArch64	B-Architecture
only	O
)	O
;	O
to	O
support	O
the	O
(	O
non-default	O
)	O
weaker	O
RCpc	O
(	O
Release	O
Consistent	O
processor	O
consistent	O
)	O
model	O
of	O
C++	O
11/C11	O
(	O
the	O
default	O
C++	O
11/C11	O
consistency	O
model	O
was	O
already	O
supported	O
in	O
previous	O
ARMv8	O
)	O
.	O
</s>
<s>
ARMv8.3-A	O
architecture	O
is	O
now	O
supported	O
by	O
(	O
at	O
least	O
)	O
the	O
GCC	B-Application
7	O
compiler	O
.	O
</s>
<s>
On	O
2	O
August	O
2019	O
,	O
Google	B-Application
announced	O
Android	B-Application
would	O
adopt	O
Memory	O
Tagging	O
Extension	O
(	O
MTE	O
)	O
.	O
</s>
<s>
SVE2	O
builds	O
on	O
SVE	O
's	O
scalable	O
vectorization	O
for	O
increased	O
fine-grain	O
Data	B-Operating_System
Level	I-Operating_System
Parallelism	I-Operating_System
(	O
DLP	O
)	O
,	O
to	O
allow	O
more	O
work	O
done	O
per	O
instruction	O
.	O
</s>
<s>
SVE2	O
aims	O
to	O
bring	O
these	O
benefits	O
to	O
a	O
wider	O
range	O
of	O
software	O
including	O
DSP	O
and	O
multimedia	O
SIMD	B-Device
code	O
that	O
currently	O
use	O
Neon	O
.	O
</s>
<s>
The	O
LLVM/Clang	O
9.0	O
and	O
GCC	B-Application
10.0	O
development	O
codes	O
were	O
updated	O
to	O
support	O
SVE2	O
.	O
</s>
<s>
Transactional	B-Operating_System
Memory	I-Operating_System
Extension	O
(	O
TME	O
)	O
.	O
</s>
<s>
Following	O
the	B-Operating_System
x86	I-Operating_System
extensions	I-Operating_System
,	O
TME	O
brings	O
support	O
for	O
Hardware	B-Operating_System
Transactional	I-Operating_System
Memory	I-Operating_System
(	O
HTM	O
)	O
and	O
Transactional	O
Lock	O
Elision	O
(	O
TLE	O
)	O
.	O
</s>
<s>
TME	O
aims	O
to	O
bring	O
scalable	O
concurrency	O
to	O
increase	O
coarse-grained	O
Thread	B-Operating_System
Level	I-Operating_System
Parallelism	I-Operating_System
(	O
TLP	O
)	O
,	O
to	O
allow	O
more	O
work	O
done	O
per	O
thread	O
.	O
</s>
<s>
The	O
LLVM/Clang	O
9.0	O
and	O
GCC	B-Application
10.0	O
development	O
codes	O
were	O
updated	O
to	O
support	O
TME	O
.	O
</s>
<s>
and	O
the	O
following	O
extensions	O
(	O
that	O
LLVM	B-Application
11	O
already	O
added	O
support	O
for	O
)	O
:	O
</s>
<s>
LLVM	B-Application
15	O
supports	O
ARMv8.8-A	O
and	O
ARMv9.3-A	O
.	O
</s>
<s>
Optional	O
AArch64	B-Architecture
support	O
was	O
added	O
to	O
the	O
Armv8-R	O
profile	O
,	O
with	O
the	O
first	O
Arm	O
core	O
implementing	O
it	O
being	O
the	O
Cortex-R82	O
.	O
</s>
