<s>
In	O
computing	O
,	O
the	O
term	O
3	B-Device
GB	I-Device
barrier	I-Device
refers	O
to	O
a	O
limitation	O
of	O
some	O
32-bit	O
operating	B-General_Concept
systems	I-General_Concept
running	O
on	O
x86	B-Operating_System
microprocessors	I-Operating_System
.	O
</s>
<s>
It	O
prevents	O
the	O
operating	B-General_Concept
systems	I-General_Concept
from	O
using	O
all	O
of	O
4GiB	O
(	O
)	O
of	O
main	O
memory	B-General_Concept
.	O
</s>
<s>
The	O
exact	O
barrier	O
varies	O
by	O
motherboard	B-Device
and	O
I/O	O
device	O
configuration	O
,	O
particularly	O
the	O
size	O
of	O
video	O
RAM	O
;	O
it	O
may	O
be	O
in	O
the	O
range	O
of	O
2.75	O
GB	O
to	O
3.5	O
GB	O
.	O
</s>
<s>
The	O
barrier	O
is	O
not	O
present	O
with	O
a	O
64-bit	B-Device
processor	I-Device
and	O
64-bit	B-Device
operating	B-General_Concept
system	I-General_Concept
,	O
or	O
with	O
certain	O
x86	B-Operating_System
hardware	O
and	O
an	O
operating	B-General_Concept
system	I-General_Concept
such	O
as	O
Linux	B-Operating_System
or	O
certain	O
versions	O
of	O
Windows	B-Device
Server	I-Device
and	O
macOS	B-Application
that	O
allow	O
use	O
of	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
(	O
PAE	O
)	O
mode	O
on	O
x86	B-Operating_System
to	O
access	O
more	O
than	O
4GiB	O
of	O
RAM	O
.	O
</s>
<s>
Whatever	O
the	O
actual	O
position	O
of	O
the	O
"	O
barrier	O
"	O
,	O
there	O
is	O
no	O
code	O
in	O
operating	B-General_Concept
system	I-General_Concept
software	O
nor	O
any	O
hardware	O
architectural	O
limit	O
that	O
directly	O
imposes	O
it	O
.	O
</s>
<s>
Many	O
32-bit	O
computers	O
have	O
32	O
physical	B-General_Concept
address	I-General_Concept
bits	O
and	O
are	O
thus	O
limited	O
to	O
4GiB	O
(	O
232	O
words	O
)	O
of	O
memory	B-General_Concept
.	O
</s>
<s>
x86	B-Operating_System
processors	O
prior	O
to	O
the	O
Pentium	B-Device
Pro	I-Device
have	O
32	O
or	O
fewer	O
physical	B-General_Concept
address	I-General_Concept
bits	O
;	O
however	O
,	O
most	O
x86	B-Operating_System
processors	O
since	O
the	O
Pentium	B-Device
Pro	I-Device
,	O
which	O
was	O
first	O
sold	O
in	O
1995	O
,	O
have	O
the	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
(	O
PAE	O
)	O
mechanism	O
,	O
which	O
allows	O
addressing	O
up	O
to	O
64GiB	O
(	O
236	O
words	O
)	O
of	O
memory	B-General_Concept
.	O
</s>
<s>
PAE	O
is	O
a	O
modification	O
of	O
the	O
protected	B-Application
mode	I-Application
address	O
translation	O
scheme	O
which	O
allows	O
virtual	O
or	O
linear	O
addresses	O
to	O
be	O
translated	O
to	O
36-bit	O
physical	O
addresses	O
,	O
instead	O
of	O
the	O
32-bit	O
addresses	O
available	O
without	O
PAE	O
.	O
</s>
<s>
The	O
CPU	O
pinouts	O
likewise	O
provide	O
36	O
bits	O
of	O
physical	B-General_Concept
address	I-General_Concept
lines	O
to	O
the	O
motherboard	B-Device
.	O
</s>
<s>
Many	O
x86	B-Operating_System
operating	B-General_Concept
systems	I-General_Concept
,	O
including	O
any	O
version	O
of	O
Linux	B-Operating_System
with	O
a	O
PAE	O
kernel	B-Operating_System
and	O
some	O
versions	O
of	O
Windows	B-Device
Server	I-Device
and	O
macOS	B-Application
,	O
can	O
use	O
PAE	O
to	O
address	O
up	O
to	O
64GiB	O
of	O
memory	B-General_Concept
on	O
an	O
x86	B-Operating_System
system	O
.	O
</s>
<s>
There	O
are	O
other	O
factors	O
that	O
may	O
limit	O
this	O
ability	O
to	O
use	O
up	O
to	O
64	O
GiB	O
of	O
memory	B-General_Concept
,	O
and	O
lead	O
to	O
the	O
"	O
3	B-Device
GB	I-Device
barrier	I-Device
"	O
under	O
certain	O
circumstances	O
,	O
even	O
on	O
processors	O
that	O
implement	O
PAE	O
.	O
</s>
<s>
Although	O
,	O
as	O
noted	O
above	O
,	O
most	O
x86	B-Operating_System
processors	O
from	O
the	O
Pentium	B-Device
Pro	I-Device
onward	O
are	O
able	O
to	O
generate	O
physical	O
addresses	O
up	O
to	O
64GiB	O
,	O
the	O
rest	O
of	O
the	O
motherboard	B-Device
must	O
participate	O
in	O
allowing	O
RAM	O
above	O
the	O
4GiB	O
point	O
to	O
be	O
addressed	O
by	O
the	O
CPU	O
.	O
</s>
<s>
Chipsets	B-Device
and	O
motherboards	B-Device
allowing	O
more	O
than	O
4GiB	O
of	O
RAM	O
with	O
x86	B-Operating_System
processors	O
do	O
exist	O
,	O
but	O
in	O
the	O
past	O
,	O
most	O
of	O
those	O
intended	O
for	O
other	O
than	O
the	O
high-end	O
server	O
market	O
could	O
access	O
only	O
4GiB	O
of	O
RAM	O
.	O
</s>
<s>
This	O
,	O
however	O
,	O
is	O
not	O
sufficient	O
to	O
explain	O
the	O
"	O
3GB	B-Device
barrier	I-Device
"	O
that	O
appears	O
even	O
when	O
running	O
some	O
x86	B-Operating_System
versions	O
of	O
Microsoft	O
Windows	O
on	O
platforms	O
that	O
can	O
access	O
more	O
than	O
4GiB	O
of	O
RAM	O
.	O
</s>
<s>
Modern	O
personal	O
computers	O
are	O
built	O
around	O
a	O
set	O
of	O
standards	O
that	O
depend	O
on	O
,	O
among	O
other	O
things	O
,	O
the	O
characteristics	O
of	O
the	O
original	O
PCI	B-Protocol
bus	I-Protocol
.	O
</s>
<s>
The	O
original	O
PCI	B-Protocol
bus	I-Protocol
implemented	O
32-bit	O
physical	O
addresses	O
and	O
32-bit-wide	O
data	O
transfers	O
.	O
</s>
<s>
PCI	B-Protocol
(	O
and	O
PCI	B-Protocol
Express	O
and	O
AGP	B-Architecture
)	O
devices	O
present	O
at	O
least	O
some	O
,	O
if	O
not	O
all	O
,	O
of	O
their	O
host	O
control	O
interfaces	O
via	O
a	O
set	O
of	O
memory-mapped	B-Architecture
I/O	I-Architecture
locations	O
(	O
MMIO	B-Architecture
)	O
.	O
</s>
<s>
The	O
address	O
space	O
in	O
which	O
these	O
MMIO	B-Architecture
locations	O
appear	O
is	O
the	O
same	O
address	O
space	O
as	O
that	O
used	O
by	O
RAM	O
,	O
and	O
while	O
RAM	O
can	O
exist	O
and	O
be	O
addressable	O
above	O
the	O
4GiB	O
point	O
,	O
these	O
MMIO	B-Architecture
locations	O
decoded	O
by	O
I/O	O
devices	O
cannot	O
be	O
.	O
</s>
<s>
They	O
are	O
limited	O
by	O
PCI	B-Protocol
bus	I-Protocol
specifications	O
to	O
addresses	O
of	O
0xFFFFFFFF	O
(	O
232	O
−	O
1	O
)	O
and	O
below	O
.	O
</s>
<s>
With	O
4GiB	O
or	O
more	O
of	O
RAM	O
installed	O
,	O
and	O
with	O
RAM	O
occupying	O
a	O
contiguous	O
range	O
of	O
addresses	O
starting	O
at	O
0	O
,	O
some	O
of	O
the	O
MMIO	B-Architecture
locations	O
will	O
overlap	O
with	O
RAM	O
addresses	O
.	O
</s>
<s>
On	O
machines	O
with	O
large	O
amounts	O
of	O
video	O
memory	B-General_Concept
,	O
MMIO	B-Architecture
locations	O
have	O
been	O
found	O
to	O
occupy	O
as	O
much	O
as	O
1.8GB	O
of	O
the	O
32-bit	O
address	O
space	O
.	O
</s>
<s>
The	O
BIOS	B-Operating_System
and	O
chipset	B-Device
are	O
responsible	O
for	O
detecting	O
these	O
address	O
conflicts	O
and	O
disabling	O
access	O
to	O
the	O
RAM	O
at	O
those	O
locations	O
.	O
</s>
<s>
Due	O
to	O
the	O
way	O
bus	O
address	O
ranges	O
are	O
determined	O
on	O
the	O
PCI	B-Protocol
bus	I-Protocol
,	O
this	O
disabling	O
is	O
often	O
at	O
a	O
relatively	O
large	O
granularity	O
,	O
resulting	O
in	O
relatively	O
large	O
amounts	O
of	O
RAM	O
being	O
disabled	O
.	O
</s>
<s>
x86	B-Operating_System
chipsets	B-Device
that	O
can	O
address	O
more	O
than	O
4GiB	O
of	O
RAM	O
typically	O
also	O
allow	O
memory	B-General_Concept
remapping	O
(	O
referred	O
to	O
in	O
some	O
BIOS	B-Operating_System
setup	O
screens	O
as	O
"	O
memory	B-General_Concept
hole	I-General_Concept
remapping	O
"	O
)	O
.	O
</s>
<s>
In	O
this	O
scheme	O
,	O
the	O
BIOS	B-Operating_System
detects	O
the	O
memory	B-General_Concept
address	O
conflict	O
and	O
in	O
effect	O
relocates	O
the	O
interfering	O
RAM	O
so	O
that	O
it	O
may	O
be	O
addressed	O
by	O
the	O
processor	O
at	O
a	O
new	O
physical	B-General_Concept
address	I-General_Concept
that	O
does	O
not	O
conflict	O
with	O
MMIO	B-Architecture
.	O
</s>
<s>
On	O
the	O
Intel	O
side	O
,	O
this	O
feature	O
once	O
was	O
limited	O
to	O
server	O
chipsets	B-Device
;	O
however	O
,	O
newer	O
desktop	O
chipsets	B-Device
like	O
the	O
Intel	O
955X	O
and	O
965	O
and	O
later	O
have	O
it	O
as	O
well	O
.	O
</s>
<s>
On	O
the	O
AMD	O
side	O
,	O
the	O
AMD	B-Device
K8	I-Device
and	O
later	O
processors	O
 '	O
built-in	O
memory	B-General_Concept
controller	O
had	O
it	O
from	O
the	O
beginning	O
.	O
</s>
<s>
As	O
the	O
new	O
physical	O
addresses	O
are	O
above	O
the	O
4GiB	O
point	O
,	O
addressing	O
this	O
RAM	O
does	O
require	O
that	O
the	O
operating	B-General_Concept
system	I-General_Concept
be	O
able	O
to	O
use	O
physical	O
addresses	O
larger	O
than	O
232	O
.	O
</s>
<s>
Note	O
that	O
there	O
is	O
not	O
necessarily	O
a	O
requirement	O
for	O
the	O
operating	B-General_Concept
system	I-General_Concept
to	O
support	O
more	O
than	O
4GiB	O
total	O
of	O
RAM	O
,	O
as	O
the	O
total	O
RAM	O
might	O
be	O
only	O
4GiB	O
;	O
it	O
is	O
just	O
that	O
a	O
portion	O
of	O
it	O
appears	O
to	O
the	O
CPU	O
at	O
addresses	O
in	O
the	O
range	O
from	O
4GiB	O
and	O
up	O
.	O
</s>
<s>
This	O
form	O
of	O
the	O
3GB	B-Device
barrier	I-Device
affects	O
one	O
generation	O
of	O
MacBooks	B-Device
,	O
lasting	O
1	O
year	O
(	O
Core2Duo	O
(	O
Merom	O
)	O
–	O
November	O
2006	O
to	O
October	O
2007	O
)	O
:	O
the	O
prior	O
generation	O
was	O
limited	O
to	O
2GiB	O
,	O
while	O
later	O
generations	O
(	O
November	O
2007	O
–	O
October	O
2009	O
)	O
allowed	O
4GiB	O
through	O
the	O
use	O
of	O
PAE	O
and	O
memory-hole	O
remapping	O
,	O
and	O
subsequent	O
generations	O
(	O
late	O
2009	O
onwards	O
)	O
use	O
64-bit	B-Device
processors	I-Device
and	O
therefore	O
can	O
address	O
over	O
4GiB	O
.	O
</s>
<s>
The	O
"	O
non-server	O
"	O
,	O
or	O
"	O
client	O
"	O
,	O
x86	B-Operating_System
SKUs	O
of	O
Windows	B-Application
XP	I-Application
and	O
later	O
operate	O
x86	B-Operating_System
processors	O
in	O
PAE	O
mode	O
by	O
default	O
when	O
the	O
CPU	O
present	O
implements	O
the	O
NX	B-General_Concept
bit	I-General_Concept
.	O
</s>
<s>
Nevertheless	O
,	O
these	O
operating	B-General_Concept
systems	I-General_Concept
do	O
not	O
permit	O
addressing	O
of	O
physical	O
memory	B-General_Concept
above	O
the	O
4GiB	O
address	O
boundary	O
.	O
</s>
<s>
This	O
is	O
not	O
an	O
architectural	O
limit	O
;	O
it	O
is	O
a	O
limit	O
imposed	O
by	O
Microsoft	O
as	O
a	O
workaround	B-Application
for	O
device	B-Application
driver	I-Application
compatibility	O
issues	O
that	O
were	O
discovered	O
during	O
testing	O
.	O
</s>
<s>
Thus	O
,	O
the	O
"	O
3GB	B-Device
barrier	I-Device
"	O
under	O
x86	B-Operating_System
Windows	O
"	O
client	O
"	O
operating	B-General_Concept
systems	I-General_Concept
can	O
therefore	O
arise	O
in	O
two	O
slightly	O
different	O
scenarios	O
.	O
</s>
<s>
In	O
both	O
,	O
RAM	O
near	O
the	O
4GiB	O
point	O
conflicts	O
with	O
memory-mapped	B-Architecture
I/O	I-Architecture
space	O
.	O
</s>
<s>
Either	O
the	O
BIOS	B-Operating_System
simply	O
disables	O
the	O
conflicting	O
RAM	O
;	O
or	O
,	O
the	O
BIOS	B-Operating_System
remaps	O
the	O
conflicting	O
RAM	O
to	O
physical	O
addresses	O
above	O
the	O
4GiB	O
point	O
,	O
but	O
x86	B-Operating_System
Windows	O
client	O
editions	O
refuse	O
to	O
use	O
physical	O
addresses	O
higher	O
than	O
that	O
,	O
even	O
though	O
they	O
are	O
running	O
with	O
PAE	O
enabled	O
.	O
</s>
<s>
The	O
conflicting	O
RAM	O
is	O
therefore	O
unavailable	O
to	O
the	O
operating	B-General_Concept
system	I-General_Concept
whether	O
it	O
is	O
remapped	O
or	O
not	O
.	O
</s>
