<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
is	O
a	O
deprecated	O
extension	O
to	O
the	O
x86	B-Operating_System
instruction	B-General_Concept
set	I-General_Concept
developed	O
by	O
Advanced	O
Micro	O
Devices	O
(	O
AMD	O
)	O
.	O
</s>
<s>
It	O
adds	O
single	B-Device
instruction	I-Device
multiple	I-Device
data	I-Device
(	O
SIMD	B-Device
)	O
instructions	O
to	O
the	O
base	O
x86	B-Operating_System
instruction	B-General_Concept
set	I-General_Concept
,	O
enabling	O
it	O
to	O
perform	O
vector	B-Operating_System
processing	I-Operating_System
of	O
floating-point	B-Algorithm
vector	O
operations	O
using	O
vector	O
registers	O
,	O
which	O
improves	O
the	O
performance	O
of	O
many	O
graphics-intensive	O
applications	O
.	O
</s>
<s>
The	O
first	O
microprocessor	O
to	O
implement	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
However	O
,	O
the	O
instruction	B-General_Concept
set	I-General_Concept
never	O
gained	O
much	O
popularity	O
,	O
and	O
AMD	O
announced	O
on	O
August	O
2010	O
that	O
support	O
for	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
Realtime	O
display	O
of	O
3D	O
graphics	O
depended	O
heavily	O
on	O
the	O
host	O
CPU	O
's	O
floating-point	B-Algorithm
unit	O
(	O
FPU	O
)	O
to	O
perform	O
floating-point	B-Algorithm
calculations	O
,	O
a	O
task	O
in	O
which	O
AMD	O
's	O
K6	B-Architecture
processor	I-Architecture
was	O
easily	O
outperformed	O
by	O
its	O
competitor	O
,	O
the	O
Intel	O
Pentium	O
II	O
.	O
</s>
<s>
As	O
an	O
enhancement	O
to	O
the	O
MMX	B-Architecture
instruction	B-General_Concept
set	I-General_Concept
,	O
the	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instruction-set	O
augmented	O
the	O
MMX	B-Architecture
SIMD	B-Device
registers	O
to	O
support	O
common	O
arithmetic	O
operations	O
(	O
add/subtract/multiply	O
)	O
on	O
single-precision	O
(	O
32-bit	O
)	O
floating-point	B-Algorithm
data	O
.	O
</s>
<s>
Software	O
written	O
to	O
use	O
AMD	O
's	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instead	O
of	O
the	O
slower	O
x87	B-Application
FPU	I-Application
could	O
execute	O
up	O
to	O
four	O
times	O
faster	O
,	O
depending	O
on	O
the	O
instruction	O
mix	O
.	O
</s>
<s>
The	O
first	O
implementation	O
of	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
technology	O
contains	O
21	O
new	O
instructions	O
that	O
support	O
SIMD	B-Device
floating-point	B-Algorithm
operations	O
.	O
</s>
<s>
The	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
data	O
format	O
is	O
packed	O
,	O
single-precision	O
,	O
floating-point	B-Algorithm
.	O
</s>
<s>
The	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instruction	B-General_Concept
set	I-General_Concept
also	O
includes	O
operations	O
for	O
SIMD	B-Device
integer	O
operations	O
,	O
data	O
prefetch	O
,	O
and	O
faster	O
MMX-to-floating-point	O
switching	O
.	O
</s>
<s>
Later	O
,	O
Intel	O
would	O
add	O
similar	O
(	O
but	O
incompatible	O
)	O
instructions	O
to	O
the	O
Pentium	B-General_Concept
III	I-General_Concept
,	O
known	O
as	O
SSE	B-General_Concept
(	O
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
)	O
.	O
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
floating-point	B-Algorithm
instructions	O
are	O
the	O
following	O
:	O
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
There	O
is	O
little	O
or	O
no	O
evidence	O
that	O
the	O
second	O
version	O
of	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
This	O
has	O
led	O
to	O
some	O
confusion	O
in	O
documentation	O
that	O
refers	O
to	O
this	O
new	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
The	O
most	O
common	O
terms	O
are	O
Extended	O
3DNow	O
!,	O
Enhanced	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
and	O
3DNow	B-General_Concept
!	I-General_Concept
+	O
.	O
</s>
<s>
The	O
phrase	O
"	O
Enhanced	O
3DNow	B-General_Concept
!	I-General_Concept
"	O
</s>
<s>
can	O
be	O
found	O
in	O
a	O
few	O
locations	O
on	O
the	O
AMD	O
website	O
but	O
the	O
capitalization	O
of	O
"	O
Enhanced	O
"	O
appears	O
to	O
be	O
either	O
purely	O
grammatical	O
or	O
used	O
for	O
emphasis	O
on	O
processors	O
that	O
may	O
or	O
may	O
not	O
have	O
these	O
extensions	O
(	O
the	O
most	O
notable	O
of	O
which	O
references	O
a	O
benchmark	O
page	O
for	O
the	O
K6-III-P	O
that	O
does	O
not	O
have	O
these	O
extensions	O
)	O
.	O
</s>
<s>
This	O
extension	O
to	O
the	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instruction	B-General_Concept
set	I-General_Concept
was	O
introduced	O
with	O
the	O
first-generation	O
Athlon	B-Architecture
processors	O
.	O
</s>
<s>
The	O
Athlon	B-Architecture
added	O
five	O
new	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instructions	O
and	O
19	O
new	O
MMX	B-Architecture
instructions	O
.	O
</s>
<s>
Later	O
,	O
the	O
K6-2	B-Architecture
+	I-Architecture
and	O
K6-III	B-Architecture
+	I-Architecture
(	O
both	O
targeted	O
at	O
the	O
mobile	O
market	O
)	O
included	O
the	O
five	O
new	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instructions	O
,	O
leaving	O
out	O
the	O
19	O
new	O
MMX	B-Architecture
instructions	O
.	O
</s>
<s>
The	O
new	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instructions	O
were	O
added	O
to	O
boost	O
DSP	B-General_Concept
.	O
</s>
<s>
The	O
new	O
MMX	B-Architecture
instructions	O
were	O
added	O
to	O
boost	O
streaming	O
media	O
.	O
</s>
<s>
The	O
19	O
new	O
MMX	B-Architecture
instructions	O
are	O
a	O
subset	O
of	O
Intel	O
's	O
SSE1	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
In	O
AMD	O
technical	O
manuals	O
,	O
AMD	O
segregates	O
these	O
instructions	O
apart	O
from	O
the	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
In	O
AMD	O
customer	O
product	O
literature	O
,	O
however	O
,	O
this	O
segregation	O
is	O
less	O
clear	O
where	O
the	O
benefits	O
of	O
all	O
24	O
new	O
instructions	O
are	O
credited	O
to	O
enhanced	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
This	O
has	O
led	O
programmers	O
to	O
come	O
up	O
with	O
their	O
own	O
name	O
for	O
the	O
19	O
new	O
MMX	B-Architecture
instructions	O
.	O
</s>
<s>
The	O
most	O
common	O
appears	O
to	O
be	O
Integer	O
SSE	B-General_Concept
(	O
ISSE	O
)	O
.	O
</s>
<s>
ISSE	O
could	O
also	O
refer	O
to	O
Internet	O
SSE	B-General_Concept
,	O
an	O
early	O
name	O
for	O
SSE	B-General_Concept
.	O
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
extension	O
DSP	B-General_Concept
instructions	O
are	O
the	O
following	O
:	O
</s>
<s>
MMX	B-Architecture
extension	O
instructions	O
(	O
Integer	O
SSE	B-General_Concept
)	O
are	O
the	O
following	O
:	O
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
Professional	O
is	O
a	O
trade	O
name	O
used	O
to	O
indicate	O
processors	O
that	O
combine	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
technology	O
with	O
a	O
complete	O
SSE	B-General_Concept
instructions	I-General_Concept
set	O
(	O
such	O
as	O
SSE1	B-General_Concept
,	O
SSE2	O
or	O
SSE3	B-General_Concept
)	O
.	O
</s>
<s>
The	O
Athlon	B-Architecture
XP	O
was	O
the	O
first	O
processor	O
to	O
carry	O
the	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
Professional	O
trade	O
name	O
,	O
and	O
was	O
the	O
first	O
product	O
in	O
the	O
Athlon	B-Architecture
family	O
to	O
support	O
the	O
complete	O
SSE1	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
(	O
for	O
the	O
total	O
of	O
:	O
21	O
original	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instructions	O
;	O
five	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
extension	O
DSP	B-General_Concept
instructions	O
;	O
19	O
MMX	B-Architecture
extension	O
instructions	O
;	O
and	O
52	O
additional	O
SSE	B-General_Concept
instructions	I-General_Concept
for	O
complete	O
SSE1	B-General_Concept
compatibility	O
)	O
.	O
</s>
<s>
The	O
Geode	B-Device
GX	I-Device
and	I-Device
Geode	I-Device
LX	I-Device
added	O
two	O
new	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
One	O
advantage	O
of	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
is	O
that	O
it	O
is	O
possible	O
to	O
add	O
or	O
multiply	O
the	O
two	O
numbers	O
that	O
are	O
stored	O
in	O
the	O
same	O
register	B-General_Concept
.	O
</s>
<s>
With	O
SSE	B-General_Concept
,	O
each	O
number	O
can	O
only	O
be	O
combined	O
with	O
a	O
number	O
in	O
the	O
same	O
position	O
in	O
another	O
register	B-General_Concept
.	O
</s>
<s>
This	O
capability	O
,	O
known	O
as	O
horizontal	O
in	O
Intel	O
terminology	O
,	O
was	O
the	O
major	O
addition	O
to	O
the	O
SSE3	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
A	O
disadvantage	O
with	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
is	O
that	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instructions	O
and	O
MMX	B-Architecture
instructions	O
share	O
the	O
same	O
register-file	O
,	O
whereas	O
SSE	B-General_Concept
adds	O
8	O
new	O
independent	O
registers	O
(	O
XMM0XMM7	O
)	O
.	O
</s>
<s>
Because	O
MMX/3DNown	O
registers	O
are	O
shared	O
by	O
the	O
standard	O
x87	B-Application
FPU	I-Application
,	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instructions	O
and	O
x87	B-Application
instructions	O
cannot	O
be	O
executed	O
simultaneously	O
.	O
</s>
<s>
However	O
,	O
because	O
it	O
is	O
aliased	O
to	O
the	O
x87	B-Application
FPU	I-Application
,	O
the	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
and	O
MMX	B-Architecture
register	B-General_Concept
states	O
can	O
be	O
saved	O
and	O
restored	O
by	O
the	O
traditional	O
x87	B-Application
F(N )	O
SAVE	O
and	O
F(N )	O
RSTOR	O
instructions	O
.	O
</s>
<s>
This	O
arrangement	O
allowed	O
operating	B-General_Concept
systems	I-General_Concept
to	O
support	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
with	O
no	O
explicit	O
modifications	O
,	O
whereas	O
SSE	B-General_Concept
registers	O
required	O
explicit	O
operating	B-General_Concept
system	I-General_Concept
support	O
to	O
properly	O
save	O
and	O
restore	O
the	O
new	O
XMM	O
registers	O
(	O
via	O
the	O
added	O
FXSAVE	O
and	O
FXRSTOR	O
instructions	O
.	O
)	O
</s>
<s>
The	O
FX*	O
instructions	O
from	O
SSE	B-General_Concept
provide	O
a	O
functional	O
superset	O
of	O
the	O
older	O
x87	B-Application
save	O
and	O
restore	O
instructions	O
.	O
</s>
<s>
They	O
can	O
save	O
not	O
only	O
SSE	B-General_Concept
register	B-General_Concept
states	O
but	O
also	O
the	O
x87	B-Application
register	B-General_Concept
states	O
(	O
hence	O
are	O
applicable	O
also	O
for	O
MMX	B-Architecture
and	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
On	O
AMD	B-Architecture
Athlon	I-Architecture
XP	O
and	O
K8-based	O
cores	O
(	O
i.e.	O
</s>
<s>
Athlon	B-Architecture
64	O
)	O
,	O
assembly	O
programmers	O
have	O
noted	O
that	O
it	O
is	O
possible	O
to	O
combine	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
and	O
SSE	B-General_Concept
instructions	I-General_Concept
to	O
reduce	O
register	B-General_Concept
pressure	O
,	O
but	O
in	O
practice	O
it	O
is	O
difficult	O
to	O
improve	O
performance	O
due	O
to	O
the	O
instructions	O
executing	O
on	O
shared	O
functional	O
units	O
.	O
</s>
<s>
All	O
AMD	O
processors	O
after	O
K6-2	O
based	O
on	O
K6	B-Architecture
,	O
Athlon	B-Architecture
,	O
Athlon	B-Architecture
64	O
and	O
Phenom	O
architecture	O
families	O
.	O
</s>
<s>
The	O
last	O
AMD	O
APU	O
processor	O
supporting	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
National	O
Semiconductor	O
Geode	B-Device
,	O
later	O
AMD	B-Device
Geode	I-Device
.	O
</s>
<s>
VIA	B-Device
C3	I-Device
(	O
also	O
known	O
as	O
Cyrix	O
III	O
)	O
"	O
Samuel	O
"	O
,	O
"	O
Samuel	O
2	O
"	O
"	O
Ezra	O
"	O
,	O
and	O
"	O
Eden	O
ESP	O
"	O
cores	O
.	O
</s>
