|Número de publicación||US6037104 A|
|Tipo de publicación||Concesión|
|Número de solicitud||US 09/145,488|
|Fecha de publicación||14 Mar 2000|
|Fecha de presentación||1 Sep 1998|
|Fecha de prioridad||1 Sep 1998|
|También publicado como||US6338938|
|Número de publicación||09145488, 145488, US 6037104 A, US 6037104A, US-A-6037104, US6037104 A, US6037104A|
|Inventores||Eric A. Lahaug|
|Cesionario original||Micron Display Technology, Inc.|
|Exportar cita||BiBTeX, EndNote, RefMan|
|Citas de patentes (11), Otras citas (2), Citada por (20), Clasificaciones (11), Eventos legales (5)|
|Enlaces externos: USPTO, Cesión de USPTO, Espacenet|
The invention pertains to methods of forming semiconductor devices, and in one aspect pertains to methods of forming field emission displays.
Field emitters are widely used in display devices, such as, for example, flat panel displays. Clarity, or resolution, of a field emission display is a function of a number of factors, including emitter tip sharpness. Specifically, sharper emitter tips can produce higher resolution displays than less sharp emitter tips. Accordingly, numerous methods have been proposed for fabrication of very sharp emitter tips (i.e., emitter tips having tip radii of 100 nanometers or less). Fabrication of very sharp tips has, however, proved difficult. In light of these difficulties, it would be desirable to develop alternative methods of forming emitter tips.
In one aspect, the invention encompasses a method of forming a semiconductor device. A layer is formed over a substrate and a plurality of openings are formed extending into the layer. Particles are deposited on the layer and collected in the openings. The collected particles are melted and used as a mask during etching of the underlying substrate to define features of the semiconductor device.
In another aspect, the invention encompasses a method of forming a field emission display. A silicon dioxide layer is formed over a conductive substrate and a plurality of openings are formed to extend into the silicon dioxide layer. Particles are deposited on the silicon dioxide layer and collected within the openings. The collected particles are utilized as a mask during etching of the conductive substrate to form a plurality of conically shaped emitters from the conductive substrate. A display screen is formed spaced from the emitters.
Preferred embodiments of the invention are described below with reference to the following accompanying drawings.
FIG. 1 is a diagrammatic, fragmentary, cross-sectional view of a semiconductor substrate at a preliminary process step of a method of the present invention.
FIG. 2 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 1.
FIG. 3 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 2.
FIG. 4 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 3.
FIG. 5 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 4.
FIG. 6 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 5.
FIG. 7 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 6.
FIG. 8 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 7.
FIG. 9 is a view of the FIG. 1 substrate shown at a processing step subsequent to that of FIG. 8.
FIG. 10 is a schematic, enlarged cross-sectional view showing one embodiment of a field emission display incorporating emitters shown in FIG. 9.
This disclosure of the invention is submitted in furtherance of the constitutional purposes of the U.S. Patent Laws "to promote the progress of science and useful arts" (Article 1, Section 8).
Referring to FIG. 1, a semiconductor substrate 10 is illustrated at a preliminary stage of a processing sequence of the present invention. To aid in interpretation of this disclosure and the claims that follow, the term "semiconductor substrate" is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term "substrate" refers to any supporting structure, including, but not limited to, the semiconductor substrates described above.
Substrate 10 comprises a glass plate 12, a first semiconductive material layer 14 overlying glass plate 12, a second semiconductive material 16 overlying material 14, and a silicon dioxide layer 18 overlying second semiconductive material layer 16. Semiconductive material 14 can comprise either a p-type doped or an n-type doped semiconductive material, and semiconductive material 16 can comprise doped polysilicon material. Materials 12, 14 and 16 together comprise a conventional emitter tip starting material. Silicon dioxide layer 18 can be formed over layer 16 by, for example, chemical vapor deposition.
Referring to FIG. 2, a patterned masking layer 19 is formed over silicon dioxide layer 18. Patterned masking layer 19 can comprise, for example, photoresist, and can be patterned by a photolithographic process. Patterned photoresist layer 19 has openings 20 extending therethrough to expose portions of silicon dioxide layer 18.
Referring to FIG. 3, openings 20 are extended into silicon dioxide layer 18, and subsequently photoresist layer 19 (FIG. 2) is removed. Accordingly, a pattern is transferred from photoresist layer 19 to silicon dioxide layer 18. Openings 20 can be extended into silicon dioxide layer 18 by, for example, a buffered oxide etch.
Referring to FIG. 4, particles 22 are deposited on silicon dioxide layer 18. Particles 22 can comprise, for example, commercially available microspheres. Such microspheres can be formed of a variety of substances, including polymers such as polystyrene. Microspheres come in a variety of different sizes, with typical sizes being from about 0.01 to about 250 microns in diameter. As used herein, the term "microspheres" refers to small, generally spherical particles of colloidal particle size, and not to any precise geometrical shape. The microspheres may be suspended in a de-ionized water solution or an isopropyl alcohol solution. Suppliers of microspheres include Bangs Laboratories, Inc. of Fishers, Ind. 46038, and Interfacial Dynamics Corp. of Portland, Oreg. 97220. In preferred embodiments of the present invention, particles 22 are microspheres having average diameters of from about 1 to about 2 microns.
Referring to FIG. 5, particles 22 are collected within openings 20 and excess particles 22 are removed. Such collection of particles 22 within openings 20 and removal of excess particles 22 can be accomplished by, for example, mechanically urging particles 22 into openings 20 utilizing a squeegee-type technique. Alternatively, microspheres 22 can be positioned within openings 20 by locating them on structure 18 in the form of a concentrated solution and subsequently rinsing a surface of silicon dioxide layer 18 with a spray to remove excess particles 22 and leave particles 22 within openings 20.
In the shown preferred embodiment, silicon dioxide layer 18 has a thickness "A" which is less than an average dimension of particles 22. For instance, if particles 22 comprise microspheres, thickness "A" is preferably less than an average diameter of microspheres 22. Accordingly, only one microsphere 22 is provided within any given opening 20.
Referring to FIG. 6, silicon dioxide layer 18 (FIG. 5) is removed, leaving particles 22 as a masking layer over portions of semiconductive material 16. Silicon dioxide layer 18 is preferably removed with an etch selective for silicon dioxide relative to the silicon material of layer 16. If layer 16 comprises polysilicon, a suitable etch is an oxide etch utilizing at least one of CF4 or CHF3.
As shown, particles 22 remain on polysilicon layer 16 after silicon dioxide layer 18 is removed. A possible mechanism by which particles 22 remain attached to layer 16 is through electrostatic interactions wherein negative charges of the particles interact with positive charges carried by the silicon of layer 16. It is noted, however, that such mechanism is provided herein merely to possibly aid in understanding of the present invention. The invention is to be limited only by the claims that follow, and not to any particular mechanism, except to the extent that such is specifically recited in the claims.
Referring to FIG. 7, particles 22 are melted to transform the spherical particles of FIG. 6 to domed discs. An exemplary method for melting particles 22 comprising is to subject the particles to a "soft bake" at a temperature of about 130° C. for a time of about 5 minutes.
Referring to FIG. 8, layer 16 (FIG. 7) is etched while using melted particles 22 as a mask. Such etching forms conically shaped emitters 26 from semiconductive material 16. In embodiments in which semiconductive material 16 comprises polysilicon, the etching can comprise, for example, a silicon dry etch utilizing SF6 and helium.
Referring to FIG. 9, particles 22 (FIG. 8) are removed. In embodiments in which particles 22 comprise polystyrene, or other organic materials, such removal can comprise, for example, dissolving particles 22 in either an acetone solution, or a piranha (sulfuric acid/hydrogen peroxide) solution.
Referring to FIG. 10, emitters 26 can be incorporated into a field emission display 40. Field emission display 40 includes dielectric regions 28, an extractor 30, spacers 32, and a luminescent screen 34. Techniques for forming field emission displays are described in U.S. Pat. Nos. 5,151,061; 5,186,670; and 5,210,472; hereby expressly incorporated by reference herein. Emitters 26 emit electrons 36 which charge screen 34 and cause images to be seen by a user on an opposite side of screen 34.
The above-described method of the present invention enables positioning of emitters 26 to be carefully controlled during fabrication of emitters 26. Such control can enable good electron beam optics to be achieved. Specifically, good electron beam optics from field emitter tips can be achieved if the tips are neither too close to one another, nor too far apart. It is desirable to have a large number of emitter tips per pixel to enhance current and brightness as well as provide redundancy for robustness and lifetime. A trade-off is that emitter tips are preferably far enough away from each other so that they do not adversely effect one another's electric field.
In the above-described processing sequence, it was specified that layer 18 preferably comprises silicon dioxide. The utilization of silicon dioxide for layer 18 can be advantageous over other materials in that it is found that organic microspheres (such as, for example, polystyrene beads) are better transferred to a silicon substrate (such as a polysilicon layer 16) when the particles are in apertures formed in silicon dioxide, rather than in apertures formed in other materials. A possible mechanism for the better transfer from apertures formed in silicon dioxide is that silicon dioxide can carry a negative charge which can repel negative charges of particles. Such repulsion can assist in alleviating adhesion of the particles to the silicon dioxide, and ease transfer of the particles to an underlying layer 16.
Another possible mechanism for the improved transfer from apertures formed in silicon dioxide relative to apertures formed in other materials is that the other materials may "stick" to the particles. For instance, if layer 18 comprises photoresist, it can be relatively tacky compared to silicon dioxide. Accordingly, the organic particles can disadvantageously stick to the photoresist layer 18 and be relatively difficult to transfer to an underlying silicon-comprising layer 16.
Although silicon dioxide can be a preferred material for layer 18, it is to be understood that the invention is not to be limited to any particular material within layer 18 except to the extent that such is specifically expressed in the claims that follow.
In compliance with the statute, the invention has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the invention is not limited to the specific features shown and described, since the means herein disclosed comprise preferred forms of putting the invention into effect. The invention is, therefore, claimed in any of its forms or modifications within the proper scope of the appended claims appropriately interpreted in accordance with the doctrine of equivalents.
|Patente citada||Fecha de presentación||Fecha de publicación||Solicitante||Título|
|US4407695 *||29 Mar 1982||4 Oct 1983||Exxon Research And Engineering Co.||Natural lithographic fabrication of microstructures over large areas|
|US5151061 *||21 Feb 1992||29 Sep 1992||Micron Technology, Inc.||Method to form self-aligned tips for flat panel displays|
|US5186670 *||2 Mar 1992||16 Feb 1993||Micron Technology, Inc.||Method to form self-aligned gate structures and focus rings|
|US5210472 *||7 Abr 1992||11 May 1993||Micron Technology, Inc.||Flat panel display in which low-voltage row and column address signals control a much pixel activation voltage|
|US5220725 *||18 Ago 1992||22 Jun 1993||Northeastern University||Micro-emitter-based low-contact-force interconnection device|
|US5245248 *||9 Abr 1991||14 Sep 1993||Northeastern University||Micro-emitter-based low-contact-force interconnection device|
|US5391259 *||21 Ene 1994||21 Feb 1995||Micron Technology, Inc.||Method for forming a substantially uniform array of sharp tips|
|US5399238 *||22 Abr 1994||21 Mar 1995||Microelectronics And Computer Technology Corporation||Method of making field emission tips using physical vapor deposition of random nuclei as etch mask|
|US5510156 *||23 Ago 1994||23 Abr 1996||Analog Devices, Inc.||Micromechanical structure with textured surface and method for making same|
|US5660570 *||10 Mar 1995||26 Ago 1997||Northeastern University||Micro emitter based low contact force interconnection device|
|US5676853 *||21 May 1996||14 Oct 1997||Micron Display Technology, Inc.||Mask for forming features on a semiconductor substrate and a method for forming the mask|
|1||K. Kim et al., "Generation of Charged Liquid Cluster Beam of Liquid-Mix Precursors and Application to Nanostructured Materials", May 1994, pp. 597-602.|
|2||*||K. Kim et al., Generation of Charged Liquid Cluster Beam of Liquid Mix Precursors and Application to Nanostructured Materials , May 1994, pp. 597 602.|
|Patente citante||Fecha de presentación||Fecha de publicación||Solicitante||Título|
|US6338938 *||25 Ene 2000||15 Ene 2002||Micron Technology, Inc.||Methods of forming semiconductor devices and methods of forming field emission displays|
|US6372404||29 Ago 2000||16 Abr 2002||Micron Technology, Inc.||Method, article and composition for limiting particle aggregation in a mask deposited by a colloidal suspension|
|US6372405||29 Ago 2000||16 Abr 2002||Micron Technology, Inc.||Method, article and composition for limiting particle aggregation in a mask deposited by a colloidal suspension|
|US6426233 *||3 Ago 1999||30 Jul 2002||Micron Technology, Inc.||Uniform emitter array for display devices, etch mask for the same, and methods for making the same|
|US6428943||25 Ago 2000||6 Ago 2002||Micron Technology, Inc.||Method, article and composition for limiting particle aggregation in a mask deposited by a colloidal suspension|
|US6495296||17 Feb 1999||17 Dic 2002||Micron Technology, Inc.||Method for limiting particle aggregation in a mask deposited by a colloidal suspension|
|US6824698||25 Jul 2002||30 Nov 2004||Micron Technology, Inc.||Uniform emitter array for display devices, etch mask for the same, and methods for making the same|
|US6890446||7 Dic 2001||10 May 2005||Micron Technology, Inc.||Uniform emitter array for display devices, etch mask for the same, and methods for making the same|
|US7265735 *||1 Mar 2002||4 Sep 2007||Alexandr Mikhailovich Ilyanok||Self scanning flat display|
|US7271528||17 Nov 2003||18 Sep 2007||Micron Technology, Inc.||Uniform emitter array for display devices|
|US9034684 *||8 Nov 2010||19 May 2015||3M Innovative Properties Company||Texturing surface of light-absorbing substrate|
|US20040094505 *||17 Nov 2003||20 May 2004||Knappenberger Eric J.||Uniform emitter array for display devices, etch mask for the same, and methods for making the same|
|US20040257302 *||1 Mar 2002||23 Dic 2004||Ilyanok Alexandr Mikhailovich||Self scanning flat display|
|US20120225517 *||8 Nov 2010||6 Sep 2012||Jun-Ying Zhang||Texturing surface of light-absorbing substrate|
|US20140166092 *||14 Dic 2012||19 Jun 2014||Robert Bosch Gmbh||Method of Fabricating Nanocone Texture on Glass and Transparent Conductors|
|US20150221483 *||21 Ago 2013||6 Ago 2015||Regents Of The University Of Minnesota||Embedded mask patterning process for fabricating magnetic media and other structures|
|CN102754217A *||8 Nov 2010||24 Oct 2012||3M创新有限公司||Texturing surface of light-absorbing substrate|
|WO2004010229A1 *||6 Abr 2000||29 Ene 2004||Micron Technology, Inc.|
|WO2011062791A2 *||8 Nov 2010||26 May 2011||3M Innovative Properties Company||Texturing surface of light-absorbing substrate|
|WO2011062791A3 *||8 Nov 2010||19 Jul 2012||3M Innovative Properties Company||Texturing surface of light-absorbing substrate|
|Clasificación de EE.UU.||430/314, 445/50, 216/42, 216/49, 216/51, 216/11, 216/67, 445/24|
|1 Sep 1998||AS||Assignment|
Owner name: MICRON TECHNOLOGY, INC., IDAHO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:LAHAUG, ERIC A.;REEL/FRAME:009452/0135
Effective date: 19980827
|25 Sep 2001||CC||Certificate of correction|
|19 Ago 2003||FPAY||Fee payment|
Year of fee payment: 4
|17 Ago 2007||FPAY||Fee payment|
Year of fee payment: 8
|18 Ago 2011||FPAY||Fee payment|
Year of fee payment: 12