|Número de publicación||US4860103 A|
|Tipo de publicación||Concesión|
|Número de solicitud||US 07/275,658|
|Fecha de publicación||22 Ago 1989|
|Fecha de presentación||22 Nov 1988|
|Fecha de prioridad||9 Oct 1985|
|También publicado como||DE3669250D1, EP0222508A1, EP0222508B1|
|Número de publicación||07275658, 275658, US 4860103 A, US 4860103A, US-A-4860103, US4860103 A, US4860103A|
|Inventores||Mohammad S. Azam, Michael D. Carr|
|Cesionario original||British Telecommunications Plc|
|Exportar cita||BiBTeX, EndNote, RefMan|
|Citas de patentes (8), Citada por (18), Clasificaciones (9), Eventos legales (8)|
|Enlaces externos: USPTO, Cesión de USPTO, Espacenet|
This is a continuation of application Ser. No. 917,158 filed Oct. 9, 1986 now abandoned.
The present invention concerns video signal processing, and more particularly to the conversion of such signals into digital form.
According to the present invention there is provided a digital video coder comprising a video input for receiving analogue video signals from a camera; an analog-to-digital converter connected to the input and having an output for digital words representing successive samples of the input signal and a control input for varying the sensitivity of the converter; and control means responsive to the digital words at the output of the converter to generate digitally, as a function of the amplitudes represented by previous digital words at the converter output, a control signal for application to the control input of the converter.
Other optional features are defined in claims 2 to 9 of the appended claims.
One embodiment of the invention will now be described with reference to the accompanying drawings, in which:
FIG. 1 is a block diagram of an apparatus according to the present invention;
FIG. 2 illustrates graphically one possible control transfer function; and
FIG. 3 is a flowchart.
The apparatus shown in FIG. 1 has a video input 1 connected to an analogue to digital converter 2 which produces 8-bit digital output samplts at an output 3. The converter 2 has a reference voltage input 4 which effectively controls the gain of the converter. If the input video is Vin and the reference voltage is Vref then the converter output X is given by X=255 Vin/Vref. Thus a reduction in Vref implies an increase in gain.
The video input is assumed to consist of non-composite video, but composite video could be coded provided that the gain control thresholds described below take account of the presence of synchronising pulses.
For a colour system, colour difference inputs 5,6, to analogue-to-digital converters 7,8 may be included; a single reference voltage Vref being used for these converters so that the gains of the colour difference channels accurately track that of the luminance channel. The system assumes the Y U V signal degradation is linear. This assumptions is quite valid as the effects of colour temperature changes are insignificant.
The reference voltage Vref is supplied by a feedback controller, indicated generally at 10, which latches samples from the digital output 3. The speed of operation of the controller is assumed to much slower than that required to process all samples, and it is arranged to take samples at an irregular rate so that over a period it takes cognisance of the luminance values over the entire picture area and makes, as necessary, adjustments to the reference voltage.
The controller 10 comprises a microprocessor 11, with associated data bus 12, and read-only memory and read-write memory indicated generally at 13. Address and control buses are of course present but not shown. Also connected to the data bus are an 8-bit input latch 14 connected to the converter output 3 and an 8-bit output latch 15 which supplies the output voltage Vref in digital form. The controller could, in practice be a single-chip microcomputer. The output Vref is converted to analogue form by a digital to analogue converter 16. This could simply consist of resistors connected to the digital outputs. An on-chip watchdog timer 17 is also incorporated to reset the microprocessor if it crashes or gets stuck in an illegal loop for longer than one field period (20 ms).
A loss of signal detector 18 resets the controller 10 to initial conditions (minimum gain) and holds it in this state until a video signal is applied.
The function of the controller is to adjust the converter gain to compensate variations in video input amplitude. The aim is to maintain the grey level within a pre-determined range and thus samples representing video amplitudes below a lower threshold or above an upper threshold are, in principle, ignored (see FIG. 2). However, in order to avoid a lock-up state, if a significant number of samples keep falling outside the range the gain is adjusted accordingly to bring the samples back into range. In-range samples are accumulated and if the mean is not within the deemed grey-level range, an adjustment is made to Vref in proportion to the deviation.
A flowchart indicating controller operation is shown in FIG. 3. A brief description of the each step in the process is given below.
1 The microprocessor ports are initialised as inputs/outputs after reset, the gain is also set to minimum.
2 The accumulator, and counts, are reset.
3 A sample is latched.
4 The sample is accepted only if it were taken during the active line period.
6 It is discarged if it is same value as the previous one.
5 Or if it is at black level (zero amplitude).
7 The watchdog timer is reset, so that it does not normally reach its maximum count. If the maximum count is reached, a system fault is indicated and a reset to step 1 is initiated.
8 The sample count is incremented.
9 The samples are checked to ensure that they fall in the central range of FIG. 2. If not:
16 A count is incremented of "super white" or "super black" signals.
17 If the total sample cunt has not reached 100, return for a further sample, otherwise
18 If the count of super Whites is ten or more, or that of super Blacks is 90 or more, the reference voltage is adjusted (step 19) by one step (eg 10 mV on a 1 V nominal reference voltage) in the appropriate direction, and the cycle is repeated.
10 Otherwise the in-range sample count is incremented.
11 If the sample is the same as the first of the current accumulation, ignore it (resetting--step 20--the total sample count and in-range sample counts) and return for another sample.
12 The sample is added to an accumulator.
13 If the in-range sample count has not reached 100, return for a further sample.
14 If the accumulated total is not within ±15% of a target value (eg 50% of peak white, corresponding to a total of 127 times the in-range sample count) then the gain is adjusted by an amount proportional to the difference between the total and the target value.
Otherwise (2) the accumulator and "super white" and "super black" counts are reset and the cycle repeated.
15 The adjustment of the gain is carried out during the horizontal blanking period of the video signal so as to eliminate switching transients and noise from the display.
A typical system would be capable of processing on average about 500 samples per frame (compared with a total of about 520,000 samples per frame for a 25 fps signal sampled at 13 MHz.); the precise number depends on the signal content. As previously mentioned the rate of acquisition of samples by the controller 10 is irregular, the object being to ensure an effectively random subsampling so that the effect of all areas of the picture on the gain control is the same. This irregular sampling is achieved by the different paths seen on the flowchart, the processing taking different times to process in-range and out of range samples.
The system is transparent to all signals provided they are of the normally expected input level. Where variations occur, the signals are maintained to within (say) ten percent of their original amplitudes for 0 to 10 dB of attentuation.
The apparatus may be employed in digital picture coding: the dynamic range of the A/D converter is used optimally and hence quantisation errors are reduced to a minimum. Signal degradation (0 to 10 db) does not cause any appreciable loss in picture quality.
Another application is in security systems, whereby the effective sensitivity of normal cameras is increased to cope with very poor ambient light levels to produce good quality pictures.
It will be appreciated that in some circumstances, some clipping of the peak whites may occur; however in many applications this is considered acceptable.
If desired the gain change may be restored after processing (or storage or transmission). This is indicated schematically in FIG. 1 where the digital word representing Vref is fed as indicated at 19 along with the samples; after passage over a signal path 20 the samples and Vref word are separated, the former being supplied via a digital to analogue converter 21 to a video output 22 and the latter via a digital to analogue converter 23 to supply a Vref value to a control input of the converter 21.
In this situation, bit rate reduction may be possible by setting the analogue to digital converter to attentuate the video signal by some factor; this would then enable the same information to be transmitted using fewer bits and hence lower bit rates. The controller at the transmitting end would send the attenutation factor to the receiving end to compensate for this attentuation thereby returning the signal to its original amplitude.
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|Clasificación de EE.UU.||348/572, 348/E05.073, 348/678|
|Clasificación internacional||H04N5/20, H03M1/18|
|Clasificación cooperativa||H04N5/20, H03M1/185|
|Clasificación europea||H04N5/20, H03M1/18|
|19 Ene 1993||FPAY||Fee payment|
Year of fee payment: 4
|16 Ene 1997||FPAY||Fee payment|
Year of fee payment: 8
|19 Ene 2001||FPAY||Fee payment|
Year of fee payment: 12
|19 Mar 2004||AS||Assignment|
Owner name: GENERAL ELECTRIC COMPANY, NEW JERSEY
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:BRITISH TELECOMMUNICATIONS PLC;REEL/FRAME:015108/0765
Effective date: 20040227
|16 Jul 2009||AS||Assignment|
Owner name: PRINCETON DIGITAL IMAGE COMPRESSION, LLC, NEW JERS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:GENERAL ELECTRIC COMPANY;REEL/FRAME:022960/0496
Effective date: 20090716
|25 Ene 2010||AS||Assignment|
Owner name: PRINCETON DIGITAL IMAGE CORPORATION, TEXAS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:PRINCETON DIGITAL IMAGE COMPRESSION LLC;REEL/FRAME:023832/0829
Effective date: 20100116
|22 Nov 2011||RR||Request for reexamination filed|
Effective date: 20110914
|10 Jul 2012||B1||Reexamination certificate first reexamination|
Free format text: THE PATENTABILITY OF CLAIMS 1 AND 11 IS CONFIRMED. CLAIMS 2-10 WERE NOT REEXAMINED.