- What are the primary uses for FPGA-based prototypes?
Answer: FPGA-based prototypes provide SoC design teams with cycle-accurate, high-performance execution and real-world interface connectivity. They are primarily used to facilitate software development, hardware/software integration and system validation.
- What are the key challenges faced by designers who need to prototype SoCs?
Answer: There are four key challenges faced by today’s SoC prototypers:
- Ease of Use: Implementing ASIC RTL code to be FPGA ready in a short timeframe
- Debug Visibility: Getting visibility into the prototype design to aid with design debug
- Prototype Performance: High performance needed to execute the design along with support for high-speed, real-world I/O
- Prototype Capacity and Scalability: Support for a range of designs, from IP blocks to complex SoCs.
- What is Synopsys’ HAPS FPGA-based prototyping solution?
Answer: HAPS is a portfolio of FPGA-based prototyping solutions consisting of a suite of modular, easy-to-use hardware systems supported by an integrated tool flow including Certify® Multi-FPGA ASIC prototyping environment , Synplify® FPGA synthesis, and Identify® interactive debugging software. HAPS systems can be tailored for the user’s end-application or be more general-purpose to provide the most flexibility across projects. HAPS systems offer a variety of daughter boards to provide high-performance physical interfaces such as DDR memory, video, and USB to the FPGA ICs.
- What is new and exciting about the HAPS-70 Series FPGA Prototyping solution?
Answer: HAPS-70 Series’ new scalable architecture and enhanced hardware/software prototyping flow offers SoC prototypers the following benefits:
- Up to 3x improvement in system performance enabled through enhanced HapsTrak 3 I/O connector technology and high-speed time-domain multiplexing (HSTDM)
- Modular system architecture scales from 12-144M ASIC gates to accommodate a range of design sizes, from individual IP blocks to processor subsystems to complete SoCs
- New capability in Synopsys’ Certify software in combination with HAPS’ flexible interconnect architecture accelerates multi-FPGA partitioning by up to 10x
- Enhanced Universal Multi-Resource Bus host connectivity of up to 400 MB/s facilitates debug and increases hybrid prototyping performance with Synopsys’ Virtualizer
- Pre-validated Synopsys DesignWare IP with HAPS systems enables efficient integration of IP blocks and earlier software development
- Why should a customer who builds their own prototype boards or is using another commercial FPGA-based prototyping board consider a HAPS-70 system instead?
Answer:HAPS-70 systems leverage 10+ years of FPGA-based prototyping experience and six generations of high-quality product deployments, leading to several key advantages over build-your-own and competitive prototyping boards:
- The combination of new HapsTrak 3 connector technology, support for high-speed time-domain multiplexing (HSTDM), and integrated Swarm Intelligence Partition Engine (SWIPE) with pin-reduction algorithms, delivers up to a 3x improvement in prototype performance compared to traditional connector and pin multiplexing technologies
- Integrated and HAPS-optimized multi-FPGA ASIC prototyping software, Certify, which eases and automates SoC RTL to FPGA-based prototype bring-up
- Flexible I/O interconnect that facilitate easy movement of prototyping designs, cable connections, and daughter boards
- The HAPS-70’s Symmetrical System Architecture (SSA) provides a seamless integration path for single-FPGA IP modules to be integrated into a system of multi-FPGA SoC modules, maximizing prototype reuse and minimizing bring-up time across engineering teams
- Support for HAPS Deep Trace Debug provides greater debugging efficiency by enabling approximately 100 times more signal storage capacity than the traditional memory storage employed by on-chip FPGA logic debuggers
- A rich selection of Synopsys DesignWare IP daughter boards for common IP blocks such as DDR3, SRAM, PCIe, SATA, and Ethernet pre-validated with HAPS systems enables efficient integration of IP blocks and earlier software development
- An integrated high-speed UMRBus interface bus for remote accessibility, direct hardware connection via TCL or C/C++ programming, co-simulation, transaction-based validation, and hybrid prototyping
- Setup and integrated system check utility
- Graphical user interface for ease of use and TCL interface for scriptable configuration
- Automated thermal management
- Shutdown protocols protecting your investment
- Fast configuration and FPGA programming over UMRBus
- System check ensuring cables, daughter boards, and system configuration setup match the prototyping design database
- System performance analyzer that profiles the physical connections on the system ensuring the desired cable connector or HSTDM connection performance is met
- Immediate availability, reducing design effort and schedule risk associated with building and maintaining custom-built internal boards
- Lower total cost of ownership due to a scalable and flexible prototyping platform that can be reused for many different projects and designs
- Availability of expert services to accelerate deploying and bring-up of your design in HAPS-70 systems
- Should existing HAPS customers consider upgrading to the HAPS-70 series?
Answer:HAP-50 and HAPS-60 users may benefit from the following HAPS-70 features, in addition to those listed above:
- HAPS-70 systems take advantage of the latest generation Xilinx Virtex®-7 FPGA devices and a scalable architecture to support designs of up to 144 million ASIC gates
- The flexibility and matched pin connections between the Virtex-7’s I/O banks and HapsTrak 3 connectors enable HAPS-70 users to utilize I/O bandwidth where it is needed most while minimizing the number of unused pins
- The Universal Multi-Resource Bus (UMRBus) host connectivity option for the HAPS-70 system has been enhanced to support up to 400 MB/s bandwidth.
Note that since HAPS-70 and HAPS-60 systems share a similar clocking architecture and modular design, migration is accomplished with minimal effort and interoperability between them in enabled with HapsTrak adapters.
- How does Zebu emulation fit into your overall strategy with regards to HAPS FPGA-based prototyping?
Answer: Synopsys’ HAPS solutions are used for pre-silicon software development (drivers, OS porting, middleware), hardware/software integration, and system validation (i.e., ensuring that the system works as expected by the user). Zebu systems are used for SoC hardware and software verification and is ideal for the SoC integration phase of the design cycle where multiple logic blocks, multiple chips, and embedded firmware, such as boot loader code, must all be verified together. Emulation systems such as Zebu are complementary to our HAPS prototyping strategy and many customers use the combination of both in their SoC development process.
- What is the UMRBus Interface?
Answer: The UMRBus (Universal Multi-Resource Bus) is a high-speed communications interface designed into HAPS-70 systems to enable workstation-based access to the hardware prototype. This connection offers users powerful, advanced prototyping and monitoring capabilities. Some of the major features of HAPS-70 enabled by the UMRBus include:
- Streamlined creation of hybrid prototypes that seamlessly integrate Virtualizer™ virtual prototypes with HAPS FPGA-based prototypes to realize the best of both methods for early SoC software and hardware development
- High-speed data transfer that can be used to load design data to a configured prototype implemented on the HAPS-70 system
- Remote system setup, configuration, and control of the HAPS-70 system, making it much easier to identify and fix bring-up and runtime issues as well as reconfigure the prototype to support parallel design projects without requiring physical access
- Co-simulation with RTL simulators so verification teams can use their RTL testbench to drive and validate the FPGA-based implementation in the HAPS-70 system
- Transaction-based validation via SCE-MI 2.0 to any host workstation-based software simulation or testbench environment.
- What enhancements were made to HapsTrak connector technology?
Answer: HapsTrak 3 supports higher-speed I/O interfaces such as DDR3-1333. In addition, HapsTrak 3 connectors offer finer granularity on the number of I/Os per connector to align on a 1:1 basis with the I/O bank architecture on the new Virtex-7 FPGA devices. This I/O pin alignment provides the most flexibility allowing the movement of cables or daughter boards if a design changes and also efficiently utilizes I/O connections where they are needed most while minimizing the number of unused pins.
- Has the prototyping design flow for prototype implementation and debug changed from the HAPS-60 series to the HAPS-70 series?
Answer: The latest version of the prototyping software suite, which includes Certify, Identify, and Synplify tools, are the same for HAPS-50, HAPS-60 and HAPS-70 prototyping systems. Enhancements to the software flow include an integrated system check utility ensuring cables, daughter boards, and system configuration setup match the prototyping design database, and a system performance analyzer which profiles the physical connections on the system to ensure the desired cable connector or HSTDM connection is met.
- How many different configurations are there for the HAPS 70 Series?
Answer: The HAPS-70 FPGA-based prototyping systems are available in nine model variants with capacities from 12 to 144 million ASIC gates:
|HAPS-70 S12||Up to 12 million|
|HAPS-70 S24||Up to 24M|
|HAPS-70 S36||Up to 36M|
|HAPS-70 S48||Up to 48M|
|HAPS-70 S60||Up to 60M|
|HAPS-70 S72||Up to 72M|
|HAPS-70 S96||Up to 96M|
|HAPS-70 S120||Up to 120M|
|HAPS-70 S144||Up to 144M|
- When will the HAPS-70 be available?
Answer: HAPS-70 FPGA-based prototyping systems are available now.
- Will Synopsys continue to sell the HAPS-60 series?
Answer: Yes, the HAPS-60 Series product line will continue to be available.