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Abstract and Applied Analysis
Volume 2012 (2012), Article ID 405739, 19 pages
A Novel Chaotic Neural Network Using Memristive Synapse with Applications in Associative Memory
1School of Electronics and Information Engineering, Southwest University, Chongqing 400715, China
2Department of Mechanical and Biomedical Engineering, City University of Hong Kong, Hong Kong
Received 22 September 2012; Accepted 1 November 2012
Academic Editor: Chuandong Li
Copyright © 2012 Xiaofang Hu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
- K. Aihara, T. Takabe, and M. Toyoda, “Chaotic neural networks,” Physics Letters A, vol. 144, no. 6-7, pp. 333–340, 1990.
- Y. Yao and W. J. Freeman, “Model of biological pattern recognition with spatially chaotic dynamics,” Neural Networks, vol. 3, no. 2, pp. 153–170, 1990.
- Y. Osana and M. Hagiwara, “Separation of superimposed pattern and many-to-many associations by chaotic neural networks,” in Proceedings of the IEEE International Joint Conference on Neural Networks, pp. 514–519, May 1998.
- K. Kaneko, “Clustering, coding, switching, hierarchical ordering, and control in a network of chaotic elements,” Physica D, vol. 41, no. 2, pp. 137–172, 1990.
- S. Ishii, K. Fukumizu, and S. Watanabe, “A network of chaotic elements for information processing,” Neural Networks, vol. 9, no. 1, pp. 25–40, 1996.
- Y. Osana, M. Hattori, and M. Hagiwara, “Chaotic bidirectional associative memory,” in Proceedings of the IEEE International Conference on Neural Networks (ICNN '96), pp. 816–821, June 1996.
- Y. Osana and M. Hagiwara, “Successive learning in chaotic neural network,” in Proceedings of the IEEE International Joint Conference on Neural Networks, pp. 1510–1515, May 1998.
- N. Kawasaki, Y. Osana, and M. Hagiwara, “Chaotic associative memory for successive learning using internal patterns,” in Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, vol. 4, pp. 2521–2526, October 2000.
- Y. Osana, “Improved chaotic associative memory using distributed patterns for image retrieval,” in Proceedings of the International Joint Conference on Neural Networks, vol. 2, pp. 846–851, July 2003.
- G. Y. Liu and S. K. Duan, A Chaotic Neural Network and Its Applications in Separation Superimposed Pattern and Many-to-Many Associative Memory, vol. 30, Computer Science, Chongqing, China, 2003.
- S. Duan, G. Liu, L. Wang, and Y. Qiu, “A novel chaotic neural network for many-to-many associations and successive learning,” in Proceedings of the International Conference on Neural Networks and Signal Processing (ICNNSP '03), vol. 1, pp. 135–138, Nanjing, China, December 2003.
- S. K. Duan and L. D. Wang, “A novel chaotic neural network for automatic material ratio system,” in Proceedings of the International Symposium on Neural Networks, Lecture Notes in Computer Science, pp. 813–819, Dalian, China, 2004.
- L. Wang, S. Duan, and G. Liu, “Adaptive chaotic controlling method of a chaotic neural network model,” in Proceedings of the 2nd International Symposium on Neural Networks: Advances in Neural Networks (ISNN '05), pp. 363–368, June 2005.
- L. O. Chua, “Memristor—the missing circuit element,” IEEE Transactions on Circuit Theory, vol. 18, no. 5, pp. 507–519, 1971.
- L. Chua, “Resistance switching memories are memristors,” Applied Physics A, vol. 102, no. 4, pp. 765–783, 2011.
- D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, “The missing memristor found,” Nature, vol. 453, no. 7191, pp. 80–83, 2008.
- R. S. Williams, “How we found the missing Memristor,” IEEE Spectrum, vol. 45, no. 12, pp. 28–35, 2008.
- W. Robinett, M. Pickett, J. Borghetti et al., “A memristor-based nonvolatile latch circuit,” Nanotechnology, vol. 21, no. 23, Article ID 235203, 2010.
- P. O. Vontobel, W. Robinett, P. J. Kuekes, D. R. Stewart, J. Straznicky, and R. Stanley Williams, “Writing to and reading from a nano-scale crossbar memory based on memristors,” Nanotechnology, vol. 20, no. 42, Article ID 425204, 2009.
- S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, “Nanoscale memristor device as synapse in neuromorphic systems,” Nano Letters, vol. 10, no. 4, pp. 1297–1301, 2010.
- T. Masquelier and S. J. Thorpe, “Learning to recognize objects using waves of spikes and spike timing-dependent plasticity,” in Proceedings of the IEEE Word Congress on Computational Intelligence (WCCI '10), pp. 2600–2607, Barcelona, Spain, July 2010.
- A. Afifi, A. Ayatollahi, F. Raissi, and H. Hajghassem, “Efficient hybrid CMOS-Nano circuit design for spiking neurons and memristive synapses with STDP,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E93-A, no. 9, pp. 1670–1677, 2010.
- B. Muthuswamy and P. Kokate, “Memristor-based chaotic circuits,” IETE Technical Review, vol. 26, no. 6, pp. 417–429, 2009.
- W. Sun, C. Li, and J. Yu, “A memristor based chaotic oscillator,” in Proceedings of the International Conference on Communications, Circuits and Systems (ICCCAS '09), pp. 955–957, Milpitas, Calif, USA, July 2009.
- S. Shin, K. Kim, and S. M. Kang, “Memristor-based fine resolution programmable resistance and its applications,” in Proceedings of the International Conference on Communications, Circuits and Systems (ICCCAS '09), pp. 948–951, July 2009.
- T. Raja and S. Mourad, “Digital logic implementation in memristor-based crossbars,” in Proceedings of the International Conference on Communications, Circuits and Systems (ICCCAS '09), pp. 939–943, July 2009.
- “Programmable electronics using memristor crossbars,” 2009, http://www.ontheknol.com/frontpage-knol/programmable-electronics-using-memristor-crossbars.
- X. F. Hu, S. K. Duan, L. D. Wang, and X. F. Liao, “Memristive crossbar array with applications in imageprocessing,” Science China Information Sciences, vol. 41, no. 4, pp. 500–512, 2011.
- T. A. Wey and W. D. Jemison, “Variable gain amplifier circuit using titanium dioxide memristors,” IET Circuits, Devices and Systems, vol. 5, no. 1, pp. 59–65, 2011.