|Publication number||US4523221 A|
|Application number||US 06/501,908|
|Publication date||11 Jun 1985|
|Filing date||7 Jun 1983|
|Priority date||7 Jun 1983|
|Also published as||CA1216659A, CA1216659A1, DE3421231A1, DE3421231C2|
|Publication number||06501908, 501908, US 4523221 A, US 4523221A, US-A-4523221, US4523221 A, US4523221A|
|Inventors||Danny Chin, Eric P. Batterman, Thomas V. Bolger|
|Original Assignee||Rca Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (14), Non-Patent Citations (4), Referenced by (16), Classifications (14), Legal Events (6)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This invention relates to color signal processing in a TV receiver and more particularly to combined circuitry for digitally performing auto-flesh, tint control, gain control and matrixing I and Q color mixture signals to (R-Y), (B-Y) and (G-Y) color mixture signals.
Currently TV receivers are being developed which will perform signal processing with digital or binary circuitry. Generally, digital counterparts of analog circuits which perform like functions require orders of magnitude more devices. However, the devices required to realize the digital circuits can be integrated on silicon dies (i.e. IC's) to a greater extent than their analog counterparts so that ultimately the number of discrete circuit elements comprising the signal processing circuitry in a TV receiver will be dramatically reduced.
In order to apprecite such a parts reduction using digital circuits it is necessary to perform the requisite processing functions with efficient use of circuitry. To this end circuit elements should desirably incorporate some commonality of functions if the number of digital integrated circuits is to remain low (e.g. less than 6).
The present invention is an auto-flesh circuit which has been designed to include static tint control, signal gain control and I and Q matrixing. Received I and Q signals are demodulated to generate the magnitude, C, of their vector sum and the angle, θ, between the vector sum and the I axis. The generated angles are augmented first to provide static tint control to adjust overall image colors to viewer preference. Secondly, the angles are augmented by a linear-nonlinear circuit to provide auto-flesh correction. Thirdly, the angles are augmented by three angle values ΔθR, ΔθB and ΔθG for projecting the vector sum onto the respective (R-Y), (B-Y) and (G-Y) axes for generating (R-Y), (B-Y) and (G-Y) color difference signals. The augmented angles are sequentially applied as address codes to a ROM table which produces cosine values of the applied address codes. The cosine values corresponding to the augmented angle address codes are then applied to one input of a first multiplier circuit.
The magnitude C is applied to a second multiplier wherein it is modified by a combined gain function which includes a dynamic gain control signal, a saturation control signal and three successively multiplexed coefficients gR, gB and gG each sample period. The coefficients gi relate the transmitted I and Q color mixture signal components of the composite video signal to the (R-Y), (B-Y) and (G-Y) color mixture signals.
The amplified magnitude, C, is applied to the first multiplier which successively produces the three color mixture signals (R-Y), (B-Y) and (G-Y) each sample period according to the equations ##EQU1## where "A" is the gain factor corresponding to the product of the saturation control signal and the dynamic gain control signal.
FIG. 1 is a vector diagram showing the relationship of the I, Q, (R-Y), (B-Y) and chrominance vectors for an NTSC composite video signal;
FIG. 2 is a coordinate diagram of the (R-Y), (B-Y) and (G-Y) color mixture signal axes;
FIG. 3 is a block diagram of color signal processing circuitry embodying the present invention;
FIG. 4(a) is a more detailed block diagram of the FIG. 3 apparatus realized with digital signal processing elements;
FIG. 4b is a detailed block diagram of the fleshtone corrector of FIG. 4a; and
FIG. 5 is a graphic representation of the auto-flesh transfer function.
Many TV designers choose to process color signals using the I and Q color mixture signals rather than the (R-Y) and (B-Y) color mixture signals to extend the bandwidth of chrominance information. At some point it is necessary to convert the I and Q signals to the (R-Y) and (B-Y) color mixture signals to facilitate matrixing to R,G,B color signals for driving the display tube.
FIG. 1 shows the general relationship of the I and Q quadrature color mixture signals to the NTSC (R-Y) and (B-Y) quadrature color mixture signals and to the instantaneous chrominance vector C. The I axis is 33 degrees from the (R-Y) axis and 57 degrees from the -(B-Y) axis. Knowing the magnitude of the chrominance vector C (e.g. C=√I2 +Q2) and the angle θ that vector C is from the I axis (e.g. θ=tan-1 (Q/I)) the instantaneous value of the (R-Y) and (B-Y) signals can be determined. The instantaneous signals (R-Y)a and (B-Y)a are the projections of the chrominance vector on the (R-Y) and (B-Y) axes which may be produced from the relationships
(R-Y)a =C cos (33-θ) (4)
(B-Y)a =-C cos (57+θ) (5)
Noting the relationship of the (G-Y) axis to the (R-Y) axis in FIG. 2 it will be recognized that the signal (G-Y)a is given the by relationship
(G-Y)a =-C cos (66-θ) (6)
The composite video signal, EM, of an NTSC system may be mathmatically described by:
EM =EY +(EQ sin (wt+33°)+EI cos (wt+33°)) (7)
where EY, EQ and EI are the instantaneous voltages of the Y, Q and I signal components and the term in the outer parentheses represents the chrominance signal. If this same signal is represented in terms of (R-Y) and (B-Y) color mixture signals the composite signal is given by
EM =EY +(0.493(EB -EY) sin wt+0.887(ER -EY) cos wt) (8)
where EB and ER are the instantaneous voltages of the Blue and Red color signals and the term enclosed in the outer parentheses is again the chrominance component of the composite signal.
In order to generate non-attenuating (R-Y) and (B-Y) color mixture signals from transmitted composite signal of the form described by equation (7) it is necessary to compensate for the factors 0.493 and 0.877 included in equation (8). This may be done by multiplying the magnitude of the chrominance signal, C, by a vector projection coefficient gB, (e.g. 1/0.493) when the vector is effectively projected onto the (B-Y) axis and by a projection coefficient gR, (e.g. 1/0.877) when it is projected onto the (R-Y) axis. Similarly, the magnitude, C, is multiplied by a projection coefficient gG when the vector is projected onto the (G-Y) axis.
In typical, commercially produced TV receivers provision is made for adjusting the overall tint of the reproduced image (static tint control) and to automatically force colors generally considered to include flesh tones to appear as "true" flesh tones. Both of these functions require that the chrominance vector be rotated one way or the other from its actual position. This rotation is performed by adding to or subtracting from the actual value of θ.
FIG. 3 is a simplified circuit diagram of processing circuitry for generating (R-Y), (B-Y) and (G-Y) signals from I and Q signals as well as providing static tint control, auto-flesh, dynamic chrominance signal gain (ACC) and saturation control. The FIG. 3 apparatus is located in the color signal processing path of a TV receiver at a point after which the chrominance signal has been separated from the composite video signal (for example by comb filtering) and after the chrominance subcarrier has been demodulated to recover the I and Q quadrature related components. It will be assumed that the I and Q signals are in sampled data format occurring at the color subcarrier rate of FSC.
In the figure the demodulated I and Q signals are respectively applied to terminals 10 and 11 from which they are routed to a magnitude determining circuit 12 and an angle determining circuit 13. Circuit 12 produces signal samples at the FSC rate which corresponds to the instantaneous magnitude C of the vector sum of the instantaneous I and Q signals and which is equal to the magnitude of the chrominance vector. Circuit 13 generates signal samples at the FSC rate which represent the angle, θ, between the vector sum of signals I and Q and the I axis, i.e., θ equals the arctangent (Q/I). The signal representing the angle θ, hereinafter the signal θ, is applied to a summing circuit 15 wherein a constant angle value is added to effect a rotation of the chrominance vector to adjust overall scene tint. The amount by which signal θ is augmented, i.e., incremented or decremented, is determined by the viewer applying incremental values to circuit 15 via connection 16 while he is viewing the reproduced image on the display tube. In effect the viewer rotates the chrominance vector until the displayed color satisfies his color preference. Once the proper incremental value is established it is thereafter continuously applied to the angle θ, producing the augmented angle θ'. Note static tint control is performed, in principle, to realign the phasing of the system to its design parameters and has the effect of rotating the I and Q axis relative to the received chrominance signal.
The angle signal, θ', from element 16, is applied to element 30 wherein the angle is nonlinearly altered to produce fleshtone correction. Element 30 may be a ROM programmed to produce angles θ responsive to the input angles θ'. The angles Φ are equal to the angle θ' when the chrominance signal does not represent the range of colors considered to be fleshtones. When the chrominance signal does represent colors in the fleshtone range element 30 produces angles Φ which are a nonlinear function of input angles θ'. For example angle Φ may equal (θ'-K sin 2θ') in the fleshtone range. This function is illustrated in FIG. 5. The FIG. 5 function will perform flesh correction for angles θ' which are ±90 degrees from the I axis and no correction outside this range. Auto-flesh correction is accomplished by virtue of element 30 rotating the chrominance vector toward the I axis when angle θ' is in the range of angles associated with flesh colors. The nearer the chrominance vector is to the I axis the less the required correction; and from FIG. 5 it is seen that the correction tends toward zero i.e., when θ' is near zero. The farther the chrominance vector is from the I axis while in the flesh color range, the less the required correction to preclude the reproduced color appearing artificial. In FIG. 5 the limits of the fleshtone range are presumed at θ'=±90 degrees and it can be seen that the non-linear correction again tends toward zero near these limits.
The FIG. 5 function in the fleshtone range i.e. Φ=θ'-K sin 2θ', provides a maximum correction of K degrees of rotation at midrange. When the instantaneous chrominance vector is actually ±45 degrees from the I axis, the angle Φ produced by element 30 is (θ'-K) degrees. The value K is predetermined by the designer and will generally fall in the range of 14-26 degrees. The function Φ=θ'-K sin 2θ' produces pleasing fleshtone correction. However, it should be appreciated that other functions Φ=f(θ') may be substituted therefore according to the designers preferences.
The augmented signal Φ on connection 17 is applied to adder circuit 18 wherein it is further augmented by the angular values ΔθR, ΔθB and ΔθG needed to project the chrominance vector onto the (R-Y), (B-Y) and (G-Y) axis. The values ΔθR, ΔθB and ΔθG available from a storage element 19 are multiplexed at a three times FSC rate into adder 18 which produces three successive signal samples (ΔθR -Φ), ΔθB -Φ) and ΔθG -Φ).
The signals from circuit 18 are applied as address codes to a ROM 22 which produces samples corresponding to the cosines of the applied address codes. The cosine values are thereafter applied to one input port of a multiplier 23.
The magnitude signal C generated by element 12 is applied to one input port of a second multiplier circuit 20 wherein it is multiplied by gain factors GR, GB and GG. Each of the gain factors Gi may be a composite factor composed of the vector projection coefficient gi, a dynamic chroma gain factor, ACC, and a chroma saturation factor, SAT, (i.e. Gi =gi ·Acc ·SAT). The factor Gi may be periodically updated at the line or field rate, by for example a microprocessor, and stored in a buffer 21. The factors are thereafter multiplexed to the multiplier 20 at the three times FSC rate to produce successive samples (CxCR), (CxGB) and (CxGG) which coincide in time with the production of the cosine values corresponding to the angles (Δθi -Φ) respectively. The samples CxGi are applied to a second input port of multiplier 23 which produces the samples ##EQU2## that are demultiplexed at the FSC rate onto output lines 25, 26 and 27 respectively.
The (R-Y), (B-Y), (G-Y) signals were formed by projecting the chrominance vector onto the respective axes using cosine values. The projections may be performed by using alternate trigonometric ratios such as the sines of the appropriate angles. Depending upon the trigonometric functions used, differing values ΔθR, ΔθB and ΔθG may be required as well as the sense of the values included in the algebraic sums, and circuit elements 18 and 19 must be arranged accordingly. In general terms the algebraic sums would be represented (Δθi ±Φ). For example if the projections were produced using sine ratios, the angle ΔθR (from FIG. 1) is 57° and the corresponding algebraic sum is (ΔθR +Φ).
It will be appreciated by those skilled in the art of TV signal processing, that the (R-Y), and (B-Y) signals may not lie on orthogonal axis in particular receivers. Thus angles Δθi different from those derived from the standard NTSC color axis relations shown in FIG. 1 will be employed.
FIG. 4 is an illustrative example of how the circuits of FIG. 3 may be realized using conventional circuit elements. In FIG. 4, the signals being processed are assumed to be in digital format such as pulse code modulated, PCM, binary format (either two's complemented signals or binary signals plus a sign bit). Depending on the signal sample rate and the processing speed of the devices, compensating delays may be required in certain of the signal paths, but one skilled in the art of circuit design would know where such delays would be necessary in his particular system.
In FIG. 4 the I and Q PCM signals are applied to terminals 10 and 11. These signals are respectively applied to absolute value circuits 50 and 51 which pass the magnitudes of the I and Q signals. The magnitudes of I and Q are applied as address codes to ROM's 53 and 54 which are programmed to produce the logarithms of the address codes applied to their respective address input ports. The signal corresponding to the log |I| is subtracted from the signal corresponding to the log |Q| in subtractor 55 which produces output signal codes corresponding to log (|Q|/|I|). These signal codes are applied along with the sign bits of signals I and Q as input address codes to ROM 57 (the I and Q sign bits being the most significant bit of the composite address code). ROM 57 is programmed to produce output codes corresponding to the arctangent (Q/I), i.e., angles θ. Since the codes produced by subtractor 55 were generated from the magnitudes |I| and |Q|, they only represent the range of angles from zero to 90 degrees. The I and Q sign bits added to the address codes, to ROM 57, provide the information needed to expand the angle information from zero to 360 degrees or from zero to ±180 degrees.
Assume that the N least significant bits of the ROM 57 address input are coupled to subtractor circuit 55, the N+1st bit is coupled to the Ia signal bit and the N+2nd bit is coupled to the Qa sign bit. Assume also that the sign bits are 0's for positive I or Q values and 1's for negative I or Q values. ROM 57 is programmed to output the arctangent of the antilog of the N least significant bits of the applied address code for the N+1st and N+2nd address bits both equal to "0". For the N+1st and N+2nd address bits being respectively 01, 11 and 10, corresponding to the three quadrants occurring clockwise starting from the lower righthand quadrant, ROM 57 is programmed to output signals corresponding to 180° minus; 180° plus; and 360° minus the arctangent of the antilog of the N least significant bits of the address code. In this manner ROM 57 produces angles over the range of 0-360 degrees.
The angle codes produced by ROM 57 are applied to adder 58 wherein static tint control is performed. Static tint control signals may be generated by the output of a ring counter 72, for example, which is selectively connected to oscillator 74 by a viewer controlled switch 73. Output values from counter 72 are applied to a second input port of adder circuit 58. The output codes from ring counter 72 are arranged to cycle through a series of consecutive increasing positive values and a series of consecutive negative values to respectively add to or subtract from the values of θ and thereby to rotate the chrominance vector in either direction.
PCM codes corresponding to angle θ' from ADDER 58 are applied to circuit 71 which produces flesh corrected PCM codes corresponding to angles Φ as described with reference to FIGS. 3 and 5. (Note in some applications the auto-flesh function may be programmed directly into the arctangent table incorporated in ROM 57.)
FIG. 4b illustrates a more detailed auto-flesh circuit 71' which has provisions for inactivation and which requries less memory than a full range of 0° to 360° angles. In element 71' the ROM 90 contains only enough memory angles, Φ, for the number of input angles which occur in the fleshtone range. For all other angles for which Φ=θ the input angles θ are routed around the ROM 90 and applied to an input port of multiplexer 91. The output of ROM 90 is applied to a second input port of multiplexer 91. Multiplexer 91, responsive to a logic high signal from OR gate 93 routes the angles θ around ROM 90 and directly to its output port, and applies angles Φ from ROM 90 when the OR gate output is low.
OR gate 93 produces a high output level responsive to the on/off switch 94 being in the OFF position or when the DECODER 92 output connection is high. DECODER 92 is arranged to receive the angle θ codewords and to output a high level for angles θ outside the fleshtone range. Signals from ROM 90 are applied to the circuit output only when the angles θ are in the fleshtone range and therefor ROM 90 need only contain angles Φ for angles θ in this range.
PCM codes Φ from element 71 are applied to subtractor 75 to which signal codes corresponding to the (R-Y), (B-Y) and (G-Y) matrixing angles ΔθR, ΔθB and ΔθG are applied. The Φ codes are applied to subtractor circuit 75 at an FSC sample rate. The three matrixing angle codes from storage element 77 (e.g., a ROM) are each multiplexed into the subtractor circuit 75 for each Φ codeword, sequentially generating the three difference angles (ΔθR -Φ), (ΔθB -θ) and ΔθG -Φ). This may be performed by clocking the ROM, at a 3FSC rate, resulting in the difference angles occurring at a 3FSC rate. The difference angles (Δθi -Φ) are applied to element 78 which may be a ROM programmed to generate the logarithms of the cosines of the angles applied as address codes thereto, which logarithms are applied to ADDER circuit 79. The log cosines (Δθi -Φ) are summed therein with the log (Gi C), the chrominance magnitude modified by the gain coefficients, to produce signal code words corresponding to log (Gi C cos (Δθi -Φ)). These signal codewords are applied to antilog circuit 83 which generates the sequence of signals (R-Y), (B-Y) and (G-Y) that are demultiplexed into latches 80, 81 and 82.
The magnitude, C, of the vector sum of I and Q in the FIG. 4 embodiment is generated according to the equation
C=|I|/|cos θ| (12)
To this end the angles θ from element 57 are applied as address codes to a ROM 59 which is programmed to produce the log |cos| of the angle θ signal codes applied to its address input. The log |cos θ| codewords from ROM 59 are applied to one input port of a subtractor circuit 60 wherein they are subtracted from the log |I| codewords from ROM 53 to produce a signal corresponding to log |I|/|cos θ|. This signal is applied to ADDER 70 and the ACC circuit including reference 61, comparator 62 and integrator 63. The ACC circuit generates a control signal which is proportional to the average difference between the magnitude of the chrominance signal and a predetermined value. The control signal is applied to an input port of the microprocessor 66 along with horizontal and vertical synchronizing signals and a chrominance saturation control signal. A ROM 67 supplies the coefficients gr, gb and gg to the microporcessor 66 which periodically calculates the products Gi =Acc·Sat·gi equal to the products of the Acc control signal, the saturation control signal and the respective projection coefficient.
It is noted that the coefficients Gi may also include a term to compensate for the different color phosphor efficiencies of the particular image display tube employed in the receiver. The microprocessor generates the logarithms of the composite gain factors Gi and outputs them to a buffer 68. From buffer 68 the log (Gi) gain factors are multiplexed at a 3FSC rate into ADDER 70 where they are added to the log |I|/|cos θ| signal to produce signal samples corresponding to log (Gi C). These samples or codewords are applied to adder 79 where they are combined with the log (cos (Δθi -Φ)) signals.
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|U.S. Classification||348/651, 348/652, 348/E09.04, 348/E09.047, 348/E09.037|
|International Classification||H04N9/64, H04N9/68, H04N9/67|
|Cooperative Classification||H04N9/67, H04N9/64, H04N9/643|
|European Classification||H04N9/64C, H04N9/67, H04N9/64|
|7 Jun 1983||AS||Assignment|
Owner name: RCA CORPORATION, A CORP. OF DEL.
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:CHIN, DANNY;BATTERMAN, ERIC P.;BOLGER, THOMAS V.;REEL/FRAME:004137/0761
Effective date: 19830603
|19 Nov 1985||CC||Certificate of correction|
|14 Apr 1988||AS||Assignment|
Owner name: RCA LICENSING CORPORATION, TWO INDEPENDENCE WAY, P
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:RCA CORPORATION, A CORP. OF DE;REEL/FRAME:004993/0131
Effective date: 19871208
|18 Nov 1988||FPAY||Fee payment|
Year of fee payment: 4
|20 Oct 1992||FPAY||Fee payment|
Year of fee payment: 8
|4 Nov 1996||FPAY||Fee payment|
Year of fee payment: 12