A choice is starting to emerge whereas designers can either take advantage of a homogenous fabrication process to obtain a true single chip solution or combine optimized but dissimilar technologies under a single roof. Developments this month indicate both schools of thought are progressing steadily.
Toshiba's ability to stack up to six active die opens the door for both memory and FPGA makers to extend way beyond their individual reaches. While initially being used to create single chip memory systems, it is not too inconceivable that this technology can be extended to incorporate an FPGA.
This could be beneficial to both memory and FPGA makers. From the memory makers side, they can now offer a single part that includes sweet spot densities of NOR and NAND Flash, SRAM, DRAM, memory interfaces and controllers, and bolt on logic to work directly with key target microprocessors, network processors, and DSPs.
What's more, the modern densities of FPGAs means that designers can implement core processors and peripherals on the same memory system chip. We now have a system in a chip which grew from the memory side up.
From the FPGA makers side, they can now offer the user programmability of their products tightly coupled and integrated with the external memory (RLDRAM, DDR, QDR, etc) that would otherwise take up PC board space. This leverages their core processor, peripheral, and memory interface IP offerings. This also better targets key applications. Here we have a system in a chip stemming from a processor/logic side.
To save vertical space, Toshiba reduced the Z axis thickness of the memory dies used. While this is great for the space critical applications, the system in a chip parts won't necessarily have to have this constraint. Also, FPGA's that are not too power hungry (heat dissipative) will have to be used, or, at least placed on top of the stack.
On the other side of the fence was news from Elpida that they have a new polymetal gate process that has implications for advancing the state of a system on a chip. Note the system in a chip vs the system on a chip approach.
This new process brings with it several benefits, but key here is the marriage between the optimized DRAM process and the microprocessor fabrication process. This may mean microprocessors and microcontrollers that have much more memory resources on chip than possible today. This may also open the door for new tightly coupled RAM based FPGA's side by side on a die with both simple and complex micros.
While there is a slight overlap of potential competition of both of these approaches, both have their place. The parts we have to play with for our next generations of designs may stem from advances like these that seem subtle, but can be far reaching.
Take the time to read this months reviews of Toshiba's stacking abilities (
and Elpida polymetal gate process (
for further information.