The back of the PCB features only eight of the sixteen total flash chips on the Vertex 3. All are aligned parallel to the long side of the drive as oriented with the etching positioned horizontally. The older generation vertex had only half of their chips lined this way with the remaining four oriented perpendicular to the first four along the long edges of the board.
The NAND itself is a 16GB density, ONFi 25nm Micron MLC which is the driving force behind the increased error correction capabilities of all the new SandForce controllers. As the manufacturing process shrinks, the number of errors generated skyrockets which must be amended by the error correction process or corrupt data would make for some miserable computing. In addition to the errors, the lifespan of the NAND drops considerably. Whereas the 34nm NAND is expected to support 10,000 program/erase (PE) cycles, the 25nm halves that to 5,000 PE cycles. This seems like a big problem but the general consensus is that even with higher than average use, the probability that a significant number of cells would wear out prior to losing their charge in 10 years is remote. Most people would likely upgrade long before then, anyway.
The other side of the PCB is configured like the first with the exception of the controller which sits on the SATA interface side of the drive. Again, this is a layout change from previous generations. The PCB is also OCZ branded because they do their own fabrication and don’t rely on the lowest bidder for their build and components.
As we talked about in the introduction, the SF-2281 controller powers the Vertex 3 and features all of the same DuraClass technology goodies as the enterprise SF-2582 controller. Updated is the FIPS-197 certified AES-256 encryption and support for a wider variety of flash including Toggle and ONFi2. In short, it’s a beast and it will be interesting to see how other controllers compete. As with the last generation, the controller relies on real-time data compression to get the most performance so benchmarks and activity using incompressible data will elicit the lowest performance.