Wow, what a Richard's nicknamish post. Evidently you are incapable of learning and have to make things personal. To quote from one of the links from which you evidently know better than:
"Instead of impulses, usually the sequence of numbers update the analogue voltage at uniform sampling intervals.
These numbers are written to the DAC, typically with a clock signal that causes each number to belatched in sequence, at which time the DAC output voltage changes rapidly from the previous value to the value represented by the currently latched number. The effect of this is that the output voltage is held in time at the current value until the next input number is latched resulting in a piecewise constant or 'staircase' shaped output. This is equivalent to a zero-order hold operation and has an effect on the frequency response of the reconstructed signal."
Your posts are worthless. Probably all of them are it seems.
What does your paragraph have to do with latency? Your paragraph talks about general quality loss from converting squarewave signal into sinewaves. Of course, it has an effect on FR, and what about it? :D
Mate, you need to get a referencing lesson from 00904, and stop linking worthless wiki posts that are off topic anyway.
Edited by Drake22 - 3/8/11 at 2:30pm