Keith M Wesolowski wrote:
> On Thu, Apr 05, 2001 at 01:29:13PM -0700, Jun Sun wrote:
> > I don't like bc_ops idea. Usually the external cache capability is still
> > integral part of the CPU.
> How can it be both an integral part of the CPU and board-specific?
Hmm, I am thinking about something like Rm7k, where the tertiary cache is
controlled by the CPU (through cache instruction and TagLo/TagHi regsiters,
etc) but the size is only known to the board.
I think some CPUs can have secondary, external cache but cannot figure the
size and, especially, the layout (# of ways, ...) automatically. (Any
Those are what I was referring to.
The key point is that machine_detection() should happen BEFORE
cpu_probe()/cache_probe() so that we have an elegant way to address the above