|Publication number||US7619479 B2|
|Application number||US 12/055,714|
|Publication date||Nov 17, 2009|
|Filing date||Mar 26, 2008|
|Priority date||Mar 26, 2007|
|Also published as||US20080290950|
|Publication number||055714, 12055714, US 7619479 B2, US 7619479B2, US-B2-7619479, US7619479 B2, US7619479B2|
|Inventors||Satoshi Azuhata, Makoto Yamamoto|
|Original Assignee||Panasonic Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (6), Referenced by (3), Classifications (5), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit having a DC-DC converter of a charge pump circuit type and configured so as to use its output as a reference voltage for an amplifier circuit.
2. Description of Related Art
Headphone amplifiers, video drivers, and other semiconductor circuits conventionally have required a ground potential to be used as the bias voltage of output signals, but since the ground potential was used as the reference potential of the circuits, the bias voltage of the output signals was positive. Accordingly, a bias voltage had to be converted to a ground potential by connecting a decoupling capacitor between the output and the load. However, some semiconductor circuits that have become popular in recent years have a negative power supply built into the semiconductor circuits to make the reference voltage negative, thereby permitting use of the bias voltage of the output signals as the ground potential without conversion. In such semiconductor circuits, an inverting charge pump circuit is used as a means for generating a negative power supply.
An example of such a semiconductor circuit with a built-in negative power supply has been disclosed, for instance, in the specification of U.S. Pat. No. 5,289,137. Below, the semiconductor circuit disclosed in the specification of U.S. Pat. No. 5,289,137 will be explained with reference to
The inverting charge pump circuit 22 uses the external power supply 24 as its power supply and outputs a negative voltage obtained by inverting the power-supply voltage (VCC) obtained from the external power supply 24 to a charge pump output terminal 27. At such time, the absolute value of the charge pump negative output voltage reaches a value (−VCC) nearly equal to the power-supply voltage obtained from the external power supply 24. In operation, the amplifier circuit 23 uses the charge pump negative output voltage (−VCC) as a reference voltage and external power supply 24 as its power supply.
Input signals to the amplifier circuit 23 are inputted via a signal input terminal 28 and output signals from the amplifier circuit 23 are outputted via a signal output terminal 29.
The incorporation of the negative power supply circuit in the semiconductor with a single power supply is made possible by sharing the power supplied by the external power supply 24 between the charge pump circuit 22 and amplifier circuit 23.
However, the problem with the circuit disclosed in the specification of U.S. Pat. No. 5,289,137 is that the maximum value of the voltage of the external power supply 24 has to be limited so as not to exceed the withstand voltage of the charge pump circuit 22 and amplifier circuit 23.
Considering the convenience of assembly in using the semiconductor chip 21, it is undesirable to limit the maximum value of the voltage of the external power supply 24. Although such a problem does not occur if the circuit is composed of elements possessing high withstand voltages, it becomes important to address this problem when using CMOS circuits, which are superior in terms of cost and power savings.
This problem is explained below with reference to
A withstand voltage of the amplifier circuit 23 is limited by a withstand voltage of the MOS transistors composing an inverter 30 of an output stage thereof. When designating this withstand voltage as Vr, the acceptable ΔVCC will be:
Thus, in comparison with an amplifier using a ground potential as the reference potential, an amplifier using a negative output voltage supplied by a charge pump circuit as a reference voltage has to suppress the amount of increase in the external power supply voltage relative to the usual value.
In addition, if ripples are generated in the external power supply 24, ripples with a 180° phase shift and identical magnitudes as shown in
Taking into account the above-described problems, it is an object of the present invention to provide a semiconductor circuit, wherein the maximum value of the external power supply voltage is not limited to a low value even when using a configuration utilizing a single external power supply and having a built-in inverting charge pump circuit. Moreover, it is another object of the present invention to decrease effects generated in the output signal when ripples are generated in the external power supply.
In order to solve the above-described problems, the semiconductor integrated circuit of the present invention includes a constant voltage regulator generating a predetermined constant voltage from an external power supply, an inverting charge pump circuit using an output of the constant voltage regulator as its power supply, and an amplifier circuit using the negative voltage outputted by the charge pump circuit as a reference voltage. The output voltage of the constant voltage regulator is set so that a potential difference between the output voltage of the constant voltage regulator and the output voltage of the charge pump circuit is not to exceed a withstand voltage of the amplifier circuit, and power is supplied to the constant voltage regulator and the amplifier circuit from a single external power supply.
In the charge pump circuit of the above-described configuration, the output voltage of the constant voltage regulator does not change even if there is an increase in the voltage of the single external power supply supplied to the semiconductor circuit, as a result of which the power supply voltage supplied to the charge pump circuit does not change and changes in the negative voltage output of the charge pump circuit can be prevented. Accordingly, even if the external power supply voltage increases, the voltage on the charge pump circuit always remains constant and it is possible to keep the amount of increase in the voltage on the amplifier circuit down to just the amount of increase in the external power supply voltage, thereby permitting an increase in the maximum value of the external power supply voltage while accounting for the withstand voltage.
Furthermore, even if ripples are generated in the external power supply, the ripples generated in the regulator output can be attenuated significantly in accordance with a ratio of removing variations of supply voltage in the constant voltage regulator, thereby reducing ripples generated in the charge pump output. As a result, the ripples in the output of the amplifier circuit driven with those positive and negative voltage can reduced.
A configuration can be used in which the constant voltage regulator comprises an operational amplifier constituting a non-inverting amplifier and a bandgap constant voltage source supplying a reference voltage to the operational amplifier, and the voltage of the constant voltage regulator is outputted upon amplification by the operational amplifier.
The output stage of the amplifier circuit may be constituted by an inverter composed of MOS transistors.
A semiconductor integrated circuit according to an embodiment of the present invention will be described below with reference to the drawings.
The charge pump circuit 2 has a flying capacitor 14 and output capacitor 15, which are connected externally to the semiconductor chip 1. Furthermore, a power supply voltage is supplied to the operational amplifiers 5, 8 from an external power supply 16. The output of the regulator circuit 3 is supplied as a power supply for the charge pump circuit 2. Moreover, the output of the charge pump circuit 2 is supplied as a reference voltage for the amplifier circuit 4.
The regulator circuit 3, which has a non-inverting amplifier formed therein by the operational amplifier 8, outputs a voltage obtained by using the bandgap constant voltage source 9 as a reference voltage and amplifying it via the operational amplifier 8. The amplification factor is determined by the ratio of the resistors 10 and 11. Designating the bandgap voltage outputted by the bandgap constant voltage source 9 as VBG, the resistance values of the resistors 10, 11 respectively as R10 and R11, and the regulator output voltage outputted by the regulator circuit 3 as VREG, the following holds true:
If the negative voltage required by the amplifier circuit 4 is −VSS, then the ratio of the resistors 10, 11 is set so that VREG=VSS. Since the output of the regulator circuit 3 is used as the power supply of the charge pump circuit 2, the current capability required for the output of the regulator circuit 3 is determined so as to enable supply of the maximum current flowing when the charge pump circuit 2 charges the flying capacitor 14. Since this current amount is quite large, it is necessary that the output transistor size of the operational amplifier 8 forming part of the regulator circuit 3 is sufficiently large. Furthermore, since the switching frequency of the charge pump circuit typically is in the range of from several hundred kHz to several MHz, it is necessary that the output has a sufficiently low impedance even when the regulator circuit 3 supplies current at a frequency in the range of from several hundred kHz to several MHz.
If the regulator circuit 3 is configured in the above-described manner, the bandgap constant voltage source 9 will have a constant value regardless of the voltage of the external power supply 16, and, as a result, the output voltage obtained by amplifying this voltage also will be a constant value. The negative output voltage of the charge pump circuit 2, which uses the regulator output as its power supply, is obtained by inversion of the regulator output voltage, and, if the regulator output is designated as VREG, the negative voltage generated by the charge pump circuit 2 will be −VREG, with its value also being a constant. At such time, the voltage on the charge pump circuit 2 will be
so as to be a value that will remain constant regardless of the voltage supplied by the external power supply 16. Therefore, as far as the charge pump circuit 2 is concerned, the value of the voltage of the external power supply 16 has no limitations so long as the regulator output voltage is set such that 2×VREG does not exceed the withstand voltage of the circuit.
Moreover, the amplifier circuit 4 constitutes an inverting amplifier, and the inverter 17 constituting an output stage amplifies input signals using the ground potential as a reference. A circuit is obtained in which the operational amplifier 5 uses the negative output voltage (−VREG) of the charge pump circuit 2 as a reference voltage, and, as a result, the bias voltage of the input signal can be set to 0V and amplification/output can be performed without converting the bias voltage.
If the resistance values of the resistors 6, 7 are designated as R6, R7 and the effective values of the input/output AC signals as Vin, Vout, then the output voltage of the amplifier circuit 4 will be:
Since the amplifier circuit 4 uses the external power supply 16 as its power supply, if the voltage of the external power supply 16 is designated as VCC, the voltage on the circuit will be:
If the external power supply voltage increases by ΔVCC, the voltage on the amplifier circuit 4 also will increase by ΔVCC, while VREG does not change because the regulator output voltage is constant. Thus, when the external power supply voltage increases by ΔVCC, a change of the voltage supplied to the amplifier circuit is 2×ΔVCC in the conventional configuration, but is merely ΔVCC in the present embodiment. A withstand voltage of the amplifier circuit 4 is limited by a withstand voltage of the MOS transistors of the inverter 17 constituting the output stage, and the acceptable ΔVCC in the conventional circuit was given by ΔVCC<(Vr−VCC)/2, where Vr designates the withstand voltage of the circuit. On the other hand, in the configuration of the present invention, it is given by:
which makes it possible to double the conventional acceptable ΔVCC. In this manner, in accordance with the present embodiment, it becomes possible to permit a greater range of fluctuation for the external power supply than in the prior art even in the case of semiconductor circuits having a built-in inverting charge pump circuit and a single external power supply.
Furthermore, in the conventional example of
On the contrary, in the present embodiment, even if ripples are generated in the external power supply 16 in
As described above, according to the semiconductor integrated circuit of the present invention, the maximum value of the external power supply voltage is not limited to a low value by the withstand voltage of the circuit elements when there is a built-in charge pump circuit, and the present invention is thus useful for headphone amplifiers, video drivers, and the like.
The invention may be embodied in other forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed in this application are to be considered in all respects as illustrative and not limiting. The scope of the invention is indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are intended to be embraced therein.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US5289137||May 25, 1993||Feb 22, 1994||Texas Instruments Incorporated||Single supply operational amplifier and charge pump device|
|US5686860 *||Sep 25, 1995||Nov 11, 1997||Motorola, Inc.||Amplifier and controlling apparatus operating from a unipolar power supply|
|US6922099 *||Oct 21, 2003||Jul 26, 2005||Saifun Semiconductors Ltd.||Class AB voltage regulator|
|US7378904 *||Oct 12, 2004||May 27, 2008||Texas Instruments Incorporated||Soft transitions between muted and unmuted states in class D audio amplifiers|
|US7414890 *||Nov 29, 2006||Aug 19, 2008||Samsung Electronics Co., Ltd.||Semiconductor device including a high voltage generation circuit and method of a generating high voltage|
|JP2000040385A||Title not available|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US7830209 *||Jan 19, 2009||Nov 9, 2010||Cirrus Logic, Inc.||Signal level selected efficiency in a charge pump power supply for a consumer device audio power output stage|
|US8004366 *||Oct 29, 2009||Aug 23, 2011||Texas Instruments Incorporated||Area and power efficient, high swing and monolitihic ground centered headphone amplifier circuit operable on a low voltage|
|US20110102082 *||Oct 29, 2009||May 5, 2011||Texas Instruments Incorporated||Minimal area, power efficient, high swing and monolitihic ground centered headphone amplifier circuit operable on a low voltage|
|U.S. Classification||330/297, 330/307|
|Sep 17, 2008||AS||Assignment|
Owner name: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:AZUHATA, SATOSHI;YAMAMOTO, MAKOTO;REEL/FRAME:021542/0218
Effective date: 20080522
|Nov 3, 2008||AS||Assignment|
Owner name: PANASONIC CORPORATION,JAPAN
Free format text: CHANGE OF NAME;ASSIGNOR:MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;REEL/FRAME:021779/0851
Effective date: 20081001
|Mar 7, 2013||FPAY||Fee payment|
Year of fee payment: 4