On Sat, Dec 20, 2003 at 12:52:49PM +0530, samavarthy c wrote:
> The MediaQ controller chip does not sit on the pci bus. The specification
> says that the chip address space ranges from xxx00000h to xxx80000h.
> This address space is broken into three regions.
> 1. The lower 256 Kbyte region (xxx00000h to xxx40000h) maps to the 256
> Kbyte internal SRAM and contains the graphics frame buffer.
> 2. The next region (xxx40000h to xxx42000h) is the 8 Kbyte register space,
> which is located just above the frame buffer.
> 3. The third region, (xxx42000h to xxx80000h) consisting of the remaining
> 248 Kbyte of address space is also mapped to the upper 248 Kbyte of
> internal SRAM. This address space is used to access non-graphics frame
> buffer memory such as buffers for USB.
> So The MediaQ is supposed to use the third region for storing the TD's and
> ED's basically its HCCA area. On MIPS VR4131 the start address of the third
> region would be 0xAA042000h. This is what I think I am supposed to fill in
> the HCCA register. Am I right?
Are you saying that this USB OHCI chip can only access its internal
SRAM ? In that case not only the HCCA area but all the TDs, EDs and
the data pointed to by the descriptors should be allocated there
(basically all data that would be normally accessed by the OHCI chip
as pci master).
> error "controller already in use". The ohci_base value passed was
> 0xAA040500 which is where the Host controllers registers of MediaQ are
Did you check the mapped address is correct (e.g. by reading the
revision field of the ohci_regs) ?
Dimitri Torfs | NSCE
email@example.com | Sint Stevens Woluwestraat 55
tel: +32 2 2908451 | 1130 Brussel
fax: +32 2 7262686 | Belgium