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High Speed Machine Characteristics
Parallel and Vector Algorithm Organization
2 other sections not shown
0ead architecture arithmetic operations arithmetic units array augmented matrix BANDED MATRIX bit vector BITD Calahan clock period COLUMN STORAGE compiler compress CONTIGUOUS control store Coverage E VG Cray Research CRAYe1 CYBER cyclic reduction DATA STRUCTURE data vector pointed decomposition descriptor diagonal efficiency elements ENGINEERING evaluation example execution Figure floating point FORTRAN fronteend functional units Gaussian Elimination hardware IB IB IB IDloating integer ITERATION Kascic kernel large banded LINKED TRIAD loop MATRIX MULTIPLICATION mean vector length MEGAFLOP memory banks MERGE MFLOPS MIMD multiply nodes non-zeros number of processors operands Organization & Coverage parallel performance PIPE pipeline RECURSION ROW STORAGE rowlike storage S)ft scalar processor Significance of Topic SIMD solution solved SPARSE MATRIX speedup startup STREAM substitution phase Transmit variables vector instruction vector operations vector processing vectorizable VG G F P words