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A design method to improve data-dependent peripheral component interconnect (PCI) bus power integrity (PI) by an adapted bus-inverted coding scheme is proposed. This method can effectively reduce the V DD fluctuations of PCI power/ground rails. In addition, a new measurement environment is put forth for PCI PI for the proposed method. Due to the special PCI bus characteristics, timing and space overhead of the proposed method are negligible. The experimental results show that adapting this method greatly improves all measured voltage fluctuation noise (VN) values ( VNWORST by 7%-17% and VNAVG by 35%-36%). Another advantage is that this self-contained technology is compatible with other technologies to improve PI. The proposed method can be extended to more PCI protocol versions (e.g., PCIe, PCI-X).