6.2 – Standards for IC packages: blessing or burden?
Written by obwain
Wednesday, 01 February 2006 00:00
(This column, which originally appeared in Global SMT & Packaging magazine 6.2 (Feb 2006), is also available as a free PDF.)
Since shortly after the introduction of the first ICs there has been an effort to put in place standards for IC packages.
Prior to the IC, discrete transistors had reasonably standard packages,
and before that vacuum tubes had pin outs that matched the sockets into
which they were to be placed for interconnection. Vacuum tube devices
also had key slots to prevent the user from placing the radial leaded
devices into the socket wrong.
The beginning of IC era was a bit bumpy. Competing packaging solutions were offered by pioneering IC competitors Texas Instruments and Fairchild, with TI opting for a flat ceramic package and Fairchild using a TO can device with more leads. Both packaging technologies can still be had today, but they have been overshadowed by myriad newer, more advanced IC packaging concepts that have been developed to address the exploding number of pins on ICs and the increasing speed and power associated with advanced silicon technologies.
Standards have long played a pivotal role in electronics industry. It has been noted in this column before that standards have served as a sort of ‘industrial-strength glue in that they have helped to hold the industry together. Standards greatly facilitated the nascent electronic design process and the evolution of CAD tools by providing proven and predictable land patterns around which testing equipment could be designed and manufactured. They also served as a foundation on which a base of understanding relative to assembly reliability could be built. Standards have driven the cost of electronic systems down by allowing manufactures to supply parts that were pin-for-pin compatible with their competitors, opening the door to a more cost-competitive industry.
However, there is a dark side to standards as well. Standards are slow to develop, and as consensus documents they tend to be base-lined on average solutions that may be suitable for average applications, but evolution demands something more than average. If standards are slavishly followed, evolution is impeded. The future is much less about certainty than it is about change. In fact, change is the only certainly. One must be willing to step away from the familiar if one is going to go about exploring and extending knowledge and understanding. Standards are tethers to the past, important tethers to be sure but tethers nonetheless. The stakes must be pulled out if progress is to be made. Once the new ground is secured, new standards can be developed and applied.
In the case of IC packaging, it is a simple reality that standards are not friendly to innovation. Demanding definitive I/O arrangements in familiar patterns may make for more orderly design but it also limits system performance potential. An exemplary area for discussion is volumetric system miniaturization and interconnection (VSMI), or 3D interconnection. One of the more innovative areas of electronics assembly and IC packaging in recent times, it is also least amenable to standardization. For innovative interconnection solutions to truly take to flight, they must be free of the fetters of standards. Something is lost, but so also is something gained in doing so. Thus, as we lose the solid footing of ground, we gain access to the limitless sky.
Of course, it must be granted that lessons will doubtless need to be learned, especially in the arenas of assembly, test and reliability, but the potential benefits to be gained in terms of performance increases, reduction in design spin count and decreases in power seem well worth the risks. Indeed, it is arguably an imperative. Change is, after all, a requirement for survival.
In summary, standards have an important place in the world of electronics manufacturing; however they are a double edged sword, a sword that can cut through some important impediments to manufacturing flow but that can also cut off innovation. As to the question posed in the title of this column, the answer is that standards are both a benefit and a burden. However, change is key to survival and so one must either be constantly prepared to move to change or they must prepare for extinction.
In closing, I would like to draw on the wisdom of one of the great sages of the 20th century. Winston Churchill observed that: "To improve is to change; to be perfect is to change often." I am reasonably confident that the great man was not thinking of standards for IC packaging and electronics manufacturing when he made this comment, but I think we can all see that it applies nevertheless.
1) Fjelstad, J. and Mitchell, C. "The Past, Present and Future of IC Packaging" Chip Scale Review, July 2004, pp 24-28
2) Fjelstad, J., Grundy, K. and Yasumura, G. "3-D Partitioning of Printed Circuit Design" Advanced Packaging, February 2005, pp 12-19
3) Fjelstad, J., "Freeing IC Package Design to Unleash Performance" Global SMT & Packaging, May 2005, Pg 4