Spartan®-6 LX and LXT FPGAs are available in various speed grades, with -3 having the highest performance. The DC and AC electrical parameters of the Automotive XA Spartan-6 FPGAs and Defense-grade Spartan-6Q FPGAs devices are equivalent to the commercial specifications except where noted. The timing characteristics of the commercial (XC) -2 speed grade industrial device are the same as for a -2 speed grade commercial device. The -2Q and -3Q speed grades are exclusively for the expanded (Q) temperature range. The timing characteristics are equivalent to those shown for the -2 and -3 speed grades for the Automotive and Defense-grade devices. Spartan-6 FPGA DC and AC characteristics are specified for commercial (C), industrial (I), and expanded (Q) temperature ranges. Only selected speed grades and/or devices might be available in the industrial or expanded temperature ranges for Automotive and Defense-grade devices. References to device names refer to all available variations of that part number (for example, LX75 could denote XQ6SLX75).The Spartan-6 FPGA -3N speed grade designates devices that do not support MCB functionality. All supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters included are common to popular designs and typical applications. Available device and package combinations can be found at:· DS160: Spartan-6 Family Overview DS170: Automotive XA Spartan-6 Family Overview DS172: Defense-Grade Spartan-6Q Family Overview
This Spartan-6 FPGA data sheet, part of an overall set of documentation on the Spartan-6 family of FPGAs, is available on the Xilinx website at http://www.xilinx.com/support/documentation/spartan-6.htm.
VCCINT VCCAUX VCCO VBATT VFS VREF Internal supply voltage relative to GND Auxiliary supply voltage relative to GND Output drivers supply voltage relative to GND Key memory battery backup supply LX100T, LX150, and LX150T only) External voltage supply for eFUSE programming LX100T, LX150, and LX150T only)(2) Input reference voltage
© 20092011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Zynq, Artix, Kintex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics Table 1: Absolute Maximum Ratings(1) (Cont'd)
DC Commercial 20% overshoot duration 8% overshoot duration(5) DC All user and dedicated Industrial I/Os 20% overshoot duration 4% overshoot duration(5) DC Expanded (Q) 20% overshoot duration VIN and VTS(3) I/O input voltage or voltage applied to 3-state output, relative to GND(4) Commercial 4% overshoot duration(5) 20% overshoot duration 10% overshoot duration Restricted to maximum of 100 user I/Os 20% overshoot duration Industrial 10% overshoot duration 8% overshoot duration(5) 20% overshoot duration Expanded (Q) 10% overshoot duration 8% overshoot duration(5) TSTG Storage temperature (ambient) Maximum soldering CSG324, CSG484, and FTG256) TSOL Maximum soldering temperature(6) (Pb-free packages: FGG484, FGG676, and FGG900) Maximum soldering temperature(6) (Pb packages: FG484, FG676, and FG900) Tj Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability. When programming eFUSE, VFS VCCAUX. Requires 40 mA current. For read mode, VFS can be between GND and 3.45 V. I/O absolute maximum limit applied to DC and AC signals. Overshoot duration is the percentage of a data period that the I/O is stressed beyond 3.45V. For I/O operation, refer UG381: Spartan-6 FPGA SelectIO Resources User Guide. Maximum percent overshoot duration to meet 4.40V maximum. For soldering guidelines and thermal considerations, see UG385: Spartan-6 FPGA Packaging and Pinout Specification.
-3N, -2 VCCINT Internal supply voltage relative to GND -1L VCCAUX(3)(4) Auxiliary supply voltage relative to GND VCCO(6)(7)(8) Output supply voltage relative to GND All I/O standards (except PCI) Commercial temperature (C) Industrial temperature (I) Expanded (Q) temperature Standard performance(2) Extended performance(2) Standard performance(2)
PCI I/O IIN(10) VBATT(11) Maximum current through pin using PCI I/O standard when forward biasing the clamp diode.(9) Commercial (C) and Industrial temperature (I) Expanded (Q) temperature Battery voltage relative to GND, LX100T, LX150, and LX150T only) Commercial (C) range Tj Junction temperature operating range Industrial temperature (I) range Expanded (Q) temperature range Notes:
All voltages are relative to ground. See Interface Performances for Memory Interfaces in Table 25. The extended performance range is specified for designs not using the standard VCCINT voltage range. The standard VCCINT voltage range is used for:
· Designs that do not use an MCB LX4 devices Devices in the or CPG196 packages Devices with the -3N speed grade
Recommended maximum voltage droop for VCCAUX is 10 mV/ms. During configuration, is 1.8V, then VCCAUX must be 2.5V. The -1L devices require VCCAUX = 2.5V when using the RSDS_33, PPDS_25, and PPDS_33 I/O standards on inputs. LVPECL_33 is not supported in the -1L devices. 6. Configuration data is retained even if VCCO drops 0V. 7. Includes VCCO 1.8V, 2.5V, and 3.3V. 8. For PCI systems, the transmitter and receiver should have common supplies for VCCO. 9. Devices with a -1L speed grade do not support Xilinx PCI IP. 10. Do not exceed a total 100 mA per bank. 11. VBATT is required to maintain the battery backed RAM (BBR) AES key when VCCAUX is not applied. Once VCCAUX is applied, VBATT can be unconnected. When BBR is not used, Xilinx recommends connecting to VCCAUX or GND. However, VBATT can be unconnected.