Certain industries, such as the automotive industry, require extensive testing of integrated circuits at high temperatures to ensure reliable performance in applications that are particularly intolerant of failures because of product safety concerns or other considerations. Testing at high temperatures simulates the conditions of use and also helps to identify and eliminate marginal devices that would be likely to fail prematurely. High temperatures also induce thermal stresses in the tester which can affect the positioning of the test probes on the test pads. The problem is complicated by the dynamic nature of the testing process as the wafer is repeatedly repositioned under the probe array. The process is becoming even more challenging as pad sizes shrink and testing temperatures increase. Probe mark analysis allows manufacturers to evaluate and optimize the testing process by examining the marks left by probes when they contact the test pads.
Physical contact between the probes of the tester and the test pads of the device leaves marks on the pads (probe marks) that carry valuable information about the probing process, such as the accuracy to the probe placement on the pad. Analysis of these marks reveals the true performance of the prober, probe card, and setup under actual test conditions. Automated probe mark analysis replaces time-consuming manual analysis, delivering statistically valid quantitative data in an easy-to-interpret format in minimal time. It enables the test engineer to rapidly assess the probing process, identify and analyze issues within the process and define solution options.
NXP Semiconductors (Germany) manufacturers a range of high performance mixed signal and standard products used in various applications. Demand for testing at higher temperatures (200°C) on smaller pads prompted a thorough evaluation of the probing process with three goals: 1) review existing process settings for soak time and realignment to optimize probe to pad accuracy (PTPA), 2) evaluate external tools for probing process analysis and 3) standardize probing process analysis procedures within the company. In the work described here, we evaluate a WaferWoRx (Rudolph Technologies, USA) automated probe mark analysis system, comparing it to existing in-house techniques for analyzing the effects of soak time, stepping patterns, and prober realignments in a high temperature production testing process.
Testing at temperature introduces thermal stress into the testing apparatus, affecting performance through a number of mechanisms, including thermal gradients in the probe card, changes in probe card stiffness, thermal expansion of head plate and probe card changer and changes in clearance (the distance from the chuck to the probe card). The process is made more challenging by the dynamic nature of the thermal effects, which change continuously as the heat source, the prober chuck, moves relative to the probe card.
The wafer is mounted on the prober chuck where it is heated and moved close to the probe card mounted in the tester headplate above (see Figure 1). After allowing time for the system to approach some state of thermal equilibration, the wafer is brought into contact with the probes and the test is performed. Each time the wafer is moved to test a different device the thermal gradient changes and the equilibrium is disturbed. At the beginning of this process the PCB is heated up while the head plate still remains rather uninfluenced. Over a longer period of time the head plate holding the probe card also heats up.
Figure 1 There are multiple sources of thermal stress in wafer probing at high temperature.
Several solutions have been proposed to prevent the effects of thermal stress, including modifications to probe card construction and materials, shielding the probe card, and heating the probe card to harmonize the temperature gradient. Our focus here is on online process solutions. These include implementing soak times, realigning the probes to the pads and finding the best stepping pattern. Soak times are brief periods during which the wafer is positioned close to the card to allow thermal equilibration. Defining the frequency and duration of soak times is part of the test process setup and can have a significant impact on the accuracy of probe placement.
Generally, longer soak times permit greater accuracy but increase the length (and cost) of the test. Thermal changes may also be addressed by periodically realigning the prober stage to the probe card. This process also adds time to the testing process, making the frequency and extent of realignment additional variables to be considered in optimizing the test process. Finally, the stepping pattern determines the direction and magnitude of the thermal gradient after each move. Again, it is the goal to identify the influence of each pattern on the thermal equilibrium, as well as on the probing time.