Transaction Debug With Verdi
SoC design is complex. It involves both software and hardware design that calls for a higher level of abstraction to ensure accurate verification. Transaction-level verification and debug offers this higher abstraction, while staying close to actual hardware signals. Traditionally, its use has been limited by the lack of a better mechanism and database to capture the critical information needed to do transaction debug, and a better way to view transaction data once captured. Through transaction debug, Verdi now enables users to maintain both the higher level of abstraction of a software debug environment with a direct connection to hardware signal data, thereby correlating their software and hardware debug approaches.