US 20090288425 A1
The present invention provides for a system and method for regulating and monitoring heat dissipation of an integrated circuit by employing a heat regulating device with a thermal structure net work assembly. Each thermal structure can act as a heat conducting pathway for inducing heat into and/or dissipating heat away from the integrated circuit, thus creating a more uniform temperature gradient across the semiconductor body.
1. A method for regulating heat flow in an integrated circuit, comprising:
providing an integrated circuit with a semiconductor body having hot spots generated therein;
a heat regulating device including:
at least one thermo-electrical structure for at least one of inducing heat into or dissipating generated heat away from a region of the semiconductor body;
at least one layer of a conductive material in contact with the thermo-electrical structure for conducting heat flow;
a control unit in communication with the heat regulating device;
creating a temperature grid of the integrated circuit showing a respective temperature for each region of the semiconductor body;
comparing the temperature of the region with an allowable temperature for the region;
controlling by the control unit an operation of the heat regulating device in response to data gathered by the at least one thermo-electrical structure.
2. A method for regulating heat flow in an integrated circuit according to
3. A method for regulating heat flow in an integrated circuit according to
4. A method for regulating heat flow in an integrated circuit according to
repeating the steps of creating, comparing and controlling at a regular interval.
5. A method for mitigating heat in an integrated circuit, comprising:
mapping a semiconductor body of the integrated circuit into grid blocks;
determining a temperature at each grid block; and
adjusting the function of at least one thermo-electrical structure based at least in part on the determined temperatures.
6. The method of
7. The method of
8. The method of
9. The method of
repeating the steps of determining the temperature at each grid block and adjusting the function of at least one thermo-electrical structure.
10. The method of
training a classification system for predicting the temperatures at the plurality of locations, based at least in part on the repeated determinations of temperature at each grid block, and the adjustments made to the function of thermo-electrical structures.
11. The method of
determining which thermo-electrical structures to activate to remove heat using the classification system.
12. The method of
13. A method for dissipating heat in an integrated circuit, comprising:
generating a map of a semiconductor body of the integrated circuit;
measuring a temperature at a plurality of locations on the semiconductor body;
recording the temperatures at the plurality of locations;
comparing the measured temperatures to a threshold temperature;
activating at least one thermo-electrical device to remove heat from a first location of the plurality of locations, the first location having a measured temperature above the threshold temperature.
14. The method of
observing temperature trends at one or more of the plurality of locations.
15. The method of
inferring future temperatures at the plurality of locations, based at least in part on the observing temperature trends.
16. The method of
17. The method of
activating at least one other thermo-electrical device to induce heat into at least one other of the plurality of locations, the at least one other location having a measured temperature below the threshold temperature.
18. The method of
determining which thermo-electrical devices to activate for removing heat or for inducing heat using an automatic classification system.
19. The method of
20. The method of
This application is a divisional of U.S. patent application Ser. No. 10/790,298, filed Mar. 1, 2004, entitled “HEAT REGULATING DEVICE FOR AN INTEGRATED CIRCUIT”, the entirety of which is incorporated herein by reference.
The invention described below generally relates to systems and methods for regulating heat in an integrated circuit device. (e.g. dissipating heat from hot spots, inducing heat into other areas of an integrated circuit device) and more particularly to a heat regulating device that facilitates such heat regulation.
Integrated semiconductor devices (IC's) or semiconductor devices are devices including small electronic circuits formed on a surface of a semiconductor wafer. These IC's or semiconductor devices are often fabricated in plurality on the wafer surface, or as part of a wafer. The wafer is then subdivided into discrete IC or semiconductor device chips or dice, and then further tested and assembled for customer use through various well-known individual die testing and packaging techniques. Depending upon size of the IC or semiconductor device and size of the wafer, a wafer may be divided into a few dice or as many as several hundred or more than one thousand discrete dice. The discrete IC or semiconductor device may be subsequently packaged in a variety of manners using lead frames, substrates, or similar processes.
As demand for electrical systems that operate at faster speeds, occupy less space, and provide more functionality increases, the size of associated integrated circuits typically decrease. Manufacturers, thus lean toward designs that employ increasingly more powerful modules containing numerous components that are placed in relatively close proximity on an integrated circuit board.
Accordingly, because of reduced over all form factors, the heat generated from the integrated circuit's microelectronics devices for a given unit of surface area per unit time increases leading to high temperatures in the device. These increased temperatures can potentially damage components of the integrated circuit, or reduce lifetime of the integrated circuit. Therefore, large amounts of heat produced by many such integrated circuits must be dissipated and accounted for in designing the integrated circuit mounting and packaging devices.
At the same time, the generated heat across such a chip is not uniformly distributed, since it contains both low power and high power circuits. Because high power circuits typically generate more heat than low power circuits, a temperature gradient across such a chip is not uniform and “hot-spots” are created. These localized “hot-spots” result in non-uniform heat distribution across the semiconductor body, which in turn can cause excessive, concentrated and non uniform chip stresses, leading eventually to chip failure.
Prior attempts to combat localized heating involve powering off (disabling) various functional units, which are not required for certain operations as to prevent potential fatal destruction. Strategically placed units may alleviate some localized heating problems, however, as chip densities increase and performance of computational-intense programs and operations require functional units to operate relatively non-stop, placement or layout on the chip has little or no effect. Typical implementations for powering off units involve a central controlling unit that disables functional units not required based on incoming/upcoming instructions or operations.
Other attempts have focused on adding multiple functional units and using each of the functional units in some alternating fashion. Even with such techniques, localized heating problems still remain with each functional unit as actual power dissipates within the neighborhood area or space of that unit.
The following presents a simplified summary of the invention in order to provide a basic understanding of one or more aspects of the invention. This summary is not an extensive overview of the invention. It is not intended to identify key or critical elements of the invention, or to delineate the scope of the present invention. Rather, the sole purpose of this summary is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention is directed to a system and method for regulating and monitoring heat dissipation of a semiconductor device, in particular to removing generated heat from hot spot areas and/or inducing heat at other areas of the semiconductor chip to facilitate providing for a uniform temperature gradient across a semiconductor body.
According to one aspect of the present invention, regulating and monitoring the integrated circuit's heat dissipation is accomplished by employing an assembly of thermo-electrical structures spread on the surface of a heat regulating device. This spreading assembly can couple with hot spots generated at a portion of the semiconductor chip that rests on a heat regulating device. Accordingly, each one of the thermo-electrical structures of the spreading assembly provides for a heat conducting path that can dissipate heat from the hot spots and into the various heat conducting layers, or associated heat sinks, of the heat regulating device. Likewise, each one of the thermo-electrical structure can act as a heat induction path to induce heat in various regions of the semiconductor, thus creating a more uniform temperature gradient throughout the semiconductor body. This can typically reduce accumulation and concentration of stress that adversely affects the semiconductor body.
In one aspect according to the present invention the thermo-electrical structure is a portion of the conductive body of the heat regulating device itself, which is embedded with various electronic components to monitor and regulate the heat flow into and out of the various regions of the semiconductor chip. In another aspect according to the present invention, the thermo-electrical structure can be a trough formed on the surface of the heat regulating device, with various electronic components embedded therein. Each thermo-electrical structure can be physically, thermally or electrically attached to the body or a surface of the heat regulating device. The thermo-electrical structure can further include various electronic circuitry and components in a variety of planar or three dimensional arrangements as to monitor, regulate and over all manage heat flow away and into the semiconductor body of the integrated circuit. Moreover, in another aspect according to the present invention a number of the thermo-electrical structures are operatively connected to one another as to form a spreading assembly, which sits beneath the bottom portion of the integrated circuit.
Furthermore, each thermo-electrical structure can have the shape of a spiral, twister, corkscrew, maze, or other structural shapes with a denser pattern distribution of lines in one portion and a relatively less dense pattern distribution of lines in other portions. The thermo-electrical structures can include further electronic circuitry to monitor the heat flow and temperature of a desired semiconductor region as a function of; the power output, location of the region where heat is flowing in or out of, and other physical variables associated with the semiconductor or the electric current.
Additionally, the thermo-electrical structure assembly can be a composite composed of a layer having various portions, each tailored to the heat-generating characteristics of the various regions of the semiconductor. For example, one portion may be formed of a material that provides relatively high isotropic conductivity and another portion may be formed of a material that provides high thermal conductivity in another direction.
Another aspect of the invention provides for a heat regulating device with a base or back plate that can be kept in direct contact with a hot spot region of the semiconductor. The base plate can include a heat promoting section and main base plate section. The heat promoting section is for promoting heat transfer between the semiconductor device and the heat regulating device. The main base plate section has the thermo-electrical structures embedded inside. This permits for the heat generated from a semiconductor component to be initially diffused or dispersed through the whole main base plate section and then into the thermo-electrical structure assembly. In another aspect according to the present invention the spreading assembly is connected to a heat sink.
Another version of the invention provides for a semiconductor device that is integrated with the heat regulating device and the thermo-electrical structures are positioned in the regions where hot spots are anticipated, such as beneath the components of the integrated circuit that have a high power dissipation rate.
In another aspect of the invention, the assembly of thermo-electrical structures is connected to form a network with its operation controlled by a controller. In response to data gathered by the thermo-electrical structure assembly, the controller determines which thermal structure should direct heat into or take heat out of the semiconductor body, so that the hot spots are eliminated and a more uniform temperature gradient is achieved in the semiconductor.
To the accomplishment of the foregoing and related ends, certain illustrative aspects of the invention are described herein in connection with the following description and the annexed drawings, which are not to scale. These aspects are, however, indicative of but a few of the various ways in which the principles of the invention may be employed. Other aspects, advantages and novel features of the invention may become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
The various aspects of the present invention will now be described with reference to the drawings. The invention provides a system and methodology for regulating and monitoring heat dissipation of a semiconductor device, by employing an assembly of thermo-electrical structures that in part form a heat regulating device.
As used in this application, the term “computer component” or “system” is intended to refer to a computer-related entity, either hardware, a combination of hardware and software, software, or software in execution. For example, a computer component may be, but is not limited to being, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a server and the server can be a computer component. One or more computer components may reside within a process and/or thread of execution and a component may be localized on one computer and/or distributed between two or more computers.
As used herein, the term “inference” refers generally to the process of reasoning about or inferring states of the system, environment, and/or user from a set of observations as captured via events and/or data. Inference can be employed to identify a specific context or action, or can generate a probability distribution over states, for example. The inference can be probabilistic—that is, the computation of a probability distribution over states of interest based on a consideration of data and events. Inference can also refer to techniques employed for composing higher-level events from a set of events and/or data. Such inference results in the construction of new events or actions from a set of observed events and/or stored event data, whether or not the events are correlated in close temporal proximity, and whether the events and data come from one or several event and data sources.
The subject invention (e.g., in connection with choosing region(s) for heating and/or dissipating heat) can employ various artificial intelligence based schemes for carrying out various aspects of the subject invention. For example, a process for determining which region to be selected can be facilitated via an automatic classification system and process. Such classification can employ a probabilistic and/or statistical-based analysis (e.g., factoring into the analysis utilities and costs) to prognose or infer an action that is desired to be automatically performed. For example, a support vector machine (SVM) classifier can be employed. A classifier is a function that maps an input attribute vector, x=(x1, x2, x3, x4, xn), to a confidence that the input belongs to a class—that is, f(x)=confidence(class). Other classification approaches include Bayesian networks, decision trees, and probabilistic classification models providing different patterns of independence can be employed. Classification as used herein also is inclusive of statistical regression that is utilized to develop models of priority.
As will be readily appreciated from the subject specification, the subject invention can employ classifiers that are explicitly trained (e.g., via a generic training data) as well as implicitly trained (e.g., via observing system behavior, receiving extrinsic information) so that the classifier(s) is used to automatically determine according to a predetermined criteria which regions to choose. For example, with respect to SVM's which are well understood—it is to be appreciated that other classifier models may also be utilized such as Naive Bayes, Bayes Net, decision tree and other learning models—SVM's are configured via a learning or training phase within a classifier constructor and feature selection module.
Referring initially to
Referring now to
The semiconductor 20 may be divided into an exemplary grid pattern as that shown in
Referring now to
In one aspect according to the present invention, during a typical operation of the semiconductor device the location of the hot spots are anticipated, or determined via temperature monitoring, and the corresponding thermo-electrical structure that matches the hot spots is activated as to take away the heat from the hot spot regions and/or induce heat to other regions of the semiconductor body to create a uniform temperature gradient.
The microprocessor can be part of a control unit 78 that has the ability to sense or display information, or convert analog information into digital, or perform mathematical manipulation of digital data, or interpret the result of mathematical manipulation, or make decisions on the basis of the information. As such, the control unit can be logic unit, a computer or any other intelligent device capable of making decisions based on the data gathered by the thermo-electrical structure and the information provided to it by the heat regulating device. The control unit 78 designates which thermo-electrical structures should be taking away heat from the hot spots, and/or which thermo-electrical structure should induce heat into the semiconductor body and/or which one of the thermo-electrical structures should remain inactive. The heat regulating device provides the control unit with data gathered continuously by the thermo-electrical structures about various physical properties of the different regions of the semiconductor body, such as, temperature, power dissipation and the like. In addition, a suitable power supply 79 provides operating power to the control unit 78.
Based on the data provided, the control unit 78 makes a decision about the operation of the various portions of the thermo-electrical structure assembly, e.g. deciding what number of the thermo-electrical structures should dissipate heat away and from which hot spots, and which ones should induce heat to create a more uniform temperature gradient across the integrated circuit. Accordingly, the control unit 78 controls the heat regulating device 72, which in turn adjusts the heat flow away from and/or into the semiconductor body 74. In another aspect according to the present invention the semiconductor device 74 is coupled together with the heat regulating device 72, by techniques such as brazing, pressure welding by forging, deformation together with intermeshing and any combination thereof. Such construction permits the heat regulating device to directly contact the semiconductor body, so that heat generated from the electronic components of the integrated circuit may be effectively regulated.
Referring now to
If the temperature for that region exceeds the acceptable temperature of that region at that particular time, i.e. function 908 is selected, the region's respective thermo-electrical structure is activated to dissipate the heat for that region. However, if the temperature is below the acceptable temperature, i.e. function 910 is selected, then the region is considered as a potential choice for inducing heat as to create a more uniform temperature gradient throughout the semiconductor body. Accordingly, at any specific time the logic unit can control from which areas, if any, heat should be dissipated and to which areas, if any, heat should be induced.
With reference to
The system bus 1018 can be any of several types of bus structure(s) including the memory bus or memory controller, a peripheral bus or external bus, and/or a local bus using any variety of available bus architectures including, but not limited to, an 8-bit bus, Industrial Standard Architecture (ISA), Micro-Channel Architecture (MSA), Extended ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Universal Serial Bus (USB), Advanced Graphics Port (AGP), Personal Computer Memory Card International Association bus (PCMCIA), and Small Computer Systems Interface (SCSI).
The system memory 1016 includes volatile memory 1020 and nonvolatile memory 1022. The basic input/output system (BIOS), containing the basic routines to transfer information between elements within the computer 1012, such as during start-up, is stored in nonvolatile memory 1022. By way of illustration, and not limitation, nonvolatile memory 1022 can include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), or flash memory. Volatile memory 1020 includes random access memory (RAM), which acts as external cache memory. By way of illustration and not limitation, RAM is available in many forms such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and direct Rambus RAM (DRRAM).
Computer 1012 also includes removable/nonremovable, volatile/nonvolatile computer storage media.
It is to be appreciated that
A user enters commands or information into the computer 1012 through input device(s) 1036. Input devices 1036 include, but are not limited to, a pointing device such as a mouse, trackball, stylus, touch pad, keyboard, microphone, joystick, game pad, satellite dish, scanner, TV tuner card, digital camera, digital video camera, web camera, and the like. These and other input devices connect to the processing unit 1014 through the system bus 1018 via interface port(s) 1038. Interface port(s) 1038 include, for example, a serial port, a parallel port, a game port, and a universal serial bus (USB). Output device(s) 1040 use some of the same type of ports as input device(s) 1036. Thus, for example, a USB port may be used to provide input to computer 1012, and to output information from computer 1012 to an output device 1040. Output adapter 1042 is provided to illustrate that there are some output devices 1040 like monitors, speakers, and printers among other output devices 1040 that require special adapters. The output adapters 1042 include, by way of illustration and not limitation, video and sound cards that provide a means of connection between the output device 1040 and the system bus 1018. It should be noted that other devices and/or systems of devices provide both input and output capabilities such as remote computer(s) 1044.
Computer 1012 can operate in a networked environment using logical connections to one or more remote computers, such as remote computer(s) 1044. The remote computer(s) 1044 can be a personal computer, a server, a router, a network PC, a workstation, a microprocessor based appliance, a peer device or other common network node and the like, and typically includes many or all of the elements described relative to computer 1012. For purposes of brevity, only a memory storage device 1046 is illustrated with remote computer(s) 1044. Remote computer(s) 1044 is logically connected to computer 1012 through a network interface 1048 and then physically connected via communication connection 1050. Network interface 1048 encompasses communication networks such as local-area networks (LAN) and wide-area networks (WAN). LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), Ethernet/IEEE 802.3, Token Ring/IEEE 802.5 and the like. WAN technologies include, but are not limited to, point-to-point links, circuit switching networks like Integrated Services Digital Networks (ISDN) and variations thereon, packet switching networks, and Digital Subscriber Lines (DSL).
Communication connection(s) 1050 refers to the hardware/software employed to connect the network interface 1048 to the bus 1018. While communication connection 1550 is shown for illustrative clarity inside computer 1012, it can also be external to computer 1012. The hardware/software necessary for connection to the network interface 1048 includes, for exemplary purposes only, internal and external technologies such as, modems including regular telephone grade modems, cable modems and DSL modems, ISDN adapters, and Ethernet cards.
What has been described above includes examples of the present invention. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the present invention, but one of ordinary skill in the art may recognize that many further combinations and permutations of the present invention are possible. Accordingly, the present invention is intended to embrace all such alterations, modifications and variations that fall within the spirit and scope of the appended claims. Furthermore, to the extent that the term “includes” is used in either the detailed description or the claims, such term is intended to be inclusive in a manner similar to the term “comprising” as “comprising” is interpreted when employed as a transitional word in a claim.