Understanding MCU sleep modes and energy savings
Whether they’re used in smart meters, wireless sensor nodes, or mobile health monitoring products, microcontrollers (MCUs) are at the heart of almost every real-time application that demands prompt, predictable response to real-world events. In many of these applications the MCU relies on sophisticated sleep mode techniques that suspend most or all of its operations to minimize energy consumption, allowing it to run for years or even decades on limited energy sources.
These real-time low-energy environments pose special challenges for the designer and programmer because the same sleep states that reduce an MCU’s energy consumption often also reduce its ability to quickly respond to an event.
Low-power modes typically range from a light sleep or standby mode, through deep-sleep, to off (Figure 1). Each has a progressively lower level of CPU, memory, and I/O functionality as more peripheral blocks are switched off. The specific functionality of each idle, sleep, and deep-sleep mode varies from processor to processor but the fundamentals are the same. Generally, the deeper the sleep, the less power is consumed by the MCU.
The simplest mode for the designer to deal with is the sleep or standby mode. This enables a quick return to active mode, usually via an interrupt. But the cost for this level of responsiveness and simplicity is relatively high power consumption.
In sleep mode, the MCU’s high-frequency clock oscillator remains running, but the clock tree that drives the CPU circuitry is disabled. This enables the CPU to resume executing instructions on the next clock cycle following the wake-up trigger. MCUs developed during the last decade employ extensive clock gating to cut off the clock signal to circuits that are not needed on any given cycle. This mode effectively provides clock gating across the entire CPU. However, the primary clock needs to continue to run to guarantee this level of response.
A number of advanced MCUs use on-chip phase-locked loops (PLLs), generally driven by a low-frequency quartz crystal, to generate the various clocks used by the processor core and other peripherals. For maximum energy saving these PLLs are best powered down when the blocks they drive are expected to be inactive. PLLs call for a constant current to maintain a lock. When starting up, it therefore takes time before the PLL is ready to provide a stable clock signal.
In standby mode, the high-frequency peripheral clock trees are commonly kept active, allowing autonomous functioning of high-speed peripherals such as direct memory access (DMA), high-speed serial ports, analog-to-digital and digital-to-analog converters, and AES encryption/decryption. RAM remains active and can be accessed by the DMA controller, allowing data retrieved by peripherals to be stored without CPU intervention. The MCU’s pointer and configuration registers’ states are preserved, also to minimize delay.
When a processor core is fully powered down, its software state must be saved to memory – either battery-backed SRAM or flash. Restoration can take thousands of clock cycles as this state data is fetched from the backup memory. A lighter sleep mode may keep the PLLs running and the core registers powered, albeit at a lower voltage, to allow them to 'drowse' with a lower power draw than during normal operation.
Power consumption in this mode can range from 45μA/MHz for an energy-optimized MCU to more than 200µA/MHz.
A deeper sleep saves more power
The next level is typically deep sleep, which leaves the MCU’s critical elements active while disabling high-frequency system clocks and other non-essential loads. In this mode the high frequency MCU oscillator is disabled but the oscillator used to drive critical peripherals is kept running. These may include the real-time clock (RTC) and watchdog timer as well as power-on reset and brown-out detection circuitry.
Energy-optimized MCUs may add a number of other peripherals to this list to improve overall energy efficiency - for example serial ports, the touchscreen interface, LCD drivers, and USB bus controller. These allow the system to process I/O without waking the CPU core until absolutely necessary, so that it can sleep and save energy for longer.
Full retention of RAM and CPU registers allows the MCU to quickly return to active state and resume program execution. In this mode, power consumption can range from less than 1μA for an energy-optimized MCU to 50μA: a wide performance range means designers need to choose devices carefully. The time to return to fully active from this state can range from 5µs to 8µs.
Some MCU families offer a lower-power 'stop' mode that enables further power savings while retaining limited autonomous peripheral activity and fast wake-up.
In this mode the high- and low-frequency oscillators are disabled but the state of the MCU’s pointer and configuration registers may be preserved depending on the tradeoff between static power consumption and wakeup time.
An advanced MCU able to take advantage of power-management circuitry can provide a current draw of just 0.59μA and still retain full register and RAM contents. For other MCUs the current consumption can range from 10μA to 30μA. The time to return to active mode will vary from only 2µs for the optimized design to 8µs. Again, the variations in specification are substantial; the designer can make substantial improvements by choosing the right MCU for the task.
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