Adding X states to represent unknown values can provide significant benefits in RTL verification. But in RTL design, X tells the synthesis tool that it doesn't matter whether (“don’t care”) a 0 or 1 is assigned during logic optimization and in verification, X tells the simulator that a signal value is “unknown”. This mis-match in meaning and incomplete test vectors in simulation can hide bugs that are likely to show up in silicon. Current simulation tools are dependent on the quality of the test stimulus to detect X-related issues. On the other hand, formal verification excels at rooting out bugs to the last corner case.
JasperGold X-Propagation Verification App
Jasper provides the JasperGold X-Propagation Verification App as part of the family of JasperGold Apps to address an array of design and verification issues. The JasperGold X-Propagation Verification App provides a flow for a low-effort, high ROI X-propagation checking solution. This is due to several inherent advantages of Jasper’s technology, especially its ability to accurately model the X behavior without the need for any abstraction so the results reflect the real hardware and the ease of generating and debugging X-propagation properties.
Learn about the JasperGold X-Propagation Verification App.
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