A more complex example is the LocalLink protocol from Xilinx.
This is a synchronous packet proctocol (compare with the asynchronous four-phase handshake just described).
Like the four-phase handshake, LocalLink has contra-flowing request and acknowledge signals. But data is not qualified by a request transition: instead it is qualified as valid on any positive clock edge where both request and acknowledge are asserted.
The interface nets for an eight-bit transmitting interface are:
input clk; output [7:0] xxx_data; // The data itself output xxx_sof_n; // Start of frame output xxx_eof_n; // End of frame output xxx_src_rdy_n; // Req input xxx_dst_rdy_n; // Ack
Start and end of frame signals delimit the packets. All control signals are active low (denoted with the underscore n suffix).
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