Programming embedded systems
with Embedded System Access (ESA)
Embedded System Access Technologies especially for software validation and programming Flash, PLD and Micocontrollers (MCU).
Embedded Diagnostics Test (EDT)
The Embedded Diagnostics Test uses the native processor not only to execute tests but also to process diagnostics routines. Since all operations are performed in real time, it is not only possible to detect dynamic faults, but also to optimise performance.
For this purpose, special testing software is introduced via JTAG. The software can also be loaded via a fast communication interface. Hence, the native microprocessor is the access point to the system. The system‘s integrated test functions are activated by means of corresponding commands. In the event of a fault, the diagnosis is performed directly in the system. In addition, the EDT can also be used in the form of a resident power-on self-test (POST).
Furthermore, the combination of EDT with system JTAG (SJTAG) offers interesting technical options to identify hardcore faults in complex systems.
In-System Programming (ISP)
In-System-Programming (ISP) is a collective term for the programming of flash devices by means of Boundary Scan and for the programming of PLD/FPGA devices through their Test Access port (TAP) and builtin programming registers, while the devices are mounted on the printed circuit board.
For In-System Programming of PLD/FGPA, special standards exist, such as IEEE 1532, JESD-71, and an industrial standard called Serial Vector Format (SVF).
A new feature in the field of ISP is flash programming through FPGA-based instruments (FPGA Assisted Programming). These are special Chip-embedded Instruments (soft macros), which lead to drastic improvements in programming speed.
In-Application Programming (IAP)
Core Assisted Programming (CAP)
The premise of the Core-Assisted Programming (CAP) strategy is similar to processor emulation testing. The processor is controlled through its native debug interface in such a way that allows flash or FPGA (design permitting) connected to the system bus to be erased, programmed, and verified.
In the case of flash it does not matter whether it is integrated in the micro controller unit (on-chip flash) or connected as external, discrete flash device.
Furthermore, it is possible to load only the flash handler/programming engine via JTAG into the processor and to download the flash data image through a high-speed communication interface on the processor. CAP technology provides a much higher In-System Programming speed than Boundary Scan based device programming.
System JTAG (SJTAG)
While remote control via an external controller is possible, System JTAG typically employs a central test control unit integrated directly into the system design. Test vectors are usually stored locally on the system and a separate IC is commonly used as the test bus controller. There is currently a SJTAG initiative in progress to standardise this process.