|Publication number||US8046669 B2|
|Application number||US 13/007,004|
|Publication date||Oct 25, 2011|
|Filing date||Jan 14, 2011|
|Priority date||Feb 28, 2005|
|Also published as||US7730384, US7941732, US20060195772, US20100185924, US20110119566|
|Publication number||007004, 13007004, US 8046669 B2, US 8046669B2, US-B2-8046669, US8046669 B2, US8046669B2|
|Inventors||Nils Graef, Zachary Keirn|
|Original Assignee||Agere Systems Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (30), Referenced by (1), Classifications (9), Legal Events (2) |
|External Links: USPTO, USPTO Assignment, Espacenet|
Method and apparatus for evaluating performance of a read channel
US 8046669 B2
Methods and apparatus are provided for measuring the performance of a read channel. A number of detection techniques, such as SOVA and maximum-a-posteriori (MAP) detectors, produce a bit decision and a corresponding reliability value associated with the bit decision. The reliability value associated with the bit decision may be expressed, for example, in the form of log likelihood ratios (LLRs). The reliability value can be monitored and used as a performance measure. The present invention provides a channel performance measure that generally correlates directly to the BER but can be collected in less time.
1. A system for measuring performance in a read channel, comprising:
a memory; and
at least one processor, coupled to the memory, operative to:
obtain one or more soft bit decisions for a bit read on said read channel, wherein each of said soft bit decisions is a decision on a value of a bit;
determine a reliability value based on said one or more soft bit decisions, wherein said reliability value is a measure of probability for said bit read on said read channel;
determine a performance of said read channel based on a number of occurrences of said reliability value in a plurality of ranges; and
provide said number of occurrences to tune a channel and thereby improve said performance of said read channel.
2. The system of claim 1, wherein said one or more soft bit decisions are obtained from a soft output Viterbi detector or a maximum-a-posteriori (MAP) detector.
3. The system of claim 1
, wherein a soft value associated with said one or more soft bit decisions is a normalized value between 0 and 1 indicating a probability for a detected bit having a given binary value of 0 or 1, and where a value of 0.5 denotes a lowest possible bit reliability, wherein said reliability value is computed as follows:
4. The system of claim 1, wherein said processor is further configured to obtain a hard bit decision, hard_value, and a soft value associated with said one or more soft bit decisions, and wherein said reliability value is computed as follows:
5. The system of claim 4, wherein said hard bit decision is obtained from a bit-sequence generator.
6. The system of claim 1, wherein said number of occurrences is determined by comparing said reliability value to a number of threshold values and counting said number of occurrences said reliability value is in each range defined by said thresholds.
7. The system of claim 6, wherein said thresholds are programmable.
8. The system of claim 6, wherein said processor is further configured to generate one or more histograms based on one or more of said counted number of occurrences.
9. The system of claim 8, wherein said processor is further configured to increase a granularity of said one or more histograms by performing multiple reads of the same data with different threshold settings.
10. The system of claim 1, wherein said processor is further configured to accumulate several samples of said reliability value.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a divisional of U.S. patent application Ser. No. 12/750,049, filed Mar. 30, 2010, which is a divisional of U.S. patent application Ser. No. 11/068,224, filed Feb. 28, 2005, each incorporated by reference herein.
FIELD OF THE INVENTION
The present invention relates generally to evaluating the performance of a read channel, and more particularly, to methods and apparatus for evaluating the performance of read channels that employ soft output Viterbi detection.
BACKGROUND OF THE INVENTION
A magnetic recording read channel converts an analog read channel into an estimate of the user data recorded on a magnetic medium. Read heads and magnetic media introduce noise and other distortions into the read signal. As the information densities in magnetic recording increase, the intersymbol interference (ISI) becomes more severe as well. In read channel chips, a Viterbi detector is typically used to detect the read data bits in the presence of intersymbol interference and noise.
The Soft Output Viterbi Algorithm (SOVA) is a well known technique for generating soft decisions inside a Viterbi detector. A soft decision provides a detected bit with a corresponding reliability. These soft decisions can be used by an outer detector to improve the error rate performance of the overall system. For a more detailed discussion of SOVA detectors, see, for example, J. Hagenauer and P. Hoeher, “Viterbi Algorithm with Soft-decision Outputs and its Applications,” IEEE Global Telecommunications Conference (GLOBECOM), vol. 3, 1680-1686 (November 1989).
Various parameters of a magnetic recording read channel are typically adjusted to improve the Bit Error Rate (BER) performance. While measuring the BER provides the most accurate measure of performance, the BER measurement is unduly time consuming. A number of techniques have been proposed or suggested for obtaining performance measures based on the mean squared error or other derivatives of an error term derived from decoding the bit sequence and then re-creating the ideal pattern. Although these techniques are generally fast, they are not guaranteed to correlate directly with the BER.
A need therefore exists for an improved method and apparatus for obtaining performance measures without measuring the BER. A further need exists for a method and apparatus for obtaining performance measures in a read channel that are directly correlated to BER but takes much less time to collect.
SUMMARY OF THE INVENTION
Generally, methods and apparatus are provided for measuring the performance of a read channel. A number of detection techniques, such as SOVA and maximum-a-posteriori (MAP) detectors, produce a bit decision and a corresponding reliability value associated with the bit decision. The present invention recognizes that the reliability value can be monitored and used as a performance measure. The present invention provides a channel performance measure that generally correlates directly to the BER but can be collected in less time.
According to one aspect of the present invention, the reliability values derived from the “soft_value” provided by a SOVA detector are monitored as a performance measure. The reliability values can be accumulated or used to generate a histogram (or both). In one exemplary implementation, a counter is configured to count the number of occurrences of the reliability in each of a number of threshold ranges. In this manner, a histogram of reliability values can be generated.
A more complete understanding of the present invention, as well as further features and advantages of the present invention, will be obtained by reference to the following detailed description and drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic block diagram illustrating a reliability monitor incorporating features of the present invention;
FIG. 2 illustrates a number of exemplary ranges defined by the programmable threshold values used by the comparator of FIG. 1; and
FIG. 3 is a schematic block diagram illustrating a portion of a reliability monitor in accordance with an alternate implementation of the present invention.
As previously indicated, SOVA techniques produce both a bit decision and a corresponding reliability value associated with the bit decision. The present invention recognizes that the reliability value can be monitored and used as a performance measure. In particular, the present invention provides a channel performance measure that generally correlates directly to the BER but can be collected in less time. According to one aspect of the present invention, the reliability values derived from the “soft value” provided by a SOVA detector are accumulated, optionally used to generate a histogram, and then monitored as a performance measure for tuning the channel and recording system optimally. The reliability values may be provided by the SOVA detector, for example, in the form of log likelihood ratios (LLRs). The SOVA detector could be replaced by another soft-output detector, such as a maximum-a-posteriori (MAP) detector, as would be apparent to a person of ordinary skill.
In one exemplary implementation of the invention, a threshold device is employed that can be programmed to a range of values covering the reliability mapping. A counter is configured to count the number of occurrences at each threshold setting. In this manner, a histogram of reliability values can be generated. The shape of this histogram can be interpreted as a relative measure of performance. Even in cases where there is no measurable BER, the histogram information can be used to find optimal settings for the channel parameters by comparing the resultant histograms of different settings. The granularity of the histogram could be increased beyond the number of thresholds plus 1 (see, FIG. 2), for example, by multiple reads of the same data with different threshold settings.
FIG. 1 is a schematic block diagram illustrating a reliability monitor 100 incorporating features of the present invention. The reliability monitor 100 may be incorporated, for example, as part of a SOVA detector, such as those described in J. Hagenauer and P. Hoeher, “Viterbi Algorithm with Soft-decision Outputs and its Applications,” IEEE Global Telecommunications Conference (GLOBECOM), vol. 3, 1680-1686 (November 1989), as modified herein to provide the features and functions of the present invention. As shown in FIG. 1, the exemplary reliability monitor 100 produces soft bit decision values, labeled as “soft_values” in FIG. 1. Generally, the reliability monitor 100 accumulates and histograms the generated reliability information (based on the soft values).
For each bit decision, the reliability monitor 100 generates a soft-value that is between 0 and 1, where 0 or 1 denotes the highest probability for the detected bit being 0 or 1, respectively, and where a value of 0.5 denotes the lowest possible bit reliability. The reliability value is computed by a subtractor 110 as follows:
where the computed reliability value signal is between 0 and 0.5 and is proportional to the bit reliability. An accumulator 140 accumulates several samples of the reliability_value signal and provides the accumulated values to a set of monitor registers 160. The accumulator 140 can optionally be automatically reset each time its associated monitor register is read out.
A comparator 130 compares the reliability_value against a number of programmable thresholds that define generally non-overlapping ranges, discussed below in conjunction with FIG. 2, such as between 0 and 0.5. In the exemplary embodiment of FIG. 1, the comparator 130 employs four programmable threshold values th1, th2, th3, and th4, thereby defining five distinct ranges, Range 1 to Range 5.
As discussed further below in conjunction with FIG. 2, a bank of counters 150 counts the number of occurrences of the reliability_value in each defined range. For example, a first counter 150-1 counts the number of occurrences of the reliability_value in a first range, Range 1. The bank of counters 150 provide the count values to the set of monitor registers 160. For example, the counter values can be read out through a bit-serial or a byte-parallel register configuration interface by providing a register address to the interface.
The reliability monitor 100 provides a measure of channel performance that is directly correlated to the Bit Error Rate (BER), but takes less time to collect. The channel performance measure can be used, for example, to tune the channel optimally. In one exemplary embodiment, the reliability monitor 100 accumulates normalized LLR values provided by a SOVA detector, which may be, for example, between 0 and 1, and the comparator 130 compares them against a number of threshold values. In an alternate implementation, the reliability monitor 100 can accumulate measured LLR values provided by a SOVA detector, which may be, for example, in a range between −32 to +31 or −64 to +63.
FIG. 2 illustrates a number of exemplary ranges 200 defined by the programmable threshold values used by the comparator 130 of FIG. 1. As shown in FIG. 2, the comparator 130 can employ five distinct ranges defined by the four exemplary threshold values th1, th2, th3, and th4.
For example, Counter 1 (the first counter in the bank 150 of counters) counts the number of time that the computed reliability_value is within Range 1, i.e., 0≦|soft_value−0.5|<th1. Counter 2 counts the number of time that the computed reliability_value is within Range 2, i.e., th1≦|soft_value−0.5|<th2. Counter 3 counts the number of time that the computed reliability_value is within Range 3, i.e., th2≦|soft_value−0.5|<th3. Counter 4 counts the number of time that the computed reliability_value is within Range 4, i.e., th3≦|soft_value−0.5|<th4. Counter 5 counts the number of time that the computed reliability_value is within Range 5, i.e., th4≦|soft_value −0.5|≦0.5.
FIG. 3 is a schematic block diagram illustrating an alternate reliability monitor 300 incorporating features of the present invention. As shown in FIG. 3, the reliability monitor 300 receives both a known bit value (from a bit source 305, such as a bit-sequence generator that produces a known bit-sequence) and a corresponding reliability value from a SOVA detector, labeled as a “soft_value” in FIG. 3, associated with the bit decision. The same bit-sequence has been previously written to the hard disk and is now read and detected by the SOVA detector. The bit-sequence generator should be synchronized with the bitstream read from the hard disk. The bit sequence generator could be implemented, for example, as a Linear Feedback Shift-Register (LFSR).
In the embodiment of FIG. 3, the reliability_value signal is computed by the metric calculator 310 as follows:
where the hard_value signal is the known bit value provided by the binary Bit Source 305. It is noted that this equation returns a value of 0.5 (highest reliability) if both the soft_value and the hard_value are identical and returns a value of 0 (lowest reliability) if the soft_value is 0 and the hard value is 1 and vice versa. The metric calculator 310 can be described by the following exemplary truth table:
| || |
| ||Input: hard_value ||Output: reliability_value |
| || |
| ||0 || |
| || |
| ||1 || |
| || |
The remaining elements of FIG. 3 operate in a similar manner to the corresponding elements of FIG. 1.
The performance measure provided by the present invention directly correlates with the BER, as this is the same information that the Viterbi detector uses to make its final decision. In addition, the information can be collected and interpreted more rapidly than the BER. Even in cases where there is no measurable BER, this information can still be used to find optimal settings for the channel parameters by comparing the resultant histograms of different settings.
It is to be understood that the embodiments and variations shown and described herein are merely illustrative of the principles of this invention and that various modifications may be implemented by those skilled in the art without departing from the scope and spirit of the invention.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US4340963 *||Nov 10, 1980||Jul 20, 1982||Racal Research Limited||Methods and systems for the correction of errors in data transmission|
|US4404674 *||Jul 10, 1981||Sep 13, 1983||Communications Satellite Corporation||Method and apparatus for weighted majority decoding of FEC codes using soft detection|
|US4500994 *||Oct 4, 1982||Feb 19, 1985||Motorola, Inc.||Multi-rate branch metric processor for maximum-likelihood convolutional decoder|
|US5093842 *||Feb 22, 1990||Mar 3, 1992||Harris Corporation||Mechanism for estimating Es/No from pseudo error measurements|
|US5291499 *||Mar 16, 1992||Mar 1, 1994||Cirrus Logic, Inc.||Method and apparatus for reduced-complexity viterbi-type sequence detectors|
|US5408367 *||Sep 20, 1993||Apr 18, 1995||Integral Peripherals, Inc.||Method of optimizing operation of disk drive|
|US5440344 *||Apr 21, 1993||Aug 8, 1995||Mitsubishi Denki Kabushiki Kaisha||Video encoder using adjacent pixel difference for quantizer control|
|US5471457 *||Nov 5, 1993||Nov 28, 1995||U.S. Philips Corporation||Methods and devices for recording one or more signals which have been encoded by on error detection and correction algorithm on a record carrier by means of an optimal recording intensity|
|US5610776 *||Feb 8, 1995||Mar 11, 1997||Samsung Electronics Co., Ltd.||Method of optimizing read channel of disk drive recording apparatus by using error rate|
|US5652760 *||Nov 7, 1995||Jul 29, 1997||Sanyo Electric Co. Ltd.||Error rate measuring apparatus|
|US5786951 *||Jun 5, 1996||Jul 28, 1998||Cirrus Logic, Inc.||Sampled amplitude read channel employing a discrete time noise generator for calibration|
|US5809090||Mar 4, 1996||Sep 15, 1998||Glenayre Electronics, Inc.||Digital diversity receiver system|
|US5862157 *||Feb 24, 1997||Jan 19, 1999||Texas Instruments Incorporated||Method and circuitry for monitoring a digital channel|
|US5930448 *||Apr 30, 1997||Jul 27, 1999||Samsung Electronics Co. Ltd.||Tracking control circuit and method in digital image recording and reproducing device using bit error rate|
|US6014768 *||Feb 4, 1997||Jan 11, 2000||Texas Instruments Incorporated||Moving reference channel quality monitor for read channels|
|US6016463 *||Aug 26, 1996||Jan 18, 2000||Texas Instruments Incorporated||Channel quality monitor for read channel IC|
|US6029264 *||Apr 28, 1997||Feb 22, 2000||The Trustees Of Princeton University||System and method for error correcting a received data stream in a concatenated system|
|US6134280 *||Jun 16, 1998||Oct 17, 2000||Nec Corporation||Delayed decision feedback sequence estimator for determining optimal estimation region with small calculation quantity|
|US6240055 *||Nov 25, 1998||May 29, 2001||Matsushita Electric Industrial Co., Ltd.||Focus position adjustment device and optical disc drive apparatus|
|US6246041 *||Oct 29, 1998||Jun 12, 2001||Sony Precision Engineering Center (Singapore) Pte Ltd.||Apparatus and method for measuring focusing characteristics of optical pickup and/or optical disc and apparatus and method for recording and/or reproducing optical disc|
|US6313961 *||Jan 5, 1996||Nov 6, 2001||Cirrus Logic, Inc.||Method and apparatus for calibrating a synchronous read channel integrated circuit|
|US6545830 *||Apr 30, 2001||Apr 8, 2003||Western Digital Technologies, Inc.||Disk drive storing test pattern in calibration sectors that are longer than user data sectors for zone parameter calibration|
|US6587984 *||Jan 9, 1998||Jul 1, 2003||Nippon Columbia Co., Ltd.||Distortion detecting device, distortion correcting device, and distortion correcting method for digital audio signal|
|US6765507 *||May 2, 2003||Jul 20, 2004||Sony Corporation||Encoding device and method and decoding device and method|
|US6785077 *||Oct 29, 2001||Aug 31, 2004||Seagate Technology Llc||Disc drive pattern zero verification test|
|US6961390 *||Feb 4, 2002||Nov 1, 2005||Applied Micro Circuits Corporation||Systems and methods for non-casual channel equalization in an asymmetrical noise environment|
|US6988227 *||Jun 25, 2001||Jan 17, 2006||Silicon Laboratories Inc.||Method and apparatus for bit error rate detection|
|US7281175 *||Feb 11, 2000||Oct 9, 2007||Sony Corporation||Readout controlling apparatus, reproducing apparatus, recording apparatus, and readout controlling method|
|US7317586 *||Jun 7, 2005||Jan 8, 2008||Maxtor Corporation||Methods and structure for general purpose interval accumulating filter for measuring operational parameters of a digital read channel|
|US20060195772 *||Feb 28, 2005||Aug 31, 2006||Nils Graef||Method and apparatus for evaluating performance of a read channel|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8649118 *||Sep 25, 2012||Feb 11, 2014||Lsi Corporation||Pattern-dependent LLR manipulation|
|Aug 29, 2014||AS||Assignment|
Owner name: AGERE SYSTEMS LLC, PENNSYLVANIA
Free format text: CERTIFICATE OF CONVERSION;ASSIGNOR:AGERE SYSTEMS INC.;REEL/FRAME:033663/0948
Effective date: 20120730
|May 8, 2014||AS||Assignment|
Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AG
Free format text: PATENT SECURITY AGREEMENT;ASSIGNORS:LSI CORPORATION;AGERE SYSTEMS LLC;REEL/FRAME:032856/0031
Effective date: 20140506