Atsushi Nemoto wrote:
+ /* IORDY setup time: 35ns */
+ wt = (35 + cycle - 1) / cycle;
It's not that simple I'm afraid: you can't just wait IORDY for 35 ns as
that won't guarantee the minimum DIOx- actime time for the current PIO mode;
so t->act8 (since it's >= t->act) should be part of the equation here,
possibly with subtraction of couple cycles, if I'm interpreting the timing
diagrams in the datasheet correctly...
Hmm... so, does this statement seems correct?
wt = (t->act8b + 35 + cycle - 1) / cycle - 2;
No need to add the 35 ns since they're counted from the moment -DIOx gets
asserted. It would only make sense to check whether:
wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
is less than the 35 ns minimum, and use 35 ns if so:
wt = max(DIV_ROUND_UP(t->act8b, cycle) - 2, DIV_ROUND_UP(35, cycle));
+ /* actual wait-cycle is max(wt & ~1, 1) */
I got an impression that WT bit is used otherwise in the ready mode,
and PWT[1:0]:WT[3:1] = 00000 would mean 0 cycles, not 1...
From "184.108.40.206 Ready Mode":
When the number of wait cycles is 0, READY check is started in
1 cycle after asserting the CE* signal. When the number of
wait cycles is other than zero, after waiting only for the
specified number of cycles, READY check is started.
Indeed, I've missed that...