Portland, Ore. Cooperating to make an all-nanotube switch, electrical engineers from Cambridge University (England) and Samsung Electronics Co. Ltd. have circumvented the nano-to-micro interface. By lithographically seeding silicon wafers for nanotube growth of source, drain and gate electrodes, the EEs formed three-terminal switches that function like mechanical DRAM, dubbed a nanoelectromechanical system (NEMS) switch.
"Our NEMS switch will be useful wherever there is a mechanical actuation stage needed at the end of some signal processing," said professor Gehan Amaratunga, the lead EE on the Cambridge University team. Specifically, he said, the device can be used to switch routing connections on chips, as an alternative to on-chip fuses, for reconfiguration in a reversible manner and as an alternative to the silicon pillar structure now used as the base for capacitors in DRAM.
The nanotubes for the source and drain grow from seeds to a precise length at right angles to the silicon wafer surface. The source nanotube is pinned to ground with photolithography while the drain is positively biased. The gate electrode, also a nanotube but shorter, switches the NEMS by introducing a positive voltage bias that repels the drain by electrostatic force.
When the voltage on the gate surpasses a threshold, similar to the "on" gate voltage of a transistor, the drain nanotube bends and touches the oppositely charged source nanotube, thereby throwing the mechanical switch and allowing current to flow from source to drain.
Van der Waals forces then provide hysteresis to "debounce" the switch, keeping it "on" until the gate voltage drops below an "off" threshold.
To create a memory cell with the NEMS switch, the Cambridge researchers cooperated with Samsung to fabricate a complementary vertical capacitor structure to latch "on" states so that the gate voltage can be removed without switching the cell "off." By integrating the two into a vertical nanotube electromechanical switch and latch, the researchers said, ultrasmall DRAM memory cells could result. The University of Cambridge and Samsung team will reveal the tiny dimensions of their NEMS DRAM cell at the IEEE's International Electron Devices Meeting in December.
One advantage of the technique, Amaratunga said, is that ultrasmall single-walled nanotubes akin to single-crystal silicon are not necessary. Instead, the easier-to-grow and lower-tolerance multiwalled carbon nanotubes do just fine.
The researchers demonstrated how to trade off the electrostatic "on" switching force and the van der Waals "off" switching force, by adjusting the process parameters that determined the length and thickness of the multiwalled nanotubes. By optimizing the nanotube growth parameters, the researchers said, they demonstrate arrays of reliable, repeatable NEMS switches.