The RX platform is built around the new RX CPU and is part of the next-generation of MCUs, which integrate the functions of Renesas’ existing 16-bit and 32-bit MCU products. The new RX63T group comprises six individual products.
As an expansion of the RX62T lineup, the new RX63T group underlines Renesas’ contribution to further miniaturization and lower costs due to the smaller pin package, smaller memory size and enhanced safety functions. The RX63T maintains a close compatibility with RX62T, allowing current customers to design lower memory versions of their RX62T designs easily with RX63T.
The RX63T MCUs include two three-phase motor control timer units: a multifunction timer pulse unit 3 (MTU3) and a 16-bit general-purpose PWM timer (GPT). Both timer units support the design of high efficiency drives with a low system cost. The MTU3 supports the complementary PWM. The GPT can independently control four- channel of single phase inverter, and control of the right and the left dead-time can be controlled individually.
The timer uses the same clock as the CPU at 80 megahertz (MHz). This enables it to achieve a wide range of width measurements for PWM output waveforms with resolutions as small as 12.5 nanoseconds (ns).
Improved analog functions to enable increased system cost reduction and improve ease of use in motor vector control applications have also been implemented with the new RX63T family. It features one 12-bit A/D converter unit which can capture analog input values with a minimum conversion time of one s.
The 12-bit A/D converters can easily be used for sensorless vector control methods, such as three-shunt or single-shunt current detection as simultaneous sampling of three input channels is possible. Continuous A/D conversion is supported by the double data registers installed in the 12-bit A/D module. In addition, the RX63T has three-channel analogue comparators assigned to the 12-bit A/D inputs. Each comparator has three detection levels, enabling easy monitoring and emergency shutdown of external IGBTs.
The RX63T group of MCUs also incorporate many safety features, such as an independent watchdog with its own on-chip clock source (IWDT), a self-check function, a DOC (Data Operation Circuit) enabling RAM checking without CPU involvement, a CAC (clock frequency accuracy measurement circuit) to check clock frequencies and a RWP (Register Write Protection) function that protects important registers from being accidentally overwritten.
As fractional calculations are required in vector control algorithms, the RX63T supports a single precision floating point unit (FPU). This simplifies decimal point calculation, boosting the overall processing performance.
The devices in the RX63T group provide a scalable memory solution from 32K flash to 64KB flash with up to 8KB of embedded SRAM. They also include an additional independent 8 KB of data flash memory with a background operation (BGO) function that enables data to be written while a program is executing. The embedded flash memory is based on Renesas’ proven MONOS (metal oxide nitride oxide silicon) technology that can be accessed without wait state insertion. This enables a maximum performance level of 1.65DMIPS/MHz at any CPU frequency, without any limitation from flash technology. These products will be offered in 48-pin and 64-pin LQFP packaging.
To help customers shorten the development cycles of new embedded systems, Renesas, third-party suppliers and the alliance partner network support the RX with a variety of hardware and software tools.
The RX600 series comes with a JTAG debugger interface. This enables customers to connect a Renesas E1 or E20 on-chip debugger or enable access to similar JTAG third party systems like J-Link (by Segger).
Samples of Renesas' new RX63T MCUs are available now priced. Mass production is scheduled to begin in September 2012.