A flyback converter is designed to operate over a specified input voltage range, with a given output voltage and maximum output current. The worst-case design normally is done at the minimum input voltage and maximum output power. In the real world the maximum power delivered at high input line may double that of the power delivered at the minimum input line voltage. This forces power-supply designers to over design the power stage. This article discusses the reason for the increased input power increase and methods to reduce it. It also shows a novel method to improve the performance of peak current-mode control.
The flyback converter transformer basically is two coupled inductors. During the time when the primary switch is on, energy is stored in the primary coupled inductor. Because of the transformer's primary and secondary winding configuration, when the primary switch is on, the output diode (D1) is reverse-biased (Figure 1a – 1b). When the primary switch is off, the energy stored in the primary coupled inductor is then transferred to the output coupled inductor, providing power to the load. The flyback transformer can step up or step down the output voltage, and provides input to output isolation.
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Figure 1. 1a) Stored energy in the primary figure; 1b) energy transfer to secondary.
Peak current-mode control
For cost and simplicity the flyback converter typically is used in peak current-mode control, so the output current is not directly measured. When the flyback converter is in an overload fault the output voltage drops. As a result, the feedback compensation voltage rises beyond the pulse-width modulators (PWM) controllers current limit threshold and the PWM operates in pulse-by-pulse current limit. In pulse-by-pulse current limit the feedback voltage no longer controls the PWM duty cycle. The duty cycle is terminated when the peak primary current exceeds the PWM controller current limit comparators voltage reference (VCS
Challenges with peak current-mode control
When the controller is in pulse-by-pulse current limit the primary switch can't be turned off instantly. There are propagation delays within the PWM and power stage, which include the controller's leading edge blanking (LEB), and propagation delay in the current limit comparator, logic circuits, gate driver, and turning off the power MOSFET. Propagation delays cause the peak primary current to be higher than expected due to overshoot.
calculates the actual peak primary current:
After calculating the peak primary current, we can use Equation 2
to calculate the input power: