I am having some problems with the new controller in terms of power consumption. While investigating this I realised that I've forgotten how the decoder for the digital pulse givers works.
Here is the original article describing the circuit:
"The Encoder Decoder Circuit"
Our task this week is to create a circuit to count pulses coming from the encoder and display the count on a dual 7-segment LED display. The circuit should be smart enough to know whether the knob is rotating clockwise or counterclockwise, and increment or decrement the count appropriately. To determine the direction of rotation requires us to build a special quadrature decoder circuit, and for this we need to learn something about computer memory.
Computers store information in millions (sometimes billions) of small devices called “flip-flops”. The purpose of a flip-flop is to store a single bit (either a 1 or 0) until requested to change. One of the simplest types of flip-flops is called a D-type flip-flop, shown in the figure at right. The functioning of a flip-flop is actually pretty simple: a piece of data is stored at (and can be read from) port Q until a clock pulse is received at the CLK port. When a clock pulse is received, whatever data value exists at the D (for data) port is written to Q. Most D-type flip-flops change state only on the rising edge of a clock pulse, hence the name “edge-triggered flip-flop”.
Our quadrature decoder circuit will make use of the data storage capability of the flip-flop. As shown in the figure above we feed the signal from pin A of the decoder into the D port and the B signal into the CLK port. If the pulses from pin A lead those of pin B, the D port will be in a high state whenever the clock port sees a rising edge – hence Q will remain high. Conversely, if the B pulses lead, Q will remain low. In this way the output at Q provides a means of decoding the direction of rotation. The circuit below shows a practical implementation of the quadrature decoder.
The circuit also makes use of two NAND gates in the CD4011 chip. The NAND gates are used to combine the constant high or low signals from Q with the pulse train from the encoder to provide pulses to the counter inputs. If Q1 is high the CLK UP port will receive the pulse train and if Q2 is high the CLK DN port will receive the pulse train.