San Jose, California and Taipei, Taiwan: Altera Corp. and the Taiwan Semiconductor Manufacturing Company (TSMC) have jointly developed the world’s first heterogeneous 3D IC test vehicle using TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) integration process.
Heterogeneous 3D ICs are one of the innovations enabling the industry’s move beyond Moore’s law by stacking various technologies within a single device, including analog, logic, and memory.
TSMC’s integrated CoWoS process provides semiconductor companies developing 3D ICs an end-to-end solution that includes the front-end manufacturing process as well as back-end assembly and test solutions.
Altera is the first semiconductor company to develop and complete characterisation of a heterogeneous test vehicle using the CoWoS process. Along with additional test vehicles, it enables Altera to quickly test the capabilities and reliability of 3D ICs to ensure they meet yield and performance targets.
The CoWoS process lays the foundation for rapid and cost-effective 3D IC product development and deployment in the future. Altera’s vision for heterogeneous 3D ICs includes device derivatives that allow customers to mix and match silicon intellectual property (IP) based on their application requirements.
Altera will integrate various technologies with an FPGA, including CPUs, ASICs, ASSPs, memory, and optics. The company claims its 3D ICs enable customers to differentiate their applications by leveraging the flexibility of the FPGA, while maximising system performance, minimising system power, and reducing form factor and system cost.
The CoWoS integrated process technology attaches chips to a wafer through a chip-on-wafer (CoW) bonding process. The CoW chip is attached to the substrate (CoW-On-Substrate) to form the final component.
Attaching the device silicon to the original thick wafer silicon before it finishes the fabrication process prevents manufacturing-induced warping. TSMC plans to offer CoWoS as a turnkey manufacturing service.