Before we go deep into architectural details of the new Pentium 4 processors also known as Prescott, I would like to dwell on a new manufacturing technology used for these CPUs products. The thing is that Prescott appeared the first x86 processor manufactured in mass quantities with 90nm products technology. For example, Intel’s main competitor, AMD Company, is planning to shift to 90nm production technology only in H2 2004.
Intel has already introduced the new 90nm manufacturing technology in three fabs by now, that is why there should be no problems with the mass production of the new dies. I also have to point out that together with the transition to the next generation process technology, Intel also made a number of enhancements, which should speed up the transistors. As a result this should later lead to the possibility to increase even more the clock frequencies of the CPUs built with the new production process. Among these enhancements I would like to mention smaller gate length and the use of strained silicon.
Transistors used in Intel processors manufactured with 130nm technology feature 60mn gate length. With the shift to 90nm production process the transistor gate length will be reduced to 50nm. This automatically solves two problems at a time. First, the transistor switches and works much faster. And second, the transistor gets smaller in physical size, which allows creating more compact and at the same time more complex semiconductor devices. However, there is another side to the smaller transistor size: increase in leakage currents, which turns into an absolutely specific task in case of 90nm technology. For instance, Intel is applying a layer of nickel silicide right above the gate electrode to minimize the leakage currents (they used to apply cobalt silicide for the same purpose).
But the most interesting part of the 90nm production technology from Intel is the strained silicon technology. It was developed to ensure that open transistors allow sending through them higher electric current, and hence react faster and dissipate less heat. According to Intel’s data, the use of this new technology increases the current going through the open transistor channel by 10-20%. The idea behind this technology is very simple: silicon lattice used in the transistor channel is “stretched” so that the distance between atoms gets bigger. This is achieved by putting the silicon onto a special layer with broader lattice. Silicon atoms try to adjust themselves to the wafer lattice and move apart from one another. As a result, the electrons flow faster through the lattice with less resistance. Despite the seeming complexity of the strained silicon technology, it is not an expensive one to implement: the production cost per transistor with strained silicon technology is only 2% higher than that of a regular transistor.