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The low-IF receiver (RX) consists of an LNA connected to two (I&Q) down-conversion mixers followed by a variable gain amplifier-filter. The front-end converts the RF signal into a differential I and Q signal, centered at an 100 kHz IF. The cascode LNA is input-matched using an on-chip spiral inductor. The measured S11 is <-11.5 dB between 1.725 GHz and 1.975 GHz, satisfying the antenna filter requirement (S11 <-10 dB). The lower input impedance improves the LNA gain by about 1.5 dB compared to an exact 50 /spl Omega/ match. An on-chip load inductor centers the gain at 1.84 GHz. Each down-conversion mixer uses a cascoded, current-folding switching mixer. This permits low voltage operation while enabling the insertion of a cascode transistor to improve LO leakage and mixer linearity. The noise contribution of the top current source is reduced by the pMOS bleeder. The VGA consists of a two-stage fully differential OTA with a bank of highly matched, RC elements. Its gain can progressively be decreased by 6 dB by switching them in parallel. A/D conversion, channel selection, mirror suppression and additional AGC is assigned to a digital CMOS base-band chip.