Frank Schirrmeister, Director of Product Marketing, System-Level Solutions, Synopsys
As 2010 comes to an end, let’s take a look at the bigger picture of the electronics market. The trillion dollar market for electronics equipment is driven by an $85 billion semiconductor market as a combination of ASSP, ASIC, FPGA and PLD. It is enabled by a $7.5 billion dollar market for EDA, IP, embedded software tools and services. Prototyping at different stages within a design has become a mainstream methodology and more recently focuses on specifically enabling the design chain from IP providers, semiconductor providers, integrators and OEMs. It plays a key role in those interactions because early prototypes enable communication of requirements from customers to suppliers as well as early software development and verification by suppliers for their customers.
Design Chain Enablement
To understand the impact that prototyping in its many forms can achieve, let’s consider a typical complex system and System on Chip (SoC) design. Figure 1 shows the tear-down of a typical smart-phone. The end user experience is largely influenced by the software applications with which they are presented. Hardware, analog and antenna design remains important but the user only really notices them when they fail.
The user applications enabled by a software stack of middleware, operating system and drivers. This stack is specifically designed to make the software as independent of the hardware as possible. For example, application developers typically do not have direct access to the device’s hardware memory, timing or other low-level hardware aspects. The stack of software is matched by a stack of hardware elements. The end device uses several boards, comprised of several peripherals and chips, which contain various blocks, either re-used as IP or specifically developed by chip providers to differentiate their hardware.
The dependencies of hardware and software result in an intricate relationship between different company types. IP providers sell to semiconductor providers, which sell to integrators which sell to OEMs, all of which are enabling software developers. Enablement of these interactions has arguably become the biggest problem to be addressed by tool vendors today. There are four main challenges for system-level design and design chain enablement today:
Prototyping has already become a central part of the solution, especially for the first two challenges. Let’s review its options.
There are various forms of prototyping which users employ in their projects today. Available earliest in a project are virtual prototypes. They represent fully functional but loosely-timed software models of SoCs, boards, virtualized I/Os and user interfaces, all running as host-based simulation. Virtual prototypes can execute unmodified production software code on processor instruction set simulators and they run close to real-time. Being fully host-based, they can also offer high system visibility and control, which is especially useful for debug on multicore CPUs. Virtual prototypes can also have virtual user interfaces, allowing real-time interaction with us slow humans. On the downside they are slowing down when more accuracy is added.
Related to virtual prototypes are Software Development Kits, or SDKs. A very common example is the Apple iPhone® SDK, which was downloaded more than 100,000 times in the first couple of days of its availability. SDK’s allow user programming using high-level Application Programming Interfaces (APIs), largely shielding programmers from detailed hardware effects. In contrast to register and functionally accurate virtual prototypes, the software developed on an SDK is usually compiled for the host machine on which the SDK executes and then requires recompilation to the actual target processor after programmers have verified functionality on the SDK. The independence of the hardware allows application development very effectively, but renders SDKs unsuitable for detailed hardware-software debug.
Available later in the design flow, but still well before real silicon, FPGA-based prototypes serve as a vehicle for software development and validation. FPGA-based prototypes are fully functional hardware representations of SoCs, boards and I/Os. Because they implement the same RTL code as the SoC and run at almost real-time speed, with all external interfaces and stimulus connected, they are very accurate even though they require a re-mapping of RTL from the target technology to FPGA. They offer better system visibility and control than the actual silicon will provide when available. However, in contrast, virtual platforms offer better multicore debug and control capabilities. Users typically choose both types of prototyping serially, making trade-offs between time of availability and execution speed.
Emulation provides another hardware-based alternative to enable software development but differs from FPGA-based prototyping in that it aims at lower performance but with more automation. Emulators have more automated mapping of RTL into the hardware together with faster compile times, but the execution speed will be lower and typically drop to below the single-MIPS level. The cost of emulation is also often seen as a deterrent to replicating it easily for software development. Despite this fact, they seem to be popular with software engineers because of their ease of use.
Finally, after the actual silicon is available, early prototype boards using first silicon samples can enable software development on the actual silicon. Once the chip is in production, very low-cost development boards can be made available. At this point, the prototype will run at real-time speed and full accuracy. Software debug is typically achieved with specific hardware connectors using the JTAG interface and connections to standard software debuggers. While prototype boards using the actual silicon are probably the lowest-cost option, they are available very late in the design flow and allow almost no head start on software development. In addition, the control and debug insight into hardware prototypes is very limited unless specific on chip instrumentation (OCI) capabilities are made available.
A variation of prototype boards using first silicon samples are boards containing the previous generation of the chip. They can be available very early but obviously lack the latest features of the new chip under development. Nevertheless, they are recognized by users as a valid means of software development. However, at some point cross porting from the previous generation to the new generation chip needs to happen.
Figure 2 illustrates that customers do recognize a variety of prototyping solutions. 116 respondents at the SoC Virtual Conference in August 2009 replied to the question “What method(s) do/will you use to develop hardware dependent software (e.g. drivers, firmware) for your design project?”. Their replies are shown in fig. 2. The results indicate that all the prototyping techniques described earlier are in active use. This is a result of different prototyping solutions offering different advantages to design teams, resulting in a complementary nature.
There are eight major trends impacting chip design which have increased the need for prototyping and will do so even further in 2011 and beyond.
There is no clear end in sight for further miniaturization towards smaller technology nodes. In the five years up to 2010, design starts at 130nm and below have grown from 30 percent to over 50 percent. By 2012 they are expected to make up more than 60 percent of design starts with design starts at 65nm and below growing to 30 percent. As a result, there is a lot of silicon area to fill and the complexity of chip developments at those technology nodes will be so high, that it is simply too risky to tape out without prototyping. FPGA-based prototyping will offer increased capacity as it is following the same technology trends. Virtual prototyping will gain even more importance as it allows software development to commence even earlier and is only capacity limited by the host machines it is executing on.
Similarly the decrease in overall design starts will continue as the production and mask cost will make smaller technology nodes less accessible and likely will cause further consolidation in the semiconductor industry. Interestingly enough, design starts with higher complexity at smaller technology nodes are actually increasing. Still, developments need to be applicable to more designs and re-coup the investment through a larger variety of end designs. Virtual and FPGA-based prototyping will become even more mandatory to mitigate risk of potential re-spins. In the mobile wireless and consumer application domains the desire to de-couple software development from as many hardware dependencies as possible will further increase. Independence simply makes it accessible to an eco-system of third party software developers and SDKs will have to contain more and more capabilities for software verification.
Programmability combined with a rapid increase of embedded software content is a key driver for prototyping. Detailed analysis of leading edge projects has shown prototyping to enable significant ROI potential. For instance, a wireless headset design in a mainstream technology at 65nm targeted for a high volume, fast moving market had an overall production run of 27 months with an average volume of 1.5 million units per month. The average selling price was $5.50. In total the development cost for the project was $31,650,000. Software development consumed 40 percent of the total cost for this design and extended the project schedule to a total of 27 months. When combining the development and production cost, this project reaches break even after about 34 months – almost three years. Using the calculator for return on investment (ROI) developed by the Global Semiconductor Association (GSA), it can be calculated that if software development started 7 months earlier, production could have started 3 months earlier and subsequently the time to break even would have been reduced by 5 months. In addition a $50M revenue gain could have been expected over the production volume due to early design-ins of the chip with its earlier availability. Software development will continue to grow in importance and create more pressure on design methodologies.
IP re-use continues to increase. Gartner just confirmed in most recent predictions that the amount of re-use will again double between 2010 and 2014. In addition, the trend to licensing complete subsystems will grow and open a new area of prototyping for complete subsystems containing an assembly of pre-defined hardware and software IP.
Application specificity is a key aspect for chip development and will likely create application design flows and reference designs. While the needs are different in specific application domains, the overarching commonality is that the actual system behavior is more and more defined by software. As a result, hardware development more and more is driven to optimize its execution. Depending on the specifics of the application domains this has different effects. In mobile wireless and consumer, the end applications define the user experience and operating systems become the channel for a large number of developers creating applications for devices. The underlying hardware is fairly generic, enabling software prototypes like Google Android, Apple Mobile OS or Windows Mobile 7 to execute most efficiently and decouple the ecosystem of application developers from the actual hardware. In contrast, an ecosystem like this does not exist in the networking application domain. The software still defines system behavior, but is much more bare metal, embedded in the networking software stacks on Linux and other operating systems, and is a key delivery of the hardware/software system. Similarly, in automotive applications an ecosystem of independent application developers does not really exist in the same way as for wireless and consumer applications. However, due to the overall complexity in automotive, developers of software who are dependent on the hardware often reside in independent companies. They need access to representations of the hardware that the software is developed for, increasing the need for virtual and hardware prototypes.
Adoption of multicore architectures will cause more pressure to figure out the automation of software parallelization. Today parallelization has been solved in specific application domains like graphics and will likely lead to more application specific solutions going forward. Prototyping will be required to assess and debug the effects of parallelizing software.
Low power requirements will clearly only be addressable by moving low power design to the architectural design level. Trying to address low power issues after RTL is finalized will result in some optimizations, but real improvements will be decided at the system-level and using software. As a result, both virtual prototypes and FPGA-based prototypes will be instrumented to allow low power analysis.
Finally, an increase in the analog/mixed signal portion of chips will create even more demand for prototyping to allow in-system validation. For instance, virtual I/O for virtual prototypes and interfaces for FPGA-based prototypes that connect to its environment will become more critical.
Given the above analysis for 2011 and beyond, prototyping in all its incarnations will become a key element for future design flows and gain even more in importance. Interesting times are in store for providers of prototypes in general. Eventually both the hardware and software development worlds will grow closer together with prototypes being the binding element.