/* SPDX-License-Identifier: GPL-2.0
 *
 * Copyright 2016-2018 HabanaLabs, Ltd.
 * All Rights Reserved.
 *
 */

/************************************
 ** This is an auto-generated file **
 **       DO NOT EDIT BELOW        **
 ************************************/

#ifndef ASIC_REG_SRAM_Y0_X4_RTR_REGS_H_
#define ASIC_REG_SRAM_Y0_X4_RTR_REGS_H_

/*
 *****************************************
 *   SRAM_Y0_X4_RTR (Prototype: IC_RTR)
 *****************************************
 */

#define mmSRAM_Y0_X4_RTR_HBW_RD_RQ_E_ARB                             0x211100

#define mmSRAM_Y0_X4_RTR_HBW_RD_RQ_W_ARB                             0x211104

#define mmSRAM_Y0_X4_RTR_HBW_RD_RQ_L_ARB                             0x211110

#define mmSRAM_Y0_X4_RTR_HBW_E_ARB_MAX                               0x211120

#define mmSRAM_Y0_X4_RTR_HBW_W_ARB_MAX                               0x211124

#define mmSRAM_Y0_X4_RTR_HBW_L_ARB_MAX                               0x211130

#define mmSRAM_Y0_X4_RTR_HBW_DATA_E_ARB                              0x211140

#define mmSRAM_Y0_X4_RTR_HBW_DATA_W_ARB                              0x211144

#define mmSRAM_Y0_X4_RTR_HBW_DATA_L_ARB                              0x211148

#define mmSRAM_Y0_X4_RTR_HBW_WR_RS_E_ARB                             0x211160

#define mmSRAM_Y0_X4_RTR_HBW_WR_RS_W_ARB                             0x211164

#define mmSRAM_Y0_X4_RTR_HBW_WR_RS_L_ARB                             0x211168

#define mmSRAM_Y0_X4_RTR_LBW_RD_RQ_E_ARB                             0x211200

#define mmSRAM_Y0_X4_RTR_LBW_RD_RQ_W_ARB                             0x211204

#define mmSRAM_Y0_X4_RTR_LBW_RD_RQ_L_ARB                             0x211210

#define mmSRAM_Y0_X4_RTR_LBW_E_ARB_MAX                               0x211220

#define mmSRAM_Y0_X4_RTR_LBW_W_ARB_MAX                               0x211224

#define mmSRAM_Y0_X4_RTR_LBW_L_ARB_MAX                               0x211230

#define mmSRAM_Y0_X4_RTR_LBW_DATA_E_ARB                              0x211240

#define mmSRAM_Y0_X4_RTR_LBW_DATA_W_ARB                              0x211244

#define mmSRAM_Y0_X4_RTR_LBW_DATA_L_ARB                              0x211248

#define mmSRAM_Y0_X4_RTR_LBW_WR_RS_E_ARB                             0x211260

#define mmSRAM_Y0_X4_RTR_LBW_WR_RS_W_ARB                             0x211264

#define mmSRAM_Y0_X4_RTR_LBW_WR_RS_L_ARB                             0x211268

#define mmSRAM_Y0_X4_RTR_DBG_E_ARB                                   0x211300

#define mmSRAM_Y0_X4_RTR_DBG_W_ARB                                   0x211304

#define mmSRAM_Y0_X4_RTR_DBG_L_ARB                                   0x211310

#define mmSRAM_Y0_X4_RTR_DBG_E_ARB_MAX                               0x211320

#define mmSRAM_Y0_X4_RTR_DBG_W_ARB_MAX                               0x211324

#define mmSRAM_Y0_X4_RTR_DBG_L_ARB_MAX                               0x211330

#endif /* ASIC_REG_SRAM_Y0_X4_RTR_REGS_H_ */
