/* SPDX-License-Identifier: GPL-2.0
 *
 * Copyright 2016-2020 HabanaLabs, Ltd.
 * All Rights Reserved.
 *
 */

/************************************
 ** This is an auto-generated file **
 **       DO NOT EDIT BELOW        **
 ************************************/

#ifndef ASIC_REG_DCORE0_MME_ACC_REGS_H_
#define ASIC_REG_DCORE0_MME_ACC_REGS_H_

/*
 *****************************************
 *   DCORE0_MME_ACC
 *   (Prototype: ACC)
 *****************************************
 */

#define mmDCORE0_MME_ACC_WBC0_AXI 0x40F8000

#define mmDCORE0_MME_ACC_WBC1_AXI 0x40F8004

#define mmDCORE0_MME_ACC_WBC0_RL 0x40F8008

#define mmDCORE0_MME_ACC_WBC1_RL 0x40F800C

#define mmDCORE0_MME_ACC_WBC_STALL 0x40F8010

#define mmDCORE0_MME_ACC_AWCACHE 0x40F8014

#define mmDCORE0_MME_ACC_AWPROT 0x40F8018

#define mmDCORE0_MME_ACC_AP_LFSR_POLY 0x40F801C

#define mmDCORE0_MME_ACC_AP_LFSR_SEED_WDATA 0x40F8020

#define mmDCORE0_MME_ACC_AP_LFSR_SEED_SEL 0x40F8024

#define mmDCORE0_MME_ACC_AP_LFSR_SEED_RDATA 0x40F8028

#define mmDCORE0_MME_ACC_AP_LFSR_CLOSE_CGATE_DLY 0x40F802C

#define mmDCORE0_MME_ACC_WBC_SRC_BP 0x40F8030

#define mmDCORE0_MME_ACC_CLK_GATE_EN 0x40F8034

#define mmDCORE0_MME_ACC_WBC_INFLIGHTS 0x40F8038

#define mmDCORE0_MME_ACC_HBW_CLK_ENABLER_DIS 0x40F803C

#define mmDCORE0_MME_ACC_E2E_CRDT_TOP0 0x40F8040

#define mmDCORE0_MME_ACC_E2E_CRDT_TOP1 0x40F8044

#define mmDCORE0_MME_ACC_INTR_CAUSE 0x40F8048

#define mmDCORE0_MME_ACC_INTR_MASK 0x40F804C

#define mmDCORE0_MME_ACC_INTR_CLEAR 0x40F8050

#define mmDCORE0_MME_ACC_WR_AXI_AGG_COUT0 0x40F8054

#define mmDCORE0_MME_ACC_WR_AXI_AGG_COUT1 0x40F8058

#define mmDCORE0_MME_ACC_BIST 0x40F805C

#define mmDCORE0_MME_ACC_WR_AXI_AGG_2P_BVALID 0x40F8060

#endif /* ASIC_REG_DCORE0_MME_ACC_REGS_H_ */
