/* SPDX-License-Identifier: GPL-2.0
 *
 * Copyright 2016-2020 HabanaLabs, Ltd.
 * All Rights Reserved.
 *
 */

/************************************
 ** This is an auto-generated file **
 **       DO NOT EDIT BELOW        **
 ************************************/

#ifndef ASIC_REG_PCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_REGS_H_
#define ASIC_REG_PCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_REGS_H_

/*
 *****************************************
 *   PCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C
 *   (Prototype: AXUSER)
 *****************************************
 */

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_ASID 0x4F03900

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_MMU_BP 0x4F03904

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_STRONG_ORDER 0x4F03908

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_NO_SNOOP 0x4F0390C

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_WR_REDUCTION 0x4F03910

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_RD_ATOMIC 0x4F03914

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_QOS 0x4F03918

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_RSVD 0x4F0391C

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_EMEM_CPAGE 0x4F03920

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_CORE 0x4F03924

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_E2E_COORD 0x4F03928

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_WR_OVRD_LO 0x4F03930

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_WR_OVRD_HI 0x4F03934

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_RD_OVRD_LO 0x4F03938

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_RD_OVRD_HI 0x4F0393C

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_LB_COORD 0x4F03940

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_LB_LOCK 0x4F03944

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_LB_RSVD 0x4F03948

#define mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_LB_OVRD 0x4F0394C

#endif /* ASIC_REG_PCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_REGS_H_ */
