/********************************************************************************************************
 * @file     rega_simu.c 
 *
 * @brief    for TLSR chips
 *
 * @author	 telink
 * @date     Sep. 30, 2010
 *
 * @par      Copyright (c) 2010, Telink Semiconductor (Shanghai) Co., Ltd.
 *           All rights reserved.
 *           
 *			 The information contained herein is confidential and proprietary property of Telink 
 * 		     Semiconductor (Shanghai) Co., Ltd. and is available under the terms 
 *			 of Commercial License Agreement between Telink Semiconductor (Shanghai) 
 *			 Co., Ltd. and the licensee in separate contract or the terms described here-in. 
 *           This heading MUST NOT be removed from this file.
 *
 * 			 Licensees are granted free, non-transferable use of the information in this 
 *			 file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided. 
 *           
 *******************************************************************************************************/

#ifdef WIN32

#include "../common/types.h"
#include "../mcu/register.h"

// 5320 analog registers default value,   size = 4096
u8 rega_simu_buffer[] = {
    0xbb,0x34,0x97,0x3e,0x64,0xc3,0xfe,0x0a,0x40,0xfc,0xfd,0x07,0x32,0x00,0x00,0x00,
    0xff,0xff,0x00,0xf0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x64,0xc3,0xfe,0x0a,0x40,0xfc,0xfd,0x07,0x32,0x00,0x00,0x00,
    0xff,0xff,0x00,0xf0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0xbb,0x34,0x97,0x3e,0x64,0xc3,0xfe,0x0a,0x40,0xfc,0xfd,0x07,0x32,0x00,0x00,0x00,
    0xff,0xff,0x00,0xf0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0xbb,0x34,0x97,0x3e,0x64,0xc3,0xfe,0x0a,0x40,0xfc,0xfd,0x07,0x32,0x00,0x00,0x00,
    0xff,0xff,0x00,0xf0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x44,0xce,0x4e,0x48,0x04,0x00,0x5f,0x00,0x9a,0x60,0x55,0x4f,0x54,0xdb,0x6d,0xc3,
    0xe3,0x4b,0x25,0x8a,0x5d,0x82,0xd6,0x0a,0x62,0xc7,0x07,0x82,0xff,0x06,0xf0,0x08,
    0x03,0x10,0xc4,0x00,0x00,0x2c,0x00,0x80,0x81,0xa0,0x80,0x81,0x96,0xac,0x01,0x00,
    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,    
};

void rega_simu_init(){
}

#endif

