/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2022-2023  Realtek Corporation
 */

#ifndef __RTW89_8851B_RFK_TABLE_H__
#define __RTW89_8851B_RFK_TABLE_H__

#include "phy.h"

extern const struct rtw89_rfk_tbl rtw8851b_dadck_setup_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_dadck_post_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_dack_s0_1_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_dack_s0_2_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_dack_manual_off_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_iqk_rxclk_80_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_iqk_rxclk_others_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_iqk_txk_2ghz_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_iqk_txk_5ghz_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_iqk_afebb_restore_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_iqk_bb_afe_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_iqk_macbb_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_sys_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_sys_a_defs_2g_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_sys_a_defs_5g_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_init_txpwr_defs_a_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_init_txpwr_he_tb_defs_a_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_dck_defs_a_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_dac_gain_defs_a_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_slope_a_defs_2g_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_slope_a_defs_5g_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_align_a_2g_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_align_a_5g_defs_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_slope_defs_a_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_track_defs_a_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_tssi_mv_avg_defs_a_tbl;
extern const struct rtw89_rfk_tbl rtw8851b_nctl_post_defs_tbl;

#endif
