//
//
// THIS FILE IS FOR REGISTER DEFINITIONS AND LINKS ONLY.
// AUTOMAGICALLY PARSED BY USING INCLUDE AND SPECIAL DEFINES.
//
//

#ifndef DEF_REGISTER
// Don't create errors if someone uses this by mistake
#define DEF_REGISTER
#endif

/* Invalid */
DEF_REGISTER("rinval", REG_INVALID, XED_REG_INVALID, SIZE_BYTE)

/* Processor control registers */
DEF_REGISTER("cr0", REG_CR0, XED_REG_CR0, SIZE_32_64)
DEF_REGISTER("cr2", REG_CR2, XED_REG_CR2, SIZE_32_64)
DEF_REGISTER("cr3", REG_CR3, XED_REG_CR3, SIZE_32_64)
DEF_REGISTER("cr4", REG_CR4, XED_REG_CR4, SIZE_32_64)
DEF_REGISTER("cr8", REG_CR8, XED_REG_CR8, SIZE_QWORD)

/* Debug registers */
DEF_REGISTER("dr0", REG_DR0, XED_REG_DR0, SIZE_32_64)
DEF_REGISTER("dr1", REG_DR1, XED_REG_DR1, SIZE_32_64)
DEF_REGISTER("dr2", REG_DR2, XED_REG_DR2, SIZE_32_64)
DEF_REGISTER("dr3", REG_DR3, XED_REG_DR3, SIZE_32_64)
DEF_REGISTER("dr6", REG_DR6, XED_REG_DR6, SIZE_32_64)
DEF_REGISTER("dr7", REG_DR7, XED_REG_DR7, SIZE_32_64)

/* X86 general purpose registers */
DEF_REGISTER("eax", REG_EAX, XED_REG_EAX, SIZE_DWORD)
DEF_REGISTER("ax", REG_AX, XED_REG_AX, SIZE_WORD)
DEF_REGISTER("ah", REG_AH, XED_REG_AH, SIZE_BYTE)
DEF_REGISTER("al", REG_AL, XED_REG_AL, SIZE_BYTE)

DEF_REGISTER("ebx", REG_EBX, XED_REG_EBX, SIZE_DWORD)
DEF_REGISTER("bx", REG_BX, XED_REG_BX, SIZE_WORD)
DEF_REGISTER("bh", REG_BH, XED_REG_BH, SIZE_BYTE)
DEF_REGISTER("bl", REG_BL, XED_REG_BL, SIZE_BYTE)

DEF_REGISTER("ecx", REG_ECX, XED_REG_ECX, SIZE_DWORD)
DEF_REGISTER("cx", REG_CX, XED_REG_CX, SIZE_WORD)
DEF_REGISTER("ch", REG_CH, XED_REG_CH, SIZE_BYTE)
DEF_REGISTER("cl", REG_CL, XED_REG_CL, SIZE_BYTE)

DEF_REGISTER("edx", REG_EDX, XED_REG_EDX, SIZE_DWORD)
DEF_REGISTER("dx", REG_DX, XED_REG_DX, SIZE_WORD)
DEF_REGISTER("dh", REG_DH, XED_REG_DH, SIZE_BYTE)
DEF_REGISTER("dl", REG_DL, XED_REG_DL, SIZE_BYTE)

DEF_REGISTER("edi", REG_EDI, XED_REG_EDI, SIZE_DWORD)
DEF_REGISTER("di", REG_DI, XED_REG_DI, SIZE_WORD)

DEF_REGISTER("esi", REG_ESI, XED_REG_ESI, SIZE_DWORD)
DEF_REGISTER("si", REG_SI, XED_REG_SI, SIZE_WORD)

DEF_REGISTER("ebp", REG_EBP, XED_REG_EBP, SIZE_DWORD)
DEF_REGISTER("bp", REG_BP, XED_REG_BP, SIZE_WORD)

DEF_REGISTER("esp", REG_ESP, XED_REG_ESP, SIZE_DWORD)
DEF_REGISTER("sp", REG_SP, XED_REG_SP, SIZE_WORD)

/* X64 general purpose registers */
DEF_REGISTER("rax", REG_RAX, XED_REG_RAX, SIZE_QWORD)
DEF_REGISTER("rbx", REG_RBX, XED_REG_RBX, SIZE_QWORD)
DEF_REGISTER("rcx", REG_RCX, XED_REG_RCX, SIZE_QWORD)
DEF_REGISTER("rdx", REG_RDX, XED_REG_RDX, SIZE_QWORD)

DEF_REGISTER("rsi", REG_RSI, XED_REG_RSI, SIZE_QWORD)
DEF_REGISTER("sil", REG_SIL, XED_REG_SIL, SIZE_BYTE)

DEF_REGISTER("rdi", REG_RDI, XED_REG_RDI, SIZE_QWORD)
DEF_REGISTER("dil", REG_DIL, XED_REG_DIL, SIZE_BYTE)

DEF_REGISTER("rbp", REG_RBP, XED_REG_RBP, SIZE_QWORD)
DEF_REGISTER("bpl", REG_BPL, XED_REG_BPL, SIZE_BYTE)

DEF_REGISTER("rsp", REG_RSP, XED_REG_RSP, SIZE_QWORD)
DEF_REGISTER("spl", REG_SPL, XED_REG_SPL, SIZE_BYTE)

DEF_REGISTER("rip", REG_RIP, XED_REG_RIP, SIZE_QWORD)

DEF_REGISTER("r8", REG_R8, XED_REG_R8, SIZE_QWORD)
DEF_REGISTER("r8d", REG_R8D, XED_REG_R8D, SIZE_DWORD)
DEF_REGISTER("r8w", REG_R8W, XED_REG_R8W, SIZE_WORD)
DEF_REGISTER("r8b", REG_R8B, XED_REG_R8B, SIZE_BYTE)

DEF_REGISTER("r9", REG_R9, XED_REG_R9, SIZE_QWORD)
DEF_REGISTER("r9d", REG_R9D, XED_REG_R9D, SIZE_DWORD)
DEF_REGISTER("r9w", REG_R9W, XED_REG_R9W, SIZE_WORD)
DEF_REGISTER("r9b", REG_R9B, XED_REG_R9B, SIZE_BYTE)

DEF_REGISTER("r10", REG_R10, XED_REG_R10, SIZE_QWORD)
DEF_REGISTER("r10d", REG_R10D, XED_REG_R10D, SIZE_DWORD)
DEF_REGISTER("r10w", REG_R10W, XED_REG_R10W, SIZE_WORD)
DEF_REGISTER("r10b", REG_R10B, XED_REG_R10B, SIZE_BYTE)

DEF_REGISTER("r11", REG_R11, XED_REG_R11, SIZE_QWORD)
DEF_REGISTER("r11d", REG_R11D, XED_REG_R11D, SIZE_DWORD)
DEF_REGISTER("r11w", REG_R11W, XED_REG_R11W, SIZE_WORD)
DEF_REGISTER("r11b", REG_R11B, XED_REG_R11B, SIZE_BYTE)

DEF_REGISTER("r12", REG_R12, XED_REG_R12, SIZE_QWORD)
DEF_REGISTER("r12d", REG_R12D, XED_REG_R12D, SIZE_DWORD)
DEF_REGISTER("r12w", REG_R12W, XED_REG_R12W, SIZE_WORD)
DEF_REGISTER("r12b", REG_R12B, XED_REG_R12B, SIZE_BYTE)

DEF_REGISTER("r13", REG_R13, XED_REG_R13, SIZE_QWORD)
DEF_REGISTER("r13d", REG_R13D, XED_REG_R13D, SIZE_DWORD)
DEF_REGISTER("r13w", REG_R13W, XED_REG_R13W, SIZE_WORD)
DEF_REGISTER("r13b", REG_R13B, XED_REG_R13B, SIZE_BYTE)

DEF_REGISTER("r14", REG_R14, XED_REG_R14, SIZE_QWORD)
DEF_REGISTER("r14d", REG_R14D, XED_REG_R14D, SIZE_DWORD)
DEF_REGISTER("r14w", REG_R14W, XED_REG_R14W, SIZE_WORD)
DEF_REGISTER("r14b", REG_R14B, XED_REG_R14B, SIZE_BYTE)

DEF_REGISTER("r15", REG_R15, XED_REG_R15, SIZE_QWORD)
DEF_REGISTER("r15d", REG_R15D, XED_REG_R15D, SIZE_DWORD)
DEF_REGISTER("r15w", REG_R15W, XED_REG_R15W, SIZE_WORD)
DEF_REGISTER("r15b", REG_R15B, XED_REG_R15B, SIZE_BYTE)

/* FPU ST# */
DEF_REGISTER("st0", REG_ST0, XED_REG_ST0, SIZE_TBYTE)
DEF_REGISTER("st1", REG_ST1, XED_REG_ST1, SIZE_TBYTE)
DEF_REGISTER("st2", REG_ST2, XED_REG_ST2, SIZE_TBYTE)
DEF_REGISTER("st3", REG_ST3, XED_REG_ST3, SIZE_TBYTE)
DEF_REGISTER("st4", REG_ST4, XED_REG_ST4, SIZE_TBYTE)
DEF_REGISTER("st5", REG_ST5, XED_REG_ST5, SIZE_TBYTE)
DEF_REGISTER("st6", REG_ST6, XED_REG_ST6, SIZE_TBYTE)
DEF_REGISTER("st7", REG_ST7, XED_REG_ST7, SIZE_TBYTE)

/* 3DNow! MMX/MM# (Same register: both aliases) */
DEF_REGISTER("mm0", REG_MM0, XED_REG_MMX0, SIZE_QWORD)
DEF_REGISTER("mm1", REG_MM1, XED_REG_MMX1, SIZE_QWORD)
DEF_REGISTER("mm2", REG_MM2, XED_REG_MMX2, SIZE_QWORD)
DEF_REGISTER("mm3", REG_MM3, XED_REG_MMX3, SIZE_QWORD)
DEF_REGISTER("mm4", REG_MM4, XED_REG_MMX4, SIZE_QWORD)
DEF_REGISTER("mm5", REG_MM5, XED_REG_MMX5, SIZE_QWORD)
DEF_REGISTER("mm6", REG_MM6, XED_REG_MMX6, SIZE_QWORD)
DEF_REGISTER("mm7", REG_MM7, XED_REG_MMX7, SIZE_QWORD)

DEF_REGISTER("mmx0", REG_MMX0, XED_REG_MMX0, SIZE_QWORD)
DEF_REGISTER("mmx1", REG_MMX1, XED_REG_MMX1, SIZE_QWORD)
DEF_REGISTER("mmx2", REG_MMX2, XED_REG_MMX2, SIZE_QWORD)
DEF_REGISTER("mmx3", REG_MMX3, XED_REG_MMX3, SIZE_QWORD)
DEF_REGISTER("mmx4", REG_MMX4, XED_REG_MMX4, SIZE_QWORD)
DEF_REGISTER("mmx5", REG_MMX5, XED_REG_MMX5, SIZE_QWORD)
DEF_REGISTER("mmx6", REG_MMX6, XED_REG_MMX6, SIZE_QWORD)
DEF_REGISTER("mmx7", REG_MMX7, XED_REG_MMX7, SIZE_QWORD)

/* Floating point XMM# */
DEF_REGISTER("xmm0", REG_XMM0, XED_REG_XMM0, SIZE_XMMWORD)
DEF_REGISTER("xmm1", REG_XMM1, XED_REG_XMM1, SIZE_XMMWORD)
DEF_REGISTER("xmm2", REG_XMM2, XED_REG_XMM2, SIZE_XMMWORD)
DEF_REGISTER("xmm3", REG_XMM3, XED_REG_XMM3, SIZE_XMMWORD)
DEF_REGISTER("xmm4", REG_XMM4, XED_REG_XMM4, SIZE_XMMWORD)
DEF_REGISTER("xmm5", REG_XMM5, XED_REG_XMM5, SIZE_XMMWORD)
DEF_REGISTER("xmm6", REG_XMM6, XED_REG_XMM6, SIZE_XMMWORD)
DEF_REGISTER("xmm7", REG_XMM7, XED_REG_XMM7, SIZE_XMMWORD)
DEF_REGISTER("xmm8", REG_XMM8, XED_REG_XMM8, SIZE_XMMWORD)
DEF_REGISTER("xmm9", REG_XMM9, XED_REG_XMM9, SIZE_XMMWORD)
DEF_REGISTER("xmm10", REG_XMM10, XED_REG_XMM10, SIZE_XMMWORD)
DEF_REGISTER("xmm11", REG_XMM11, XED_REG_XMM11, SIZE_XMMWORD)
DEF_REGISTER("xmm12", REG_XMM12, XED_REG_XMM12, SIZE_XMMWORD)
DEF_REGISTER("xmm13", REG_XMM13, XED_REG_XMM13, SIZE_XMMWORD)
DEF_REGISTER("xmm14", REG_XMM14, XED_REG_XMM14, SIZE_XMMWORD)
DEF_REGISTER("xmm15", REG_XMM15, XED_REG_XMM15, SIZE_XMMWORD)

/* Advanced vector extensions V1 YMM# */
DEF_REGISTER("ymm0", REG_YMM0, XED_REG_YMM0, SIZE_YMMWORD)
DEF_REGISTER("ymm1", REG_YMM1, XED_REG_YMM1, SIZE_YMMWORD)
DEF_REGISTER("ymm2", REG_YMM2, XED_REG_YMM2, SIZE_YMMWORD)
DEF_REGISTER("ymm3", REG_YMM3, XED_REG_YMM3, SIZE_YMMWORD)
DEF_REGISTER("ymm4", REG_YMM4, XED_REG_YMM4, SIZE_YMMWORD)
DEF_REGISTER("ymm5", REG_YMM5, XED_REG_YMM5, SIZE_YMMWORD)
DEF_REGISTER("ymm6", REG_YMM6, XED_REG_YMM6, SIZE_YMMWORD)
DEF_REGISTER("ymm7", REG_YMM7, XED_REG_YMM7, SIZE_YMMWORD)
DEF_REGISTER("ymm8", REG_YMM8, XED_REG_YMM8, SIZE_YMMWORD)
DEF_REGISTER("ymm9", REG_YMM9, XED_REG_YMM9, SIZE_YMMWORD)
DEF_REGISTER("ymm10", REG_YMM10, XED_REG_YMM10, SIZE_YMMWORD)
DEF_REGISTER("ymm11", REG_YMM11, XED_REG_YMM11, SIZE_YMMWORD)
DEF_REGISTER("ymm12", REG_YMM12, XED_REG_YMM12, SIZE_YMMWORD)
DEF_REGISTER("ymm13", REG_YMM13, XED_REG_YMM13, SIZE_YMMWORD)
DEF_REGISTER("ymm14", REG_YMM14, XED_REG_YMM14, SIZE_YMMWORD)
DEF_REGISTER("ymm15", REG_YMM15, XED_REG_YMM15, SIZE_YMMWORD)
DEF_REGISTER("ymm16", REG_YMM16, XED_REG_YMM16, SIZE_YMMWORD)
DEF_REGISTER("ymm17", REG_YMM17, XED_REG_YMM17, SIZE_YMMWORD)
DEF_REGISTER("ymm18", REG_YMM18, XED_REG_YMM18, SIZE_YMMWORD)
DEF_REGISTER("ymm19", REG_YMM19, XED_REG_YMM19, SIZE_YMMWORD)
DEF_REGISTER("ymm20", REG_YMM20, XED_REG_YMM20, SIZE_YMMWORD)
DEF_REGISTER("ymm21", REG_YMM21, XED_REG_YMM21, SIZE_YMMWORD)
DEF_REGISTER("ymm22", REG_YMM22, XED_REG_YMM22, SIZE_YMMWORD)
DEF_REGISTER("ymm23", REG_YMM23, XED_REG_YMM23, SIZE_YMMWORD)
DEF_REGISTER("ymm24", REG_YMM24, XED_REG_YMM24, SIZE_YMMWORD)
DEF_REGISTER("ymm25", REG_YMM25, XED_REG_YMM25, SIZE_YMMWORD)
DEF_REGISTER("ymm26", REG_YMM26, XED_REG_YMM26, SIZE_YMMWORD)
DEF_REGISTER("ymm27", REG_YMM27, XED_REG_YMM27, SIZE_YMMWORD)
DEF_REGISTER("ymm28", REG_YMM28, XED_REG_YMM28, SIZE_YMMWORD)
DEF_REGISTER("ymm29", REG_YMM29, XED_REG_YMM29, SIZE_YMMWORD)
DEF_REGISTER("ymm30", REG_YMM30, XED_REG_YMM30, SIZE_YMMWORD)
DEF_REGISTER("ymm31", REG_YMM31, XED_REG_YMM31, SIZE_YMMWORD)

/* Advanced vector extensions 512 ZMM# */
DEF_REGISTER("zmm0", REG_ZMM0, XED_REG_ZMM0, SIZE_ZMMWORD)
DEF_REGISTER("zmm1", REG_ZMM1, XED_REG_ZMM1, SIZE_ZMMWORD)
DEF_REGISTER("zmm2", REG_ZMM2, XED_REG_ZMM2, SIZE_ZMMWORD)
DEF_REGISTER("zmm3", REG_ZMM3, XED_REG_ZMM3, SIZE_ZMMWORD)
DEF_REGISTER("zmm4", REG_ZMM4, XED_REG_ZMM4, SIZE_ZMMWORD)
DEF_REGISTER("zmm5", REG_ZMM5, XED_REG_ZMM5, SIZE_ZMMWORD)
DEF_REGISTER("zmm6", REG_ZMM6, XED_REG_ZMM6, SIZE_ZMMWORD)
DEF_REGISTER("zmm7", REG_ZMM7, XED_REG_ZMM7, SIZE_ZMMWORD)
DEF_REGISTER("zmm8", REG_ZMM8, XED_REG_ZMM8, SIZE_ZMMWORD)
DEF_REGISTER("zmm9", REG_ZMM9, XED_REG_ZMM9, SIZE_ZMMWORD)
DEF_REGISTER("zmm10", REG_ZMM10, XED_REG_ZMM10, SIZE_ZMMWORD)
DEF_REGISTER("zmm11", REG_ZMM11, XED_REG_ZMM11, SIZE_ZMMWORD)
DEF_REGISTER("zmm12", REG_ZMM12, XED_REG_ZMM12, SIZE_ZMMWORD)
DEF_REGISTER("zmm13", REG_ZMM13, XED_REG_ZMM13, SIZE_ZMMWORD)
DEF_REGISTER("zmm14", REG_ZMM14, XED_REG_ZMM14, SIZE_ZMMWORD)
DEF_REGISTER("zmm15", REG_ZMM15, XED_REG_ZMM15, SIZE_ZMMWORD)
DEF_REGISTER("zmm16", REG_ZMM16, XED_REG_ZMM16, SIZE_ZMMWORD)
DEF_REGISTER("zmm17", REG_ZMM17, XED_REG_ZMM17, SIZE_ZMMWORD)
DEF_REGISTER("zmm18", REG_ZMM18, XED_REG_ZMM18, SIZE_ZMMWORD)
DEF_REGISTER("zmm19", REG_ZMM19, XED_REG_ZMM19, SIZE_ZMMWORD)
DEF_REGISTER("zmm20", REG_ZMM20, XED_REG_ZMM20, SIZE_ZMMWORD)
DEF_REGISTER("zmm21", REG_ZMM21, XED_REG_ZMM21, SIZE_ZMMWORD)
DEF_REGISTER("zmm22", REG_ZMM22, XED_REG_ZMM22, SIZE_ZMMWORD)
DEF_REGISTER("zmm23", REG_ZMM23, XED_REG_ZMM23, SIZE_ZMMWORD)
DEF_REGISTER("zmm24", REG_ZMM24, XED_REG_ZMM24, SIZE_ZMMWORD)
DEF_REGISTER("zmm25", REG_ZMM25, XED_REG_ZMM25, SIZE_ZMMWORD)
DEF_REGISTER("zmm26", REG_ZMM26, XED_REG_ZMM26, SIZE_ZMMWORD)
DEF_REGISTER("zmm27", REG_ZMM27, XED_REG_ZMM27, SIZE_ZMMWORD)
DEF_REGISTER("zmm28", REG_ZMM28, XED_REG_ZMM28, SIZE_ZMMWORD)
DEF_REGISTER("zmm29", REG_ZMM29, XED_REG_ZMM29, SIZE_ZMMWORD)
DEF_REGISTER("zmm30", REG_ZMM30, XED_REG_ZMM30, SIZE_ZMMWORD)
DEF_REGISTER("zmm31", REG_ZMM31, XED_REG_ZMM31, SIZE_ZMMWORD)

/* Segment registers */
DEF_REGISTER("cs", REG_CS, XED_REG_CS, SIZE_WORD)
DEF_REGISTER("ds", REG_DS, XED_REG_DS, SIZE_WORD)
DEF_REGISTER("es", REG_ES, XED_REG_ES, SIZE_WORD)
DEF_REGISTER("fs", REG_FS, XED_REG_FS, SIZE_WORD)
DEF_REGISTER("gs", REG_GS, XED_REG_GS, SIZE_WORD)
DEF_REGISTER("ss", REG_SS, XED_REG_SS, SIZE_WORD)