static void gen_lswi(DisasContext *ctx)

{

    TCGv t0;

    TCGv_i32 t1, t2;

    int nb = NB(ctx->opcode);

    int start = rD(ctx->opcode);

    int ra = rA(ctx->opcode);

    int nr;



    if (nb == 0)

        nb = 32;

    nr = (nb + 3) / 4;

    if (unlikely(lsw_reg_in_range(start, nr, ra))) {

        gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX);

        return;

    }

    gen_set_access_type(ctx, ACCESS_INT);

    /* NIP cannot be restored if the memory exception comes from an helper */

    gen_update_nip(ctx, ctx->nip - 4);

    t0 = tcg_temp_new();

    gen_addr_register(ctx, t0);

    t1 = tcg_const_i32(nb);

    t2 = tcg_const_i32(start);

    gen_helper_lsw(cpu_env, t0, t1, t2);

    tcg_temp_free(t0);

    tcg_temp_free_i32(t1);

    tcg_temp_free_i32(t2);

}

static void gen_lswi(DisasContext *ctx)

{

    TCGv t0;

    TCGv_i32 t1, t2;

    int nb = NB(ctx->opcode);

    int start = rD(ctx->opcode);

    int ra = rA(ctx->opcode);

    int nr;



    if (nb == 0)

        nb = 32;

    nr = (nb + 3) / 4;

    if (unlikely(lsw_reg_in_range(start, nr, ra))) {

        gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX);

        return;

    }

    gen_set_access_type(ctx, ACCESS_INT);

    

    gen_update_nip(ctx, ctx->nip - 4);

    t0 = tcg_temp_new();

    gen_addr_register(ctx, t0);

    t1 = tcg_const_i32(nb);

    t2 = tcg_const_i32(start);

    gen_helper_lsw(cpu_env, t0, t1, t2);

    tcg_temp_free(t0);

    tcg_temp_free_i32(t1);

    tcg_temp_free_i32(t2);

}

    gen_update_nip(ctx, ctx->nip - 4);     gen_update_nip(ctx, ctx->nip - 4);     gen_update_nip(ctx, ctx->nip - 4);     gen_update_nip(ctx, ctx->nip - 4);         gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX);         gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX);
static void FUNC_0(DisasContext *VAR_0)

{

    TCGv t0;

    TCGv_i32 t1, t2;

    int VAR_1 = NB(VAR_0->opcode);

    int VAR_2 = rD(VAR_0->opcode);

    int VAR_3 = rA(VAR_0->opcode);

    int VAR_4;



    if (VAR_1 == 0)

        VAR_1 = 32;

    VAR_4 = (VAR_1 + 3) / 4;

    if (unlikely(lsw_reg_in_range(VAR_2, VAR_4, VAR_3))) {

        gen_inval_exception(VAR_0, POWERPC_EXCP_INVAL_LSWX);

        return;

    }

    gen_set_access_type(VAR_0, ACCESS_INT);

    

    gen_update_nip(VAR_0, VAR_0->nip - 4);

    t0 = tcg_temp_new();

    gen_addr_register(VAR_0, t0);

    t1 = tcg_const_i32(VAR_1);

    t2 = tcg_const_i32(VAR_2);

    gen_helper_lsw(cpu_env, t0, t1, t2);

    tcg_temp_free(t0);

    tcg_temp_free_i32(t1);

    tcg_temp_free_i32(t2);

}

static void FUNC_0(DisasContext *VAR_0)
{ TCGv t0; TCGv_i32 t1, t2; int VAR_1 = NB(VAR_0->opcode); int VAR_2 = rD(VAR_0->opcode); int VAR_3 = rA(VAR_0->opcode); int VAR_4; if (VAR_1 == 0)
VAR_1 = 32; VAR_4 = (VAR_1 + 3) / 4; if (unlikely(lsw_reg_in_range(VAR_2, VAR_4, VAR_3))) { gen_inval_exception(VAR_0, POWERPC_EXCP_INVAL_LSWX); return; } gen_set_access_type(VAR_0, ACCESS_INT); gen_update_nip(VAR_0, VAR_0->nip - 4); t0 = tcg_temp_new(); gen_addr_register(VAR_0, t0); t1 = tcg_const_i32(VAR_1); t2 = tcg_const_i32(VAR_2); gen_helper_lsw(cpu_env, t0, t1, t2); tcg_temp_free(t0); tcg_temp_free_i32(t1); tcg_temp_free_i32(t2); }