static int megasas_ctrl_get_info(MegasasState *s, MegasasCmd *cmd)

{

    PCIDevice *pci_dev = PCI_DEVICE(s);

    PCIDeviceClass *pci_class = PCI_DEVICE_GET_CLASS(pci_dev);

    MegasasBaseClass *base_class = MEGASAS_DEVICE_GET_CLASS(s);

    struct mfi_ctrl_info info;

    size_t dcmd_size = sizeof(info);

    BusChild *kid;

    int num_pd_disks = 0;



    memset(&info, 0x0, cmd->iov_size);

    if (cmd->iov_size < dcmd_size) {

        trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size,

                                            dcmd_size);

        return MFI_STAT_INVALID_PARAMETER;

    }



    info.pci.vendor = cpu_to_le16(pci_class->vendor_id);

    info.pci.device = cpu_to_le16(pci_class->device_id);

    info.pci.subvendor = cpu_to_le16(pci_class->subsystem_vendor_id);

    info.pci.subdevice = cpu_to_le16(pci_class->subsystem_id);



    /*

     * For some reason the firmware supports

     * only up to 8 device ports.

     * Despite supporting a far larger number

     * of devices for the physical devices.

     * So just display the first 8 devices

     * in the device port list, independent

     * of how many logical devices are actually

     * present.

     */

    info.host.type = MFI_INFO_HOST_PCIE;

    info.device.type = MFI_INFO_DEV_SAS3G;

    info.device.port_count = 8;

    QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) {

        SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child);

        uint16_t pd_id;



        if (num_pd_disks < 8) {

            pd_id = ((sdev->id & 0xFF) << 8) | (sdev->lun & 0xFF);

            info.device.port_addr[num_pd_disks] =

                cpu_to_le64(megasas_get_sata_addr(pd_id));

        }

        num_pd_disks++;

    }



    memcpy(info.product_name, base_class->product_name, 24);

    snprintf(info.serial_number, 32, "%s", s->hba_serial);

    snprintf(info.package_version, 0x60, "%s-QEMU", qemu_hw_version());

    memcpy(info.image_component[0].name, "APP", 3);

    snprintf(info.image_component[0].version, 10, "%s-QEMU",

             base_class->product_version);

    memcpy(info.image_component[0].build_date, "Apr  1 2014", 11);

    memcpy(info.image_component[0].build_time, "12:34:56", 8);

    info.image_component_count = 1;

    if (pci_dev->has_rom) {

        uint8_t biosver[32];

        uint8_t *ptr;



        ptr = memory_region_get_ram_ptr(&pci_dev->rom);

        memcpy(biosver, ptr + 0x41, 31);

        memcpy(info.image_component[1].name, "BIOS", 4);

        memcpy(info.image_component[1].version, biosver,

               strlen((const char *)biosver));

        info.image_component_count++;

    }

    info.current_fw_time = cpu_to_le32(megasas_fw_time());

    info.max_arms = 32;

    info.max_spans = 8;

    info.max_arrays = MEGASAS_MAX_ARRAYS;

    info.max_lds = MFI_MAX_LD;

    info.max_cmds = cpu_to_le16(s->fw_cmds);

    info.max_sg_elements = cpu_to_le16(s->fw_sge);

    info.max_request_size = cpu_to_le32(MEGASAS_MAX_SECTORS);

    if (!megasas_is_jbod(s))

        info.lds_present = cpu_to_le16(num_pd_disks);

    info.pd_present = cpu_to_le16(num_pd_disks);

    info.pd_disks_present = cpu_to_le16(num_pd_disks);

    info.hw_present = cpu_to_le32(MFI_INFO_HW_NVRAM |

                                   MFI_INFO_HW_MEM |

                                   MFI_INFO_HW_FLASH);

    info.memory_size = cpu_to_le16(512);

    info.nvram_size = cpu_to_le16(32);

    info.flash_size = cpu_to_le16(16);

    info.raid_levels = cpu_to_le32(MFI_INFO_RAID_0);

    info.adapter_ops = cpu_to_le32(MFI_INFO_AOPS_RBLD_RATE |

                                    MFI_INFO_AOPS_SELF_DIAGNOSTIC |

                                    MFI_INFO_AOPS_MIXED_ARRAY);

    info.ld_ops = cpu_to_le32(MFI_INFO_LDOPS_DISK_CACHE_POLICY |

                               MFI_INFO_LDOPS_ACCESS_POLICY |

                               MFI_INFO_LDOPS_IO_POLICY |

                               MFI_INFO_LDOPS_WRITE_POLICY |

                               MFI_INFO_LDOPS_READ_POLICY);

    info.max_strips_per_io = cpu_to_le16(s->fw_sge);

    info.stripe_sz_ops.min = 3;

    info.stripe_sz_ops.max = ctz32(MEGASAS_MAX_SECTORS + 1);

    info.properties.pred_fail_poll_interval = cpu_to_le16(300);

    info.properties.intr_throttle_cnt = cpu_to_le16(16);

    info.properties.intr_throttle_timeout = cpu_to_le16(50);

    info.properties.rebuild_rate = 30;

    info.properties.patrol_read_rate = 30;

    info.properties.bgi_rate = 30;

    info.properties.cc_rate = 30;

    info.properties.recon_rate = 30;

    info.properties.cache_flush_interval = 4;

    info.properties.spinup_drv_cnt = 2;

    info.properties.spinup_delay = 6;

    info.properties.ecc_bucket_size = 15;

    info.properties.ecc_bucket_leak_rate = cpu_to_le16(1440);

    info.properties.expose_encl_devices = 1;

    info.properties.OnOffProperties = cpu_to_le32(MFI_CTRL_PROP_EnableJBOD);

    info.pd_ops = cpu_to_le32(MFI_INFO_PDOPS_FORCE_ONLINE |

                               MFI_INFO_PDOPS_FORCE_OFFLINE);

    info.pd_mix_support = cpu_to_le32(MFI_INFO_PDMIX_SAS |

                                       MFI_INFO_PDMIX_SATA |

                                       MFI_INFO_PDMIX_LD);



    cmd->iov_size -= dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg);

    return MFI_STAT_OK;

}

static int megasas_ctrl_get_info(MegasasState *s, MegasasCmd *cmd)

{

    PCIDevice *pci_dev = PCI_DEVICE(s);

    PCIDeviceClass *pci_class = PCI_DEVICE_GET_CLASS(pci_dev);

    MegasasBaseClass *base_class = MEGASAS_DEVICE_GET_CLASS(s);

    struct mfi_ctrl_info info;

    size_t dcmd_size = sizeof(info);

    BusChild *kid;

    int num_pd_disks = 0;



    memset(&info, 0x0, cmd->iov_size);

    if (cmd->iov_size < dcmd_size) {

        trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size,

                                            dcmd_size);

        return MFI_STAT_INVALID_PARAMETER;

    }



    info.pci.vendor = cpu_to_le16(pci_class->vendor_id);

    info.pci.device = cpu_to_le16(pci_class->device_id);

    info.pci.subvendor = cpu_to_le16(pci_class->subsystem_vendor_id);

    info.pci.subdevice = cpu_to_le16(pci_class->subsystem_id);



    



















    info.host.type = MFI_INFO_HOST_PCIE;

    info.device.type = MFI_INFO_DEV_SAS3G;

    info.device.port_count = 8;

    QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) {

        SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child);

        uint16_t pd_id;



        if (num_pd_disks < 8) {

            pd_id = ((sdev->id & 0xFF) << 8) | (sdev->lun & 0xFF);

            info.device.port_addr[num_pd_disks] =

                cpu_to_le64(megasas_get_sata_addr(pd_id));

        }

        num_pd_disks++;

    }



    memcpy(info.product_name, base_class->product_name, 24);

    snprintf(info.serial_number, 32, "%s", s->hba_serial);

    snprintf(info.package_version, 0x60, "%s-QEMU", qemu_hw_version());

    memcpy(info.image_component[0].name, "APP", 3);

    snprintf(info.image_component[0].version, 10, "%s-QEMU",

             base_class->product_version);

    memcpy(info.image_component[0].build_date, "Apr  1 2014", 11);

    memcpy(info.image_component[0].build_time, "12:34:56", 8);

    info.image_component_count = 1;

    if (pci_dev->has_rom) {

        uint8_t biosver[32];

        uint8_t *ptr;



        ptr = memory_region_get_ram_ptr(&pci_dev->rom);

        memcpy(biosver, ptr + 0x41, 31);

        memcpy(info.image_component[1].name, "BIOS", 4);

        memcpy(info.image_component[1].version, biosver,

               strlen((const char *)biosver));

        info.image_component_count++;

    }

    info.current_fw_time = cpu_to_le32(megasas_fw_time());

    info.max_arms = 32;

    info.max_spans = 8;

    info.max_arrays = MEGASAS_MAX_ARRAYS;

    info.max_lds = MFI_MAX_LD;

    info.max_cmds = cpu_to_le16(s->fw_cmds);

    info.max_sg_elements = cpu_to_le16(s->fw_sge);

    info.max_request_size = cpu_to_le32(MEGASAS_MAX_SECTORS);

    if (!megasas_is_jbod(s))

        info.lds_present = cpu_to_le16(num_pd_disks);

    info.pd_present = cpu_to_le16(num_pd_disks);

    info.pd_disks_present = cpu_to_le16(num_pd_disks);

    info.hw_present = cpu_to_le32(MFI_INFO_HW_NVRAM |

                                   MFI_INFO_HW_MEM |

                                   MFI_INFO_HW_FLASH);

    info.memory_size = cpu_to_le16(512);

    info.nvram_size = cpu_to_le16(32);

    info.flash_size = cpu_to_le16(16);

    info.raid_levels = cpu_to_le32(MFI_INFO_RAID_0);

    info.adapter_ops = cpu_to_le32(MFI_INFO_AOPS_RBLD_RATE |

                                    MFI_INFO_AOPS_SELF_DIAGNOSTIC |

                                    MFI_INFO_AOPS_MIXED_ARRAY);

    info.ld_ops = cpu_to_le32(MFI_INFO_LDOPS_DISK_CACHE_POLICY |

                               MFI_INFO_LDOPS_ACCESS_POLICY |

                               MFI_INFO_LDOPS_IO_POLICY |

                               MFI_INFO_LDOPS_WRITE_POLICY |

                               MFI_INFO_LDOPS_READ_POLICY);

    info.max_strips_per_io = cpu_to_le16(s->fw_sge);

    info.stripe_sz_ops.min = 3;

    info.stripe_sz_ops.max = ctz32(MEGASAS_MAX_SECTORS + 1);

    info.properties.pred_fail_poll_interval = cpu_to_le16(300);

    info.properties.intr_throttle_cnt = cpu_to_le16(16);

    info.properties.intr_throttle_timeout = cpu_to_le16(50);

    info.properties.rebuild_rate = 30;

    info.properties.patrol_read_rate = 30;

    info.properties.bgi_rate = 30;

    info.properties.cc_rate = 30;

    info.properties.recon_rate = 30;

    info.properties.cache_flush_interval = 4;

    info.properties.spinup_drv_cnt = 2;

    info.properties.spinup_delay = 6;

    info.properties.ecc_bucket_size = 15;

    info.properties.ecc_bucket_leak_rate = cpu_to_le16(1440);

    info.properties.expose_encl_devices = 1;

    info.properties.OnOffProperties = cpu_to_le32(MFI_CTRL_PROP_EnableJBOD);

    info.pd_ops = cpu_to_le32(MFI_INFO_PDOPS_FORCE_ONLINE |

                               MFI_INFO_PDOPS_FORCE_OFFLINE);

    info.pd_mix_support = cpu_to_le32(MFI_INFO_PDMIX_SAS |

                                       MFI_INFO_PDMIX_SATA |

                                       MFI_INFO_PDMIX_LD);



    cmd->iov_size -= dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg);

    return MFI_STAT_OK;

}

    memset(&info, 0x0, cmd->iov_size);
static int FUNC_0(MegasasState *VAR_0, MegasasCmd *VAR_1)

{

    PCIDevice *pci_dev = PCI_DEVICE(VAR_0);

    PCIDeviceClass *pci_class = PCI_DEVICE_GET_CLASS(pci_dev);

    MegasasBaseClass *base_class = MEGASAS_DEVICE_GET_CLASS(VAR_0);

    struct mfi_ctrl_info VAR_2;

    size_t dcmd_size = sizeof(VAR_2);

    BusChild *kid;

    int VAR_3 = 0;



    memset(&VAR_2, 0x0, VAR_1->iov_size);

    if (VAR_1->iov_size < dcmd_size) {

        trace_megasas_dcmd_invalid_xfer_len(VAR_1->index, VAR_1->iov_size,

                                            dcmd_size);

        return MFI_STAT_INVALID_PARAMETER;

    }



    VAR_2.pci.vendor = cpu_to_le16(pci_class->vendor_id);

    VAR_2.pci.device = cpu_to_le16(pci_class->device_id);

    VAR_2.pci.subvendor = cpu_to_le16(pci_class->subsystem_vendor_id);

    VAR_2.pci.subdevice = cpu_to_le16(pci_class->subsystem_id);



    



















    VAR_2.host.type = MFI_INFO_HOST_PCIE;

    VAR_2.device.type = MFI_INFO_DEV_SAS3G;

    VAR_2.device.port_count = 8;

    QTAILQ_FOREACH(kid, &VAR_0->bus.qbus.children, sibling) {

        SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child);

        uint16_t pd_id;



        if (VAR_3 < 8) {

            pd_id = ((sdev->id & 0xFF) << 8) | (sdev->lun & 0xFF);

            VAR_2.device.port_addr[VAR_3] =

                cpu_to_le64(megasas_get_sata_addr(pd_id));

        }

        VAR_3++;

    }



    memcpy(VAR_2.product_name, base_class->product_name, 24);

    snprintf(VAR_2.serial_number, 32, "%VAR_0", VAR_0->hba_serial);

    snprintf(VAR_2.package_version, 0x60, "%VAR_0-QEMU", qemu_hw_version());

    memcpy(VAR_2.image_component[0].name, "APP", 3);

    snprintf(VAR_2.image_component[0].version, 10, "%VAR_0-QEMU",

             base_class->product_version);

    memcpy(VAR_2.image_component[0].build_date, "Apr  1 2014", 11);

    memcpy(VAR_2.image_component[0].build_time, "12:34:56", 8);

    VAR_2.image_component_count = 1;

    if (pci_dev->has_rom) {

        uint8_t biosver[32];

        uint8_t *ptr;



        ptr = memory_region_get_ram_ptr(&pci_dev->rom);

        memcpy(biosver, ptr + 0x41, 31);

        memcpy(VAR_2.image_component[1].name, "BIOS", 4);

        memcpy(VAR_2.image_component[1].version, biosver,

               strlen((const char *)biosver));

        VAR_2.image_component_count++;

    }

    VAR_2.current_fw_time = cpu_to_le32(megasas_fw_time());

    VAR_2.max_arms = 32;

    VAR_2.max_spans = 8;

    VAR_2.max_arrays = MEGASAS_MAX_ARRAYS;

    VAR_2.max_lds = MFI_MAX_LD;

    VAR_2.max_cmds = cpu_to_le16(VAR_0->fw_cmds);

    VAR_2.max_sg_elements = cpu_to_le16(VAR_0->fw_sge);

    VAR_2.max_request_size = cpu_to_le32(MEGASAS_MAX_SECTORS);

    if (!megasas_is_jbod(VAR_0))

        VAR_2.lds_present = cpu_to_le16(VAR_3);

    VAR_2.pd_present = cpu_to_le16(VAR_3);

    VAR_2.pd_disks_present = cpu_to_le16(VAR_3);

    VAR_2.hw_present = cpu_to_le32(MFI_INFO_HW_NVRAM |

                                   MFI_INFO_HW_MEM |

                                   MFI_INFO_HW_FLASH);

    VAR_2.memory_size = cpu_to_le16(512);

    VAR_2.nvram_size = cpu_to_le16(32);

    VAR_2.flash_size = cpu_to_le16(16);

    VAR_2.raid_levels = cpu_to_le32(MFI_INFO_RAID_0);

    VAR_2.adapter_ops = cpu_to_le32(MFI_INFO_AOPS_RBLD_RATE |

                                    MFI_INFO_AOPS_SELF_DIAGNOSTIC |

                                    MFI_INFO_AOPS_MIXED_ARRAY);

    VAR_2.ld_ops = cpu_to_le32(MFI_INFO_LDOPS_DISK_CACHE_POLICY |

                               MFI_INFO_LDOPS_ACCESS_POLICY |

                               MFI_INFO_LDOPS_IO_POLICY |

                               MFI_INFO_LDOPS_WRITE_POLICY |

                               MFI_INFO_LDOPS_READ_POLICY);

    VAR_2.max_strips_per_io = cpu_to_le16(VAR_0->fw_sge);

    VAR_2.stripe_sz_ops.min = 3;

    VAR_2.stripe_sz_ops.max = ctz32(MEGASAS_MAX_SECTORS + 1);

    VAR_2.properties.pred_fail_poll_interval = cpu_to_le16(300);

    VAR_2.properties.intr_throttle_cnt = cpu_to_le16(16);

    VAR_2.properties.intr_throttle_timeout = cpu_to_le16(50);

    VAR_2.properties.rebuild_rate = 30;

    VAR_2.properties.patrol_read_rate = 30;

    VAR_2.properties.bgi_rate = 30;

    VAR_2.properties.cc_rate = 30;

    VAR_2.properties.recon_rate = 30;

    VAR_2.properties.cache_flush_interval = 4;

    VAR_2.properties.spinup_drv_cnt = 2;

    VAR_2.properties.spinup_delay = 6;

    VAR_2.properties.ecc_bucket_size = 15;

    VAR_2.properties.ecc_bucket_leak_rate = cpu_to_le16(1440);

    VAR_2.properties.expose_encl_devices = 1;

    VAR_2.properties.OnOffProperties = cpu_to_le32(MFI_CTRL_PROP_EnableJBOD);

    VAR_2.pd_ops = cpu_to_le32(MFI_INFO_PDOPS_FORCE_ONLINE |

                               MFI_INFO_PDOPS_FORCE_OFFLINE);

    VAR_2.pd_mix_support = cpu_to_le32(MFI_INFO_PDMIX_SAS |

                                       MFI_INFO_PDMIX_SATA |

                                       MFI_INFO_PDMIX_LD);



    VAR_1->iov_size -= dma_buf_read((uint8_t *)&VAR_2, dcmd_size, &VAR_1->qsg);

    return MFI_STAT_OK;

}

static int FUNC_0(MegasasState *VAR_0, MegasasCmd *VAR_1)
{ PCIDevice *pci_dev = PCI_DEVICE(VAR_0); PCIDeviceClass *pci_class = PCI_DEVICE_GET_CLASS(pci_dev); MegasasBaseClass *base_class = MEGASAS_DEVICE_GET_CLASS(VAR_0); struct mfi_ctrl_info VAR_2; size_t dcmd_size = sizeof(VAR_2); BusChild *kid; int VAR_3 = 0; memset(&VAR_2, 0x0, VAR_1->iov_size); if (VAR_1->iov_size < dcmd_size) { trace_megasas_dcmd_invalid_xfer_len(VAR_1->index, VAR_1->iov_size,
dcmd_size); return MFI_STAT_INVALID_PARAMETER; } VAR_2.pci.vendor = cpu_to_le16(pci_class->vendor_id); VAR_2.pci.device = cpu_to_le16(pci_class->device_id); VAR_2.pci.subvendor = cpu_to_le16(pci_class->subsystem_vendor_id); VAR_2.pci.subdevice = cpu_to_le16(pci_class->subsystem_id); VAR_2.host.type = MFI_INFO_HOST_PCIE; VAR_2.device.type = MFI_INFO_DEV_SAS3G; VAR_2.device.port_count = 8; QTAILQ_FOREACH(kid, &VAR_0->bus.qbus.children, sibling) { SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child); uint16_t pd_id; if (VAR_3 < 8) { pd_id = ((sdev->id & 0xFF) << 8) | (sdev->lun & 0xFF); VAR_2.device.port_addr[VAR_3] =
cpu_to_le64(megasas_get_sata_addr(pd_id)); } VAR_3++; } memcpy(VAR_2.product_name, base_class->product_name, 24); snprintf(VAR_2.serial_number, 32, "%VAR_0", VAR_0->hba_serial); snprintf(VAR_2.package_version, 0x60, "%VAR_0-QEMU", qemu_hw_version()); memcpy(VAR_2.image_component[0].name, "APP", 3); snprintf(VAR_2.image_component[0].version, 10, "%VAR_0-QEMU",
base_class->product_version); memcpy(VAR_2.image_component[0].build_date, "Apr  1 2014", 11); memcpy(VAR_2.image_component[0].build_time, "12:34:56", 8); VAR_2.image_component_count = 1; if (pci_dev->has_rom) { uint8_t biosver[32]; uint8_t *ptr; ptr = memory_region_get_ram_ptr(&pci_dev->rom); memcpy(biosver, ptr + 0x41, 31); memcpy(VAR_2.image_component[1].name, "BIOS", 4); memcpy(VAR_2.image_component[1].version, biosver,
strlen((const char *)biosver)); VAR_2.image_component_count++; } VAR_2.current_fw_time = cpu_to_le32(megasas_fw_time()); VAR_2.max_arms = 32; VAR_2.max_spans = 8; VAR_2.max_arrays = MEGASAS_MAX_ARRAYS; VAR_2.max_lds = MFI_MAX_LD; VAR_2.max_cmds = cpu_to_le16(VAR_0->fw_cmds); VAR_2.max_sg_elements = cpu_to_le16(VAR_0->fw_sge); VAR_2.max_request_size = cpu_to_le32(MEGASAS_MAX_SECTORS); if (!megasas_is_jbod(VAR_0))
VAR_2.lds_present = cpu_to_le16(VAR_3); VAR_2.pd_present = cpu_to_le16(VAR_3); VAR_2.pd_disks_present = cpu_to_le16(VAR_3); VAR_2.hw_present = cpu_to_le32(MFI_INFO_HW_NVRAM |
MFI_INFO_HW_MEM |
MFI_INFO_HW_FLASH); VAR_2.memory_size = cpu_to_le16(512); VAR_2.nvram_size = cpu_to_le16(32); VAR_2.flash_size = cpu_to_le16(16); VAR_2.raid_levels = cpu_to_le32(MFI_INFO_RAID_0); VAR_2.adapter_ops = cpu_to_le32(MFI_INFO_AOPS_RBLD_RATE |
MFI_INFO_AOPS_SELF_DIAGNOSTIC |
MFI_INFO_AOPS_MIXED_ARRAY); VAR_2.ld_ops = cpu_to_le32(MFI_INFO_LDOPS_DISK_CACHE_POLICY |
MFI_INFO_LDOPS_ACCESS_POLICY |
MFI_INFO_LDOPS_IO_POLICY |
MFI_INFO_LDOPS_WRITE_POLICY |
MFI_INFO_LDOPS_READ_POLICY); VAR_2.max_strips_per_io = cpu_to_le16(VAR_0->fw_sge); VAR_2.stripe_sz_ops.min = 3; VAR_2.stripe_sz_ops.max = ctz32(MEGASAS_MAX_SECTORS + 1); VAR_2.properties.pred_fail_poll_interval = cpu_to_le16(300); VAR_2.properties.intr_throttle_cnt = cpu_to_le16(16); VAR_2.properties.intr_throttle_timeout = cpu_to_le16(50); VAR_2.properties.rebuild_rate = 30; VAR_2.properties.patrol_read_rate = 30; VAR_2.properties.bgi_rate = 30; VAR_2.properties.cc_rate = 30; VAR_2.properties.recon_rate = 30; VAR_2.properties.cache_flush_interval = 4; VAR_2.properties.spinup_drv_cnt = 2; VAR_2.properties.spinup_delay = 6; VAR_2.properties.ecc_bucket_size = 15; VAR_2.properties.ecc_bucket_leak_rate = cpu_to_le16(1440); VAR_2.properties.expose_encl_devices = 1; VAR_2.properties.OnOffProperties = cpu_to_le32(MFI_CTRL_PROP_EnableJBOD); VAR_2.pd_ops = cpu_to_le32(MFI_INFO_PDOPS_FORCE_ONLINE |
MFI_INFO_PDOPS_FORCE_OFFLINE); VAR_2.pd_mix_support = cpu_to_le32(MFI_INFO_PDMIX_SAS |
MFI_INFO_PDMIX_SATA |
MFI_INFO_PDMIX_LD); VAR_1->iov_size -= dma_buf_read((uint8_t *)&VAR_2, dcmd_size, &VAR_1->qsg); return MFI_STAT_OK; }