static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm)

{

    fadt->model = 1;

    fadt->reserved1 = 0;

    fadt->sci_int = cpu_to_le16(pm->sci_int);

    fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD);

    fadt->acpi_enable = pm->acpi_enable_cmd;

    fadt->acpi_disable = pm->acpi_disable_cmd;

    /* EVT, CNT, TMR offset matches hw/acpi/core.c */

    fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base);

    fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04);

    fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08);

    fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk);

    /* EVT, CNT, TMR length matches hw/acpi/core.c */

    fadt->pm1_evt_len = 4;

    fadt->pm1_cnt_len = 2;

    fadt->pm_tmr_len = 4;

    fadt->gpe0_blk_len = pm->gpe0_blk_len;

    fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */

    fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */

    fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |

                              (1 << ACPI_FADT_F_PROC_C1) |

                              (1 << ACPI_FADT_F_SLP_BUTTON) |

                              (1 << ACPI_FADT_F_RTC_S4));

    fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK);

    /* APIC destination mode ("Flat Logical") has an upper limit of 8 CPUs

     * For more than 8 CPUs, "Clustered Logical" mode has to be used

     */

    if (max_cpus > 8) {

        fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL);

    }

    fadt->century = RTC_CENTURY;

}

static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm)

{

    fadt->model = 1;

    fadt->reserved1 = 0;

    fadt->sci_int = cpu_to_le16(pm->sci_int);

    fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD);

    fadt->acpi_enable = pm->acpi_enable_cmd;

    fadt->acpi_disable = pm->acpi_disable_cmd;

    

    fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base);

    fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04);

    fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08);

    fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk);

    

    fadt->pm1_evt_len = 4;

    fadt->pm1_cnt_len = 2;

    fadt->pm_tmr_len = 4;

    fadt->gpe0_blk_len = pm->gpe0_blk_len;

    fadt->plvl2_lat = cpu_to_le16(0xfff); 

    fadt->plvl3_lat = cpu_to_le16(0xfff); 

    fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |

                              (1 << ACPI_FADT_F_PROC_C1) |

                              (1 << ACPI_FADT_F_SLP_BUTTON) |

                              (1 << ACPI_FADT_F_RTC_S4));

    fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK);

    





    if (max_cpus > 8) {

        fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL);

    }

    fadt->century = RTC_CENTURY;

}

static void FUNC_0(AcpiFadtDescriptorRev1 *VAR_0, AcpiPmInfo *VAR_1)

{

    VAR_0->model = 1;

    VAR_0->reserved1 = 0;

    VAR_0->sci_int = cpu_to_le16(VAR_1->sci_int);

    VAR_0->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD);

    VAR_0->acpi_enable = VAR_1->acpi_enable_cmd;

    VAR_0->acpi_disable = VAR_1->acpi_disable_cmd;

    

    VAR_0->pm1a_evt_blk = cpu_to_le32(VAR_1->io_base);

    VAR_0->pm1a_cnt_blk = cpu_to_le32(VAR_1->io_base + 0x04);

    VAR_0->pm_tmr_blk = cpu_to_le32(VAR_1->io_base + 0x08);

    VAR_0->gpe0_blk = cpu_to_le32(VAR_1->gpe0_blk);

    

    VAR_0->pm1_evt_len = 4;

    VAR_0->pm1_cnt_len = 2;

    VAR_0->pm_tmr_len = 4;

    VAR_0->gpe0_blk_len = VAR_1->gpe0_blk_len;

    VAR_0->plvl2_lat = cpu_to_le16(0xfff); 

    VAR_0->plvl3_lat = cpu_to_le16(0xfff); 

    VAR_0->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |

                              (1 << ACPI_FADT_F_PROC_C1) |

                              (1 << ACPI_FADT_F_SLP_BUTTON) |

                              (1 << ACPI_FADT_F_RTC_S4));

    VAR_0->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK);

    





    if (max_cpus > 8) {

        VAR_0->flags |= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL);

    }

    VAR_0->century = RTC_CENTURY;

}

static void FUNC_0(AcpiFadtDescriptorRev1 *VAR_0, AcpiPmInfo *VAR_1)
{ VAR_0->model = 1; VAR_0->reserved1 = 0; VAR_0->sci_int = cpu_to_le16(VAR_1->sci_int); VAR_0->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD); VAR_0->acpi_enable = VAR_1->acpi_enable_cmd; VAR_0->acpi_disable = VAR_1->acpi_disable_cmd; VAR_0->pm1a_evt_blk = cpu_to_le32(VAR_1->io_base); VAR_0->pm1a_cnt_blk = cpu_to_le32(VAR_1->io_base + 0x04); VAR_0->pm_tmr_blk = cpu_to_le32(VAR_1->io_base + 0x08); VAR_0->gpe0_blk = cpu_to_le32(VAR_1->gpe0_blk); VAR_0->pm1_evt_len = 4; VAR_0->pm1_cnt_len = 2; VAR_0->pm_tmr_len = 4; VAR_0->gpe0_blk_len = VAR_1->gpe0_blk_len; VAR_0->plvl2_lat = cpu_to_le16(0xfff); VAR_0->plvl3_lat = cpu_to_le16(0xfff); VAR_0->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |
(1 << ACPI_FADT_F_PROC_C1) |
(1 << ACPI_FADT_F_SLP_BUTTON) |
(1 << ACPI_FADT_F_RTC_S4)); VAR_0->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK); if (max_cpus > 8) { VAR_0->flags |= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL); } VAR_0->century = RTC_CENTURY; }