struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,

                qemu_irq irq, omap_clk fclk, omap_clk iclk,

                qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr)

{

    target_phys_addr_t base = omap_l4_attach(ta, 0, 0);

    struct omap_uart_s *s = omap_uart_init(base, irq,

                    fclk, iclk, txdma, rxdma, chr);

    int iomemtype = cpu_register_io_memory(0, omap_uart_readfn,

                    omap_uart_writefn, s);



    s->ta = ta;

    s->base = base;



    cpu_register_physical_memory(s->base + 0x20, 0x100, iomemtype);



    return s;

}

struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,

                qemu_irq irq, omap_clk fclk, omap_clk iclk,

                qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr)

{

    target_phys_addr_t base = omap_l4_attach(ta, 0, 0);

    struct omap_uart_s *s = omap_uart_init(base, irq,

                    fclk, iclk, txdma, rxdma, chr);

    int iomemtype = cpu_register_io_memory(0, omap_uart_readfn,

                    omap_uart_writefn, s);



    s->ta = ta;

    s->base = base;



    cpu_register_physical_memory(s->base + 0x20, 0x100, iomemtype);



    return s;

}

struct omap_uart_s *FUNC_0(struct omap_target_agent_s *VAR_0,

                qemu_irq VAR_1, omap_clk VAR_2, omap_clk VAR_3,

                qemu_irq VAR_4, qemu_irq VAR_5, CharDriverState *VAR_6)

{

    target_phys_addr_t base = omap_l4_attach(VAR_0, 0, 0);

    struct omap_uart_s *VAR_7 = omap_uart_init(base, VAR_1,

                    VAR_2, VAR_3, VAR_4, VAR_5, VAR_6);

    int VAR_8 = cpu_register_io_memory(0, omap_uart_readfn,

                    omap_uart_writefn, VAR_7);



    VAR_7->VAR_0 = VAR_0;

    VAR_7->base = base;



    cpu_register_physical_memory(VAR_7->base + 0x20, 0x100, VAR_8);



    return VAR_7;

}

struct omap_uart_s *FUNC_0(struct omap_target_agent_s *VAR_0,
qemu_irq VAR_1, omap_clk VAR_2, omap_clk VAR_3,
qemu_irq VAR_4, qemu_irq VAR_5, CharDriverState *VAR_6)
{ target_phys_addr_t base = omap_l4_attach(VAR_0, 0, 0); struct omap_uart_s *VAR_7 = omap_uart_init(base, VAR_1,
VAR_2, VAR_3, VAR_4, VAR_5, VAR_6); int VAR_8 = cpu_register_io_memory(0, omap_uart_readfn,
omap_uart_writefn, VAR_7); VAR_7->VAR_0 = VAR_0; VAR_7->base = base; cpu_register_physical_memory(VAR_7->base + 0x20, 0x100, VAR_8); return VAR_7; }