static void armv7m_nvic_clear_pending(void *opaque, int irq)

{

    NVICState *s = (NVICState *)opaque;

    VecInfo *vec;



    assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq);



    vec = &s->vectors[irq];

    trace_nvic_clear_pending(irq, vec->enabled, vec->prio);

    if (vec->pending) {

        vec->pending = 0;

        nvic_irq_update(s);

    }

}

static void armv7m_nvic_clear_pending(void *opaque, int irq)

{

    NVICState *s = (NVICState *)opaque;

    VecInfo *vec;



    assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq);



    vec = &s->vectors[irq];

    trace_nvic_clear_pending(irq, vec->enabled, vec->prio);

    if (vec->pending) {

        vec->pending = 0;

        nvic_irq_update(s);

    }

}

static void FUNC_0(void *VAR_0, int VAR_1)

{

    NVICState *s = (NVICState *)VAR_0;

    VecInfo *vec;



    assert(VAR_1 > ARMV7M_EXCP_RESET && VAR_1 < s->num_irq);



    vec = &s->vectors[VAR_1];

    trace_nvic_clear_pending(VAR_1, vec->enabled, vec->prio);

    if (vec->pending) {

        vec->pending = 0;

        nvic_irq_update(s);

    }

}

static void FUNC_0(void *VAR_0, int VAR_1)
{ NVICState *s = (NVICState *)VAR_0; VecInfo *vec; assert(VAR_1 > ARMV7M_EXCP_RESET && VAR_1 < s->num_irq); vec = &s->vectors[VAR_1]; trace_nvic_clear_pending(VAR_1, vec->enabled, vec->prio); if (vec->pending) { vec->pending = 0; nvic_irq_update(s); } }