static void pm_update_sci(VT686PMState *s)

{

    int sci_level, pmsts;



    pmsts = acpi_pm1_evt_get_sts(&s->ar, s->ar.tmr.overflow_time);

    sci_level = (((pmsts & s->ar.pm1.evt.en) &

                  (ACPI_BITMASK_RT_CLOCK_ENABLE |

                   ACPI_BITMASK_POWER_BUTTON_ENABLE |

                   ACPI_BITMASK_GLOBAL_LOCK_ENABLE |

                   ACPI_BITMASK_TIMER_ENABLE)) != 0);

    qemu_set_irq(s->dev.irq[0], sci_level);

    /* schedule a timer interruption if needed */

    acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&

                       !(pmsts & ACPI_BITMASK_TIMER_STATUS));

}

static void pm_update_sci(VT686PMState *s)

{

    int sci_level, pmsts;



    pmsts = acpi_pm1_evt_get_sts(&s->ar, s->ar.tmr.overflow_time);

    sci_level = (((pmsts & s->ar.pm1.evt.en) &

                  (ACPI_BITMASK_RT_CLOCK_ENABLE |

                   ACPI_BITMASK_POWER_BUTTON_ENABLE |

                   ACPI_BITMASK_GLOBAL_LOCK_ENABLE |

                   ACPI_BITMASK_TIMER_ENABLE)) != 0);

    qemu_set_irq(s->dev.irq[0], sci_level);

    

    acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&

                       !(pmsts & ACPI_BITMASK_TIMER_STATUS));

}

    pmsts = acpi_pm1_evt_get_sts(&s->ar, s->ar.tmr.overflow_time);     pmsts = acpi_pm1_evt_get_sts(&s->ar, s->ar.tmr.overflow_time);
static void FUNC_0(VT686PMState *VAR_0)

{

    int VAR_1, VAR_2;



    VAR_2 = acpi_pm1_evt_get_sts(&VAR_0->ar, VAR_0->ar.tmr.overflow_time);

    VAR_1 = (((VAR_2 & VAR_0->ar.pm1.evt.en) &

                  (ACPI_BITMASK_RT_CLOCK_ENABLE |

                   ACPI_BITMASK_POWER_BUTTON_ENABLE |

                   ACPI_BITMASK_GLOBAL_LOCK_ENABLE |

                   ACPI_BITMASK_TIMER_ENABLE)) != 0);

    qemu_set_irq(VAR_0->dev.irq[0], VAR_1);

    

    acpi_pm_tmr_update(&VAR_0->ar, (VAR_0->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&

                       !(VAR_2 & ACPI_BITMASK_TIMER_STATUS));

}

static void FUNC_0(VT686PMState *VAR_0)
{ int VAR_1, VAR_2; VAR_2 = acpi_pm1_evt_get_sts(&VAR_0->ar, VAR_0->ar.tmr.overflow_time); VAR_1 = (((VAR_2 & VAR_0->ar.pm1.evt.en) &
(ACPI_BITMASK_RT_CLOCK_ENABLE |
ACPI_BITMASK_POWER_BUTTON_ENABLE |
ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
ACPI_BITMASK_TIMER_ENABLE)) != 0); qemu_set_irq(VAR_0->dev.irq[0], VAR_1); acpi_pm_tmr_update(&VAR_0->ar, (VAR_0->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
!(VAR_2 & ACPI_BITMASK_TIMER_STATUS)); }