int cpu_memory_rw_debug(CPUArchState *env, target_ulong addr,

                        uint8_t *buf, int len, int is_write)

{

    int l;

    target_phys_addr_t phys_addr;

    target_ulong page;



    while (len > 0) {

        page = addr & TARGET_PAGE_MASK;

        phys_addr = cpu_get_phys_page_debug(env, page);

        /* if no physical page mapped, return an error */

        if (phys_addr == -1)

            return -1;

        l = (page + TARGET_PAGE_SIZE) - addr;

        if (l > len)

            l = len;

        phys_addr += (addr & ~TARGET_PAGE_MASK);

        if (is_write)

            cpu_physical_memory_write_rom(phys_addr, buf, l);

        else

            cpu_physical_memory_rw(phys_addr, buf, l, is_write);

        len -= l;

        buf += l;

        addr += l;

    }

    return 0;

}

int cpu_memory_rw_debug(CPUArchState *env, target_ulong addr,

                        uint8_t *buf, int len, int is_write)

{

    int l;

    target_phys_addr_t phys_addr;

    target_ulong page;



    while (len > 0) {

        page = addr & TARGET_PAGE_MASK;

        phys_addr = cpu_get_phys_page_debug(env, page);

        

        if (phys_addr == -1)

            return -1;

        l = (page + TARGET_PAGE_SIZE) - addr;

        if (l > len)

            l = len;

        phys_addr += (addr & ~TARGET_PAGE_MASK);

        if (is_write)

            cpu_physical_memory_write_rom(phys_addr, buf, l);

        else

            cpu_physical_memory_rw(phys_addr, buf, l, is_write);

        len -= l;

        buf += l;

        addr += l;

    }

    return 0;

}

int FUNC_0(CPUArchState *VAR_0, target_ulong VAR_1,

                        uint8_t *VAR_2, int VAR_3, int VAR_4)

{

    int VAR_5;

    target_phys_addr_t phys_addr;

    target_ulong page;



    while (VAR_3 > 0) {

        page = VAR_1 & TARGET_PAGE_MASK;

        phys_addr = cpu_get_phys_page_debug(VAR_0, page);

        

        if (phys_addr == -1)

            return -1;

        VAR_5 = (page + TARGET_PAGE_SIZE) - VAR_1;

        if (VAR_5 > VAR_3)

            VAR_5 = VAR_3;

        phys_addr += (VAR_1 & ~TARGET_PAGE_MASK);

        if (VAR_4)

            cpu_physical_memory_write_rom(phys_addr, VAR_2, VAR_5);

        else

            cpu_physical_memory_rw(phys_addr, VAR_2, VAR_5, VAR_4);

        VAR_3 -= VAR_5;

        VAR_2 += VAR_5;

        VAR_1 += VAR_5;

    }

    return 0;

}

int FUNC_0(CPUArchState *VAR_0, target_ulong VAR_1,
uint8_t *VAR_2, int VAR_3, int VAR_4)
{ int VAR_5; target_phys_addr_t phys_addr; target_ulong page; while (VAR_3 > 0) { page = VAR_1 & TARGET_PAGE_MASK; phys_addr = cpu_get_phys_page_debug(VAR_0, page); if (phys_addr == -1)
return -1; VAR_5 = (page + TARGET_PAGE_SIZE) - VAR_1; if (VAR_5 > VAR_3)
VAR_5 = VAR_3; phys_addr += (VAR_1 & ~TARGET_PAGE_MASK); if (VAR_4)
cpu_physical_memory_write_rom(phys_addr, VAR_2, VAR_5); else
cpu_physical_memory_rw(phys_addr, VAR_2, VAR_5, VAR_4); VAR_3 -= VAR_5; VAR_2 += VAR_5; VAR_1 += VAR_5; } return 0; }