struct omap_uart_s *omap_uart_init(hwaddr base,

                qemu_irq irq, omap_clk fclk, omap_clk iclk,

                qemu_irq txdma, qemu_irq rxdma,

                const char *label, CharDriverState *chr)

{

    struct omap_uart_s *s = (struct omap_uart_s *)

            g_malloc0(sizeof(struct omap_uart_s));



    s->base = base;

    s->fclk = fclk;

    s->irq = irq;

    s->serial = serial_mm_init(get_system_memory(), base, 2, irq,

                               omap_clk_getrate(fclk)/16,

                               chr ?: qemu_chr_new(label, "null", NULL),

                               DEVICE_NATIVE_ENDIAN);

    return s;

}

struct omap_uart_s *omap_uart_init(hwaddr base,

                qemu_irq irq, omap_clk fclk, omap_clk iclk,

                qemu_irq txdma, qemu_irq rxdma,

                const char *label, CharDriverState *chr)

{

    struct omap_uart_s *s = (struct omap_uart_s *)

            g_malloc0(sizeof(struct omap_uart_s));



    s->base = base;

    s->fclk = fclk;

    s->irq = irq;

    s->serial = serial_mm_init(get_system_memory(), base, 2, irq,

                               omap_clk_getrate(fclk)/16,

                               chr ?: qemu_chr_new(label, "null", NULL),

                               DEVICE_NATIVE_ENDIAN);

    return s;

}

    struct omap_uart_s *s = (struct omap_uart_s *)             g_malloc0(sizeof(struct omap_uart_s));
struct omap_uart_s *FUNC_0(hwaddr VAR_0,

                qemu_irq VAR_1, omap_clk VAR_2, omap_clk VAR_3,

                qemu_irq VAR_4, qemu_irq VAR_5,

                const char *VAR_6, CharDriverState *VAR_7)

{

    struct omap_uart_s *VAR_8 = (struct omap_uart_s *)

            g_malloc0(sizeof(struct omap_uart_s));



    VAR_8->VAR_0 = VAR_0;

    VAR_8->VAR_2 = VAR_2;

    VAR_8->VAR_1 = VAR_1;

    VAR_8->serial = serial_mm_init(get_system_memory(), VAR_0, 2, VAR_1,

                               omap_clk_getrate(VAR_2)/16,

                               VAR_7 ?: qemu_chr_new(VAR_6, "null", NULL),

                               DEVICE_NATIVE_ENDIAN);

    return VAR_8;

}

struct omap_uart_s *FUNC_0(hwaddr VAR_0,
qemu_irq VAR_1, omap_clk VAR_2, omap_clk VAR_3,
qemu_irq VAR_4, qemu_irq VAR_5,
const char *VAR_6, CharDriverState *VAR_7)
{ struct omap_uart_s *VAR_8 = (struct omap_uart_s *)
g_malloc0(sizeof(struct omap_uart_s)); VAR_8->VAR_0 = VAR_0; VAR_8->VAR_2 = VAR_2; VAR_8->VAR_1 = VAR_1; VAR_8->serial = serial_mm_init(get_system_memory(), VAR_0, 2, VAR_1,
omap_clk_getrate(VAR_2)/16,
VAR_7 ?: qemu_chr_new(VAR_6, "null", NULL),
DEVICE_NATIVE_ENDIAN); return VAR_8; }